ADSP-21161N EZ-KIT Lite® Evaluation System Manual Revision 3.0, January 2005 Part Number 82-000530-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information © 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Limited Warranty The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc. Trademark and Service Mark Notice The Analog Devices logo, VisualDSP++, the VisualDSP++ logo, SHARC, CROSSCORE, the CROSSCORE logo, and EZ-KIT Lite are registered trademarks of Analog Devices, Inc. All other brand and product names are trademarks or service marks of their respective owners. Regulatory Compliance The ADSP-21161N EZ-KIT Lite evaluation system has been certified to comply with the essential requirements of the European EMC directive 89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE” mark. The ADSP-21161N EZ-KIT Lite evaluation system had been appended to Analog Devices Development Tools Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE Certification by an appointed European Competent Body and is on file. The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package. CONTENTS PREFACE Purpose of This Manual ................................................................. xiv Intended Audience ......................................................................... xiv Manual Contents ............................................................................ xv What’s New in This Manual ............................................................ xv Technical or Customer Support ...................................................... xvi Supported Processors ...................................................................... xvi Product Information ..................................................................... xvii MyAnalog.com ........................................................................ xvii Processor Product Information ................................................. xvii Related Documents ................................................................ xviii Online Technical Documentation ............................................. xix Accessing Documentation From VisualDSP++ ....................... xx Accessing Documentation From Windows ............................. xx Accessing Documentation From Web ................................... xxi Printed Manuals ....................................................................... xxi VisualDSP++ Documentation Set ......................................... xxi Hardware Tools Manuals ..................................................... xxii Processor Manuals ............................................................... xxii ADSP-21161N EZ-KIT Lite Evaluation System Manual v CONTENTS Data Sheets ........................................................................ xxii Notation Conventions .................................................................. xxii USING EZ-KIT LITE Package Contents ......................................................................... 1-2 Default Configuration .................................................................. 1-3 Installation and Session Startup ..................................................... 1-5 Evaluation License Restrictions ..................................................... 1-6 Memory Map ............................................................................... 1-6 SDRAM Memory ......................................................................... 1-6 FLAG Pins ................................................................................... 1-9 Interrupt Pins ............................................................................. 1-10 Audio Interface ........................................................................... 1-10 Example Programs ...................................................................... 1-12 Flash Programmer Utility ............................................................ 1-12 VisualDSP++ Interface ................................................................ 1-13 Boot Load ............................................................................. 1-13 Target Options ...................................................................... 1-13 While Target is Halted and On Emulator Exit Options ...... 1-13 Other Options .................................................................. 1-15 Core Hang Conditions .......................................................... 1-15 Restricted Software Breakpoints ............................................. 1-16 EZ-KIT LITE HARDWARE REFERENCE System Architecture ...................................................................... 2-2 vi ADSP-21161N EZ-KIT Lite Evaluation System Manual CONTENTS External Port ........................................................................... 2-3 Host Processor Interface (HPI) ................................................ 2-3 SPORT Audio Interface ........................................................... 2-3 SPI Audio Interface ................................................................. 2-4 Breadboard Area ...................................................................... 2-4 JTAG Emulation Port .............................................................. 2-5 Jumper Settings ............................................................................. 2-5 SDRAM Disable Jumper (JP1) ................................................ 2-5 SPDIF Selection Jumper (JP2) ................................................. 2-5 MCLK Selection Jumper (JP3) ................................................ 2-6 FLAG0 Enable Jumper (JP4) ................................................... 2-7 FLAG1 Enable Jumper (JP5) ................................................... 2-7 Sample Frequency Jumper (JP6) ............................................... 2-7 ADC2 Input Mode Selection Jumpers (JP7–8) ......................... 2-8 MIC Gain Selection Jumpers (JP9–10) .................................... 2-8 ADC1 Input Selection Jumper (JP11) ...................................... 2-9 Processor ID Jumper (JP19) ................................................... 2-10 Boot Mode Selection Jumper (JP20) ...................................... 2-10 Clock Mode Selection Jumper (JP21) ..................................... 2-11 ~BMS Enable Jumper (JP22) ................................................. 2-12 AD1836 Control Selection Jumper (JP23) ............................. 2-12 SW1 Enable Jumper (JP26) ................................................... 2-12 SW2 Enable Jumper (JP27) ................................................... 2-12 LEDs and Push Buttons .............................................................. 2-13 ADSP-21161N EZ-KIT Lite Evaluation System Manual vii CONTENTS Reset LEDs (LED1 and LED8) ............................................. 2-14 FLAG LEDs (LED2–7) ......................................................... 2-14 VERF LED (LED9) .............................................................. 2-14 USB Monitor LED (LED10) ................................................. 2-15 Power LED (LED11) ............................................................ 2-15 Programmable FLAG Push Buttons (SW1–4) ........................ 2-15 Interrupt Push Buttons (SW5–7) ........................................... 2-16 Board Reset Push Button (SW8) ............................................ 2-16 Connectors ................................................................................. 2-16 USB Connector (P2) ............................................................. 2-16 Audio Connectors (P4–8, P17) .............................................. 2-18 External Port Connector (P9) ................................................ 2-18 Host Processor Interface Connector (P10) ............................. 2-19 JTAG Connector (P12) ......................................................... 2-19 Link Port Connectors (P13–14) ............................................ 2-19 SPORT1 and SPORT3 Connector (P15) ............................... 2-20 Power Connector (P16) ......................................................... 2-20 Specifications ............................................................................. 2-21 Power Supply ........................................................................ 2-21 Board Current Measurements ................................................ 2-21 BILL OF MATERIALS INDEX viii ADSP-21161N EZ-KIT Lite Evaluation System Manual CONTENTS ADSP-21161N EZ-KIT Lite Evaluation System Manual ix CONTENTS x ADSP-21161N EZ-KIT Lite Evaluation System Manual PREFACE Thank you for purchasing the ADSP-21161N EZ-KIT Lite®, Analog Devices, Inc. evaluation system for SHARC® digital signal processors (DSPs). The SHARC processors are based on a 32-bit super Harvard architecture that includes a unique memory architecture comprised of two large on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives a SHARC processor the bandwidth for sustained high-speed computations. SHARC processors represent today’s de facto standard for floating-point processor targeted for premium audio applications. The evaluation system is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of the ADSP-21161N SHARC processors. The VisualDSP++ development environment gives you the ability to perform advanced application code development and debug, such as: • Create, compile, assemble, and link application programs written in C++, C, and ADSP-21161N assembly • Load, run, step, halt, and set breakpoints in application program • Read and write data and program memory • Read and write core and peripheral registers • Plot memory ADSP-21161N EZ-KIT Lite Evaluation System Manual xi Access to the ADSP-21161N processor from a personal computer (PC) is achieved through a USB port or an optional JTAG emulator. The USB interface provides unrestricted access to the ADSP-21161N processor and the evaluation board peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a wide range of in-circuit emulation products. To learn more about Analog Devices emulators and processor development tools, go to http://www.analog.com/dsp/tools/. ADSP-21161N EZ-KIT Lite provides example programs to demonstrate the capabilities of the evaluation board. ADSP-21161N EZ-KIT Lite installation is part of the VisuL The alDSP++ installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial unrestricted 90-day evaluation license expires: • VisualDSP++ allows a connection to the ADSP-21161N EZ-KIT Lite via the USB Debug Agent interface only. Connections to simulators and emulation products are no longer allowed. • The linker restricts a users program to 5K words of internal memory for code space with no restrictions for data space. Refer to the VisualDSP++ Installation Quick Reference Card for details. The board features: • Analog Devices ADSP-21161N processor D D 100 MHz Core Clock Speed Core Clock Mode Jumper Configurable • Analog Devices AD1836 96 kHz Audio Codec D Jumper Selectable Line-In or Mic-In 3.5 mm Stereo Jack xii ADSP-21161N EZ-KIT Lite Evaluation System Manual Preface D D D Line-Out 3.5 mm Stereo Jack 4 RCA Jacks for Audio Input 8 RCA Jacks for Audio Output • Analog Devices AD1852 192 kHz Auxiliary DAC • Crystal Semiconductor CS8414 96 kHz SPDIF Receiver D Optical and Coaxial Connectors for SPDIF Input • Flash Memory D 512K x 8-bits • Interface Connectors D D D D 14-Pin Emulator Connector for JTAG Interface SPORT Connectors Link Port 0 and Link Port 1 External Port Connectors (not populated) • General-Purpose IO D D D 4 Push Button Flags 3 Push Button Interrupts 6 LED Outputs • Analog Devices ADP3338 and ADP3339 Voltage Regulators • Breadboard area with typical SMT footprints The EZ-KIT Lite board has a flash memory device that can be used to store user-specific boot code. By configuring the jumpers for EPROM boot, the board can run as a stand-alone unit. The ADSP-21161N EZ-KIT Lite package contains a flash programmer utility, which allows you to program the flash memory. The “Flash Programmer Utility” is described on page 1-12. ADSP-21161N EZ-KIT Lite Evaluation System Manual xiii Purpose of This Manual and SPORT2 connect to the audio codec, facilitating creation of audio-signal processing applications. SPORT1 and SPORT3 connect to off-board connectors of other serial devices. SPORT0 Additionally, the EZ-KIT Lite board provides un-installed expansion connector footprints to connect to the processor’s External Port (EP) and Host Processor Interface (HPI). Purpose of This Manual The ADSP-21161N EZ-KIT Lite Evaluation System Manual provides instructions for installing the product hardware (board) and describes the operation and configuration of the board components. The product software component is detailed in the VisualDSP++ Installation Quick Reference Card. The manual provides guidelines for running your own code on the ADSP-21161N EZ-KIT Lite. Finally, a schematic and a bill of materials are provided as a reference for future designs. Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual but should supplement it with other texts (such as the ADSP-21161 SHARC Processor Hardware Reference and ADSP-21160 SHARC Processor Instruction Set Reference) that describe your target architecture. Programmers who are unfamiliar with VisualDSP++ should refer to the VisualDSP++ online Help and the VisualDSP++ user’s or getting started guides. For the locations of these documents, see “Related Documents” on page -xviii. xiv ADSP-21161N EZ-KIT Lite Evaluation System Manual Preface Manual Contents The manual consists of: • Chapter 1, “Using EZ-KIT Lite” on page 1-1 Provides information on the EZ-KIT Lite from a programmer’s perspective and provides a simplified memory map. • Chapter 2, “EZ-KIT Lite Hardware Reference” on page 2-1 Provides information on the hardware aspects of the evaluation system. • Appendix A, “Bill Of Materials” on page A-1 Provides a list of components used to manufacture the EZ-KIT Lite board. • Appendix B, “Schematics” on page B-1 Provides the resources to allow EZ-KIT Lite board-level debugging or to use as a reference design. appendix is not part of the online Help. The online Help L This viewers should go to the PDF version of the ADSP-21161N EZ-KIT Lite Evaluation System Manual located in the Docs\EZ-KIT Lite Manuals folder on the installation CD to see the schematics. Alternatively, the schematics can be found on the Analog Devices Web site, www.analog.com/processors. What’s New in This Manual This revision of the ADSP-21161N EZ-KIT Lite Evaluation System Manual provides an updated listing of related documents and updated licensing information. ADSP-21161N EZ-KIT Lite Evaluation System Manual xv Technical or Customer Support Technical or Customer Support You can reach DSP Tools Support in the following ways. • Visit the Embedded Processing and processor products Web site at http://www.analog.com/processors/technicalSupport • E-mail tools questions to [email protected] • E-mail processor questions to [email protected] • Phone questions to 1-800-ANALOGD • Contact your Analog Devices, Inc. local sales office or authorized distributor • Send questions by mail to: Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA Supported Processors This EZ-KIT Lite evaluation system supports the Analog Devices ADSP-21161N SHARC processors. xvi ADSP-21161N EZ-KIT Lite Evaluation System Manual Preface Product Information You can obtain product information from the Analog Devices website, from the product CD-ROM, or from the printed publications (manuals). Analog Devices is online at www.analog.com. Our website provides information about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors. MyAnalog.com MyAnalog.com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information on products you are interested in. You can also choose to receive weekly e-mail notifications containing updates to the Web pages that meet your interests. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more. Registration: Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as means for you to select the information you want to receive. If you are already a registered user, just log on. Your user name is your e-mail address. Processor Product Information For information on embedded processors and processors, visit our Web site at www.analog.com/processors, which provides access to technical publications, data sheets, application notes, product overviews, and product announcements. ADSP-21161N EZ-KIT Lite Evaluation System Manual xvii Product Information You may also obtain additional information about Analog Devices and its products in any of the following ways. • E-mail questions or requests for information to [email protected] • Fax questions or requests for information to 1-781-461-3010 (North America) +49 (89) 76 903-557 (Europe) • Access the FTP Web site at ftp ftp.analog.com or ftp 137.71.23.21 ftp://ftp.analog.com Related Documents For information on product related development software, see the following publications. Table 1. Related Processor Publications Title Description ADSP-21161N DSP Data Sheet General functional description, pinout, and timing ADSP-21161 SHARC Processor Hardware Refer- Description of internal processor architecture, ence registers, and all peripheral functions ADSP-21160 SHARC Processor Instruction Set Reference Description of all allowed processor assembly instructions Table 2. Related VisualDSP++ Publications xviii Title Description VisualDSP++ User’s Guide Description of VisualDSP++ features and usage VisualDSP++ Assembler and Preprocessor Manual Description of the assembler function and commands ADSP-21161N EZ-KIT Lite Evaluation System Manual Preface Table 2. Related VisualDSP++ Publications (Cont’d) Title Description VisualDSP++ C/C++ Complier and Library Manual for SHARC Processors Description of the complier function and commands for SHARC processors VisualDSP++ Linker and Utilities Manual Description of the linker function and commands VisualDSP++ Loader Manual Description of the loader function and commands The listed documents can be found through online Help or in the Docs folder of your VisualDSP++ installation. Most documents are available in printed form. you plan to use the EZ-KIT Lite board in conjunction with a L IfJTAG emulator, also refer to the documentation that accompanies the emulator. All documentation is available online. Most documentation is available in printed form. Visit the Technical Library Web site to access all processor and tools manuals and data sheets: http://www.analog.com/processors/resources/technicalLibrary Online Technical Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, the Dinkum Abridged C++ library, and Flexible License Manager (FlexLM) network license manager software documentation. You can easily search across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary .PDF files of most manuals are provided in the Docs folder on the VisualDSP++ installation CD. ADSP-21161N EZ-KIT Lite Evaluation System Manual xix Product Information Each documentation file type is described as follows. File Description .CHM Help system files and manuals in Help format .HTM or .HTML Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the .HTML files requires a browser, such as Internet Explorer 4.0 (or higher). .PDF VisualDSP++ and processor manuals in Portable Documentation Format (PDF). Viewing and printing the .PDF files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher). If documentation is not installed on your system as part of the software installation, you can add it from the VisualDSP++ CD at any time by running the Tools installation. Access the online documentation from the VisualDSP++ environment, Windows® Explorer, or the Analog Devices Web site. Accessing Documentation From VisualDSP++ To view VisualDSP++ Help, click on the Help menu item or go to the Windows task bar and navigate to the VisualDSP++ documentation via the Start menu. To view ADSP-21161N EZ-KIT Lite Help, which is part of the VisualDSP++ Help system, use the Contents or Search tab of the Help window. Accessing Documentation From Windows In addition to any shortcuts you may have constructed, there are many ways to open VisualDSP++ online Help or the supplementary documentation from Windows. xx ADSP-21161N EZ-KIT Lite Evaluation System Manual Preface Help system files (.CHM) are located in the Help folder, and .PDF files are located in the Docs folder of your VisualDSP++ installation CD-ROM. The Docs folder also contains the Dinkum Abridged C++ library and the FlexLM network license manager software documentation. Your software installation kit includes online Help as part of the Windows® interface. These help files provide information about VisualDSP++ and the ADSP-21161N EZ-KIT Lite evaluation system. Accessing Documentation From Web Download manuals at the following Web site: http://www.analog.com/processors/resources/technicalLibrary/manuals. Select a processor family and book title. Download archive (.ZIP) files, one for each manual. Use any archive management software, such as WinZip, to decompress downloaded files. Printed Manuals For general questions regarding literature ordering, call the Literature Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts. VisualDSP++ Documentation Set To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals may be purchased only as a kit. If you do not have an account with Analog Devices, you are referred to Analog Devices distributors. For information on our distributors, log onto http://www.analog.com/salesdir/continent.asp. ADSP-21161N EZ-KIT Lite Evaluation System Manual xxi Notation Conventions Hardware Tools Manuals To purchase EZ-KIT Lite and In-Circuit Emulator (ICE) manuals, call 1-603-883-2430. The manuals may be ordered by title or by product number located on the back cover of each manual. Processor Manuals Hardware reference and instruction set reference manuals may be ordered through the Literature Center at 1-800-ANALOGD (1-800-262-5643), or downloaded from the Analog Devices Web site. Manuals may be ordered by title or by product number located on the back cover of each manual. Data Sheets All data sheets (preliminary and production) may be downloaded from the Analog Devices Web site. Only production (final) data sheets (Rev. 0, A, B, C, and so on) can be obtained from the Literature Center at 1-800-ANALOGD (1-800-262-5643); they also can be downloaded from the Web site. To have a data sheet faxed to you, call the Analog Devices Faxback System at 1-800-446-6212. Follow the prompts and a list of data sheet code numbers will be faxed to you. If the data sheet you want is not listed, check for it on the Web site. Notation Conventions Text conventions used in this manual are identified and described as follows. conventions, which apply only to specific chapters, may L Additional appear throughout this document. xxii ADSP-21161N EZ-KIT Lite Evaluation System Manual Preface Example Description Close command (File menu) Titles in reference sections indicate the location of an item within the VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu). {this | that} Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars; read the example as this or that. One or the other is required. [this | that] Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that. [this,…] Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an optional comma-separated list of this. .SECTION Commands, directives, keywords, and feature names are in text with letter gothic font. filename Non-keyword placeholders appear in text with italic style format. L Note: For correct operation, ... A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol. a Caution: Incorrect device operation may result if ... Caution: Device damage may result if ... A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol. [ Warning: Injury to device users may result if ... A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users. In the online version of this book, the word Warning appears instead of this symbol. ADSP-21161N EZ-KIT Lite Evaluation System Manual xxiii Notation Conventions xxiv ADSP-21161N EZ-KIT Lite Evaluation System Manual 1 USING EZ-KIT LITE This chapter provides specific information to assist you with development of programs for the ADSP-21161N EZ-KIT Lite evaluation system. The information appears in the following sections. • “Package Contents” on page 1-2 Lists the items contained in the ADSP-21161N EZ-KIT Lite package. • “Default Configuration” on page 1-3 Shows the default configuration of the ADSP-21161N EZ-KIT Lite. • “Installation and Session Startup” on page 1-5 Instructs how to start a new or open an existing ADSP-21161NEZ-KIT Lite session using VisualDSP++. • “Evaluation License Restrictions” on page 1-6 Describes the restrictions of the VisualDSP++ license shipped with the EZ-KIT Lite. • “Memory Map” on page 1-6 Defines the ADSP-21161N EZ-KIT Lite’s memory map. • “SDRAM Memory” on page 1-6· Defines the register values to configure the on-board SDRAM. • “FLAG Pins” on page 1-9 Describes the board’s FLAG pins. ADSP-21161N EZ-KIT Lite Evaluation System Manual 1-1 Package Contents • “Interrupt Pins” on page 1-10 Describes the board’s interrupt pins. • “Audio Interface” on page 1-10 Describes the board’s audio interface. • “Example Programs” on page 1-12 Provides information about example programs included in the ADSP-21161N EZ-KIT Lite. • “Flash Programmer Utility” on page 1-12 Provides information on the Flash Programmer utility included with the EZ-KIT Lite software. • “VisualDSP++ Interface” on page 1-13 Describes the boot loading, target options, and other facilities of the EZ-KIT Lite system. For detailed information on how to program the ADSP-21161N SHARC processor, refer to the documents referenced in “Related Documents”. Package Contents Your ADSP-21161N EZ-KIT Lite evaluation system package contains the following items. • ADSP-21161N EZ-KIT Lite board • VisualDSP++ Installation Quick Reference Card 1-2 ADSP-21161N EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite • CD containing: D VisualDSP++ software D ADSP-21161N EZ-KIT Lite debug software D USB driver files D Example programs D ADSP-21161N EZ-KIT Lite Evaluation System Manual (this document) • Universal 7V DC power supply • USB 2.0 cable • Registration card (please fill out and return) If any item is missing, contact the vendor where you purchased your EZ-KIT Lite or contact Analog Devices, Inc. Default Configuration The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package. The ADSP-21161N EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your computer case. ADSP-21161N EZ-KIT Lite Evaluation System Manual 1-3 Default Configuration When removing the EZ-KIT Lite board from the package, handle the board carefully to avoid the discharge of static electricity, which may damage some components. Figure 1-1 shows the default jumper settings, DIP switch, connector locations, and LEDs used in installation. Confirm that your board is set up in the default configuration before using the board. USB Monitor: LED10 DSP Reset: LED8 Reset: LED1 Power: LED11 Figure 1-1. EZ-KIT Lite Hardware Setup 1-4 ADSP-21161N EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Installation and Session Startup correct operation, install the software and hardware in the L For order presented in the VisualDSP++ Installation Quick Reference Card. 1. Verify that the yellow USB monitor LED (LED10, located near the USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++. 2. From the Start menu, navigate to the VisualDSP++ environment via the Programs menu. If you are running VisualDSP++ for the first time, the New Session dialog box appears on the screen (skip the rest of the procedure and go to step 3). If you have run VisualDSP++ previously, the last opened session appears on the screen. To switch to another session, via the Session List dialog box, hold down the Ctrl key while starting VisualDSP++ (go to step 5). 3. In Debug target, select EZ-KIT Lite (ADSP-21xxx). In Platform, select ADSP-21xxx EZ-KIT Lite. In Processor, choose the appropriate processor, ADSP-21161. In Session name, type a new name or accept the default. 4. Click OK to return to the Session List. 5. Highlight the session and click Activate. ADSP-21161N EZ-KIT Lite Evaluation System Manual 1-5 Evaluation License Restrictions Evaluation License Restrictions The ADSP-21161N EZ-KIT Lite installation is part of the VisualDSP++ installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial unrestricted 90-day evaluation license expires: • VisualDSP++ allows a connection to the ADSP-21161N EZ-KIT Lite via the USB Debug Agent interface only. Connections to simulators and emulation products are no longer allowed. • The linker restricts a users program to 5K words of internal memory for code space with no restrictions for data space. Refer to the VisualDSP++ Installation Quick Reference Card for details. Memory Map The ADSP-21161N processors includes 1 Mbit of internal SRAM for program storage or data storage. The configuration of internal SRAM is detailed in the ADSP-21161 SHARC Processor Hardware Reference. The ADSP-21161N EZ-KIT Lite board contains 512K x 8-bits of external flash memory. The flash memory is connected to the processors’s ~MS1 and ~BMS memory select pins. The flash memory can be accessed in either the boot memory space or the external memory space. The external memory interface also connects to 1M x 48-bit SDRAM memory. The flash memory connects to the ~MS0 pin. SDRAM Memory To use the SDRAM memory, set the two SDRAM control registers to the values shown in Listing 1-1. 1-6 ADSP-21161N EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Table 1-1. EZ-KIT Lite Evaluation Board Memory Map Internal Memory External Memory Start Address End Address Content 0x0000 0000 0x0001 FFFF IOP Registers (Internal) 0x0002 0000 0x0002 1FFF Block 0 Long Word Addressing 0x0002 8000 0x0002 9FFF Block 1 Long Word Addressing 0x0004 0000 0x0004 3FFF Block 0 Normal Word Addressing 0x0005 0000 0x0005 3FFF Block 1 Normal Word Addressing 0x0008 0000 0x0008 7FFF Block 0 Short Word Addressing 0x000A 0000 0x000A 7FFF Block 1 Short Word Addressing 0x0010 0000 0x001F FFFF Multi-processor Memory Space 0x0020 0000 0x002F FFFF External Memory Space Bank 0 (SDRAM) 0x0400 0000 0x047F FFFF External Memory Space Bank 1 (FLASH) 0x0800 0000 0x0BFF FFFF External Memory Space Bank 2 0x0C00 0000 0x0FFF FFFF External Memory Space Bank 3 Listing 1-1. ADSP-21161N EZ-KIT Lite – SDRAM Settings /* SDRAM Controller Setup for the ADSP-21161N EZ-KIT Lite */ /* Assumes SDRAM part# Micron MT48LC16M16A1-7SE (1Mx16-bit, 2 banks) */ /* Default Factory Hardware settings (rev2.3) */ /* LK_CFG[1:0]= 10,~CLDBL=1 */ /* CLKIN=25 MHz, => CCLK=100 MHz */ /* 3 SDRAMs by 16 bits wide total = 3x(1Mx16-bit) = 1M x 48-bit */ /* Mapped to MS0 addresses 0x00200000-0x002fffff */ /* Estimated SDCLK 50 MHz => SDCKR=0 */ /* Settings must be double counted for SDCKR-bit=0, except CAS Latency) */ /* 50 MHz min @ CL=2 -> SDCL=2 [CAS Latency] */ /* tRAS=42ns min */ -> SDTRAS=5*2=10 [precharge delay] ADSP-21161N EZ-KIT Lite Evaluation System Manual 1-7 SDRAM Memory /* tRP=21ns min -> SDTRP=3*2=6 [active delay] /* tRCD=20ns min -> SDTRCD=2*2=4 [CAS-to-RAS delay] */ /* tREF=64ms/4K rows -> */ */ /* -> SDRDIV= (100MHz*64ms/4096) – 13 = 1549 = 0x60D cycles */ /* Note: If you change any clock, you have to change all settings for best performance */ init_21161_SDRAM_controller: ustat1=dm(WAIT); bit clr ustat1 0x000FFFFF; /* clear MS0 wait state count */ dm(WAIT)=ustat1; ustat1=0x60D; /* refresh rate */ dm(SDRDIV)=ustat1; ustat1=0x040146A2; /* mask in SDRAM settings */ dm(SDCTL)=ustat1; init_21161_SDRAM_controller.end: rts; When you are in a VisualDSP++ session connected to the ADSP-21161N EZ-KIT Lite board, the SDRAM registers are configured automatically through the debugger each time the processor is reset. Clearing the Auto configure external memory check box on the Target Options dialog box, which is accessible through the Settings pull-down menu, disables this feature. For more information see “Target Options” on page 1-13. 1-8 ADSP-21161N EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite FLAG Pins The ADSP-21161N holds 12 asynchronous FLAG IO pins. Ten of these pins (FLAG0–9) are available for interaction with the running program. After the processor is reset, the FLAGs are configured as inputs. The directions of the FLAGs are configured though the MODE2 register and are set and read though the FLAG registers. The FLAG registers are summarized in Table 1-2. For more information on FLAGs, refer to the ADSP-21161 SHARC Processor Hardware Reference. Table 1-2. FLAG Pin Summary FLAG1 Connects To Description FLAG0 SW1/AD1836_SPI_SELECT FLAG0 FLAG1 SW2/AD1852_SPI_SELECT FLAG1 FLAG2 SW3 FLAG2 connects to push button SW1 for user input and to the SPI select pin on the AD1836 audio codec. connects to push button SW2 for user input and to the SPI select pin on the AD1852 auxiliary DAC. connects to push button SW3 for user input. FLAG3 SW4 FLAG3 connects to push button SW4 for user input. FLAG4–FLAG9 FLAG10 FLAG11 1 and FLAG0–FLAG3 connect to LEDs on the EZ-KIT Lite board and are for user output. LED2–LED7 FLAG4–9 Not connected Not available are available on connector P10. ADSP-21161N EZ-KIT Lite Evaluation System Manual 1-9 Interrupt Pins Interrupt Pins The ADSP-21161N holds three interrupt pins (IRQ0–2) that let you interact with the running program. Each of the three external interrupts is directly accessible through the push button switches SW5–7 on the EZ-KIT Lite board. Interrupt pins are summarized in Table 1-3. For more information, refer to the ADSP-21161 SHARC Processor Hardware Reference. Table 1-3. Interrupt Pin Summary Interrupt1 Connects To Description IRQ0 SW5 IRQ1 SW6 IRQ2 SW7 IRQ0–2 connect to the push buttons and supply feedback for program execution. For instance, you can write your code to trigger a FLAG when a routine is complete. 1 IRQ0–3 are available on connector P10. Audio Interface The audio interface consists of the AD1836 audio codec, the AD1852 auxiliary DAC and the CS8414 SPDIF receiver. SPORT0 and SPORT2 connect to the audio devices and provide 3 channels of stereo input (1 channel digital, 2 channels analog) and 4 channels of stereo output. Analog audio input is facilitated by a 3.5 mm stereo jack (P7) and four RCA mono jacks (P6). One of the AD1836 stereo input channels is dedicated to two of the RCA mono jacks. The other stereo input channels can either be supplied by the 3.5 mm stereo jack or the other two RCA mono jacks. JP11 determines which jack is used for audio input. Digital audio input can be provided on either a single RCA mono jack (P5) or an optical input connector (P4). JP2 determines the source. Three of the stereo out- 1-10 ADSP-21161N EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite put channels come from the AD1836, while the final channel is from the AD1852. See “Audio Connectors (P4–8, P17)” on page 2-18 for more information about the connectors. The AD1836 multi-channel codec features six digital-to-analog converters (DACs) and four analog-to-digital converters (ADCs) and supports multiple digital stereo channels with 24-bit conversion resolution and a 96 kHz sample rate. The AD1836 features a 108 dB dynamic range for each of its six DACs and a 104 dB dynamic range for its four ADCs. The AD1836 is configured through its SPI port. The ADSP-21161N processor is capable of accessing the AD1836’s SPI port through the SPI port as well as through SPORT1. For more information, see “AD1836 Control Selection Jumper (JP23)” on page 2-12. The AD1852 is a complete 18/20/24-bit single-chip stereo digital audio playback system. It is comprised of a multibit sigma-delta modulator, digital interpolation filters, and analog output drive circuitry. Other features include an on-chip stereo attenuator and mute, programmed through an SPI-compatible serial control port. The AD1852 is fully compatible with all known DVD formats, including 192 kHz and 96 kHz sample frequencies and 24 bits. It also is backwards compatible by supporting 50/15µs digital de-emphasis intended for “redbook” Compact Discs, as well as de-emphasis at 32 kHz and 48 kHz sample rate. The CS8414 is a monolithic CMOS device that receives and decodes audio data up to 96 kHz, according to the AES/EBU, IEC958, S/PDIF, and EIAJ CP340/1201 interface standards. The CS8414 receives data from a transmission line, recovers the clock and synchronization signals, and de-multiplexes the audio and digital data. The CS8414 is setup to operate in Two-Wire Interface (TWI) compatible mode. The Microphone and Line-In jacks connect to the left and right ADC1 channel on the AD1836, depending on the setting of jumpers. See “MIC Gain Selection Jumpers (JP9–10)” on page 2-8 and “ADC1 Input Selection Jumper (JP11)” on page 2-9 for more information. Two RCA jacks ADSP-21161N EZ-KIT Lite Evaluation System Manual 1-11 Example Programs connect to ADC2 on the AD1836. This input is configured though the input mode selection jumpers, See “ADC2 Input Mode Selection Jumpers (JP7–8)” on page 2-8 for more information. The Line-Out jacks connect to the left and right DAC outputs of the AD1836 and AD1852. The CS8414 includes an error flag (VERF) to indicate that the audio output may not be valid. This signal connects to a LED (LED9) on the board. This signal may also be used by interpolation filters to provide error correction. Example Programs Example programs are provided with the ADSP-21161N EZ-KIT Lite to demonstrate various capabilities of the evaluation board. These programs are installed with the EZ-KIT Lite software and can be found in the \…\211xx\EZ-KITs\ADSP-21161N\Examples subdirectory of the VisualDSP++ installation directory. Please refer to the readme file provided with each example for more information. Flash Programmer Utility The ADSP-21161N EZ-KIT Lite evaluation system includes a Flash Programmer utility. The utility allows you to program the flash memory on the EZ-KIT Lite. The Flash Programmer is installed with VisualDSP++. Once the utility is installed, it is accessible from the Tools pull-down menu. For more information on the Flash Programmer utility, go to online Help. 1-12 ADSP-21161N EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite VisualDSP++ Interface This section provides information about the following parts of the VisualDSP++ graphical user interface: • “Boot Load” on page 1-13 • “Target Options” on page 1-13 • “Core Hang Conditions” on page 1-15 • “Restricted Software Breakpoints” on page 1-16 Boot Load Choosing Boot Load from the Settings menu runs the processor and performs a hard reset on the board. This command saves you from having to shut down VisualDSP++, reset the EZ-KIT Lite board, and bring up VisualDSP++ again when you want to perform a hard reset. Use this feature when loading debug boot code from an external part or when you want to put the device into a known state. Target Options Choosing Target Options from the Settings menu opens the Target Options dialog box (Figure 1-2). Use target options to control certain aspects of the processor on the ADSP-21161N EZ-KIT Lite evaluation system. While Target is Halted and On Emulator Exit Options This target option controls the processor’s behavior when VisualDSP++ relinquishes processor control (for example, when exiting VisualDSP++). The options are detailed in Table 1-4 and Table 1-5. ADSP-21161N EZ-KIT Lite Evaluation System Manual 1-13 VisualDSP++ Interface Figure 1-2. Target Options Dialog Box Table 1-4. While Target is Halted Options Option Description Stop I/O DMA Stops IO DMAs in emulator space. This option disables DMA requests when the emulator has control of the processor. Data in the EP, LINK, or SPORT DMA buffers are held there unless the internal DMA request was already granted. This option holds off incoming data and ceases outgoing data. Because SPORT-receive data cannot be held off, it is lost, and the overrun bit is set. The direct write buffer (internal memory write) and the EP pad buffer are allowed to flush any remaining data to internal memory. Table 1-5. On Emulator Exit Options Option Description On Emulator Exit Determines the state the processor is left in when the emulator relinquishes control of the processor: Reset DSP and Run causes the processor to reset and begin execution from its reset vector location. Run from current PC causes the processor to begin running from its current location. 1-14 ADSP-21161N EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Other Options Table 1-6 describes other available target options. Table 1-6. Other Target Options Option Description Verify all writes to target memory Validates all memory writes to the processor. After each write, a read is performed and the values are checked for a matching condition. Enable this option during initial program development to locate and fix initial build problems (such as attempting to load data into non-existent memory). Clear this option to increase performance while loading executable files since VisualDSP++ does not perform the extra reads that are required to verify each write. Reset cycle counters on run Resets the cycle count registers to zero before a Run command is issued. Select this option to count the number of cycles executed between breakpoints in a program. Auto configure external memory Enables the automatic configuration of the SDRAM registers (done through the debugger). Core Hang Conditions Certain peripheral devices, such as host ports, DMA, and link ports, can hold off the execution of processor instructions. This is known as a hung condition and commonly occurs when reading from an empty port or writing to a full port. If an attempt to halt the processor is made during one of these conditions, the EZ-KIT Lite may encounter a core hang. Normally, a core hang can be cleared by the board using a special clear/abort bit. However, there are cases in which it is desirable or possible not to clear the core hang. Sometimes it is desirable to wait for the core hang to clear itself, such as when waiting for a host processor to read or write data. In other cases, it is not possible to clear the core hang, and a processor reset must occur to continue the debugging session. Table 1-7 describes the EZ-KIT Lite’s core hang operations. ADSP-21161N EZ-KIT Lite Evaluation System Manual 1-15 VisualDSP++ Interface Table 1-7. Core Hang Operations Option Description Abort Abort the hung operation. This causes the offending instruction to be aborted in the pipeline. Retry Allows you to remedy the hung operation. For example, if a host processor is holding off the processor, you can cause the host to clear the hung condition. Ignore Performs a software reset on the target board. Clear Aborts the hung operation. This causes the offending instruction to be aborted in the pipeline. Acknowledge Allows you to remedy the hung operation. For example, if a host processor is holding off the processor, you can cause the host to clear the hung condition. Reset Performs a software reset on the target board. Restricted Software Breakpoints The EZ-KIT Lite development system restricts breakpoint placement when certain conditions are met. That is, under some conditions, breakpoints cannot be placed effectively. Such conditions depend on bus architecture, pipeline depth, and ordering of the EZ-KIT Lite and its target processor. 1-16 ADSP-21161N EZ-KIT Lite Evaluation System Manual 2 EZ-KIT LITE HARDWARE REFERENCE This chapter describes the hardware design of the ADSP-21161N EZ-KIT Lite board. The following topics are covered. • “System Architecture” on page 2-2 Describes the configuration of the ADSP-21161N EZ-KIT Lite board and explains how the board components interface with the processor. • “Jumper Settings” on page 2-5 Shows the location and describes the function of the on-board jumpers. • “LEDs and Push Buttons” on page 2-13 Shows the location and describes the function of the LEDs and push buttons. • “Connectors” on page 2-16 Shows the location and gives the part number for the on-board connectors. Also, the manufacturer and part number information is given for the mating parts. • “Specifications” on page 2-21 Provides the board’s measurements and power supply specifications. ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-1 System Architecture System Architecture This section describes the processor’s configuration on the EZ-KIT Lite board. Figure 2-1. System Architecture Block Diagram The ADSP-21161N processor’s core voltage is 1.8V, and the external interface voltage is 3.3V. A 25 MHz through-hole oscillator supplies the input clock to the processor. Footprints are provided on the board for a surface-mount oscillator and a through-hole crystal for alternate user-installed clocks. The speed at 2-2 ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference which the core operates is determined by the location of the clock mode jumper (JP21) as described on page 2-11. By default, the processor core runs at 100 MHz. External Port The External Port (EP) of the processor connects to a 512K x 8-bit flash memory. The flash memory connects to the boot memory select (~BMS) pin and the memory select 1 (~MS1) pin. The connection allows the flash memory to be used to boot the processor as well as to store information during normal operation. The external memory interface also connects to 1M x 48-bit SDRAM memory. The SDRAM memory connects to the memory select 0 (~MS0) pin. Refer to “SDRAM Disable Jumper (JP1)” on page 2-5 for information on how to configure the width of the SDRAM. Refer to “SDRAM Memory” on page 1-6 for a summary of the processor’s memory map. Some of the address, data, and control signals are available externally via two off-board connectors. The EP connectors’ pinout (P9 and P10) can be found in Appendix B, “Schematics”. Host Processor Interface (HPI) The Host Port Interface (HPI) signals are brought to an unpopulated off-board connector (P9). This allows the HPI to interface with a user application. The pinout of the host port connector can be found in Appendix B, “Schematics”. SPORT Audio Interface and SPORT2 are connected to the AD1836 codec (U10). A 3.5 mm stereo jack and four RCA mono jacks facilitate an audio input, while a 3.5 mm stereo jack and eight RCA mono jacks facilitate an audio output. SPORT0 ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-3 System Architecture The codec contains two input channels. One channel connects to a 3.5 mm stereo jack and two RCA jacks. The 3.5 mm stereo jack connects to a microphone. The two RCA jacks can connect to a LINE-OUT from an audio device. You can supply an audio input to the codec microphone input channel (MIC1) or to the LINE_IN input channel. The jumper settings of JP11 determine whether the LINE_IN channel of the codec is driven by the P6 connector or by the P7 connector. SPI Audio Interface The SPI port is connected to the AD1836 and AD1852. The SPI port is used for writing and reading the control registers of the audio devices. Breadboard Area Use the breadboard area to add external circuitry to: • All board voltages and grounds • Package footprints: D D D D D D 1x SOIC16 1x SOIC20 4x SOT23-6 1x PSOP44 2x SOT23 27x 0805 Devices does not support and is not responsible for the [ Analog effects of additional circuitry. 2-4 ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference JTAG Emulation Port The JTAG emulation port allows an emulator to access the processor’s internal and external memory, as well as the special function registers, through a 14-pin header. For a detailed description of the interface’s connectors, see EE-68 published on the Analog Devices website. For more information, see “JTAG Connector (P12)” on page 2-19. For more information about available emulators, contact Analog Devices (see “Product Information”). Jumper Settings This section describes the function of all the jumpers. Figure 2-2 shows the locations of all the jumpers. SDRAM Disable Jumper (JP1) The JP1 jumper is used to enable or disable the third SDRAM device. When the jumper is installed, the ADSP-21161N can access the SDRAM as 48-bit-wide external memory. The upper 16 bits of data are multiplexed with the Link Ports and the external data bus; therefore, when the jumper is installed, the Link Ports are not available. To use the Link Ports, the JP1 jumper must be removed. SPDIF Selection Jumper (JP2) The JP2 jumper is used select the SPDIF input to the CS8414 digital audio receiver. When the jumper is configured for an optical connection, the TOSLINK optical input connector (P4) should be used. When the jumper is configured for a coax connection, the RCA input connector (P5) should be used. ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-5 Jumper Settings JP11: ADC1 Input Selector JP5: FLAG1 Enable JP1: External Memory Width JP22: BMS Enable JP19: DSP ID JP20: Boot Mode JP21: Clock Mode JP26: SW1 Enable JP27: SW2 Enable JP4: FLAG0 Enable JP23: AD1836 Control Select JP6: Sample Frequency JP3: MCLK Select JP2: SPDIF Select JP9: Mic Gain Right JP10: Mic Gain Left JP7: ADC2 Input Mode Left JP8: ADC2 Input Mode Right Figure 2-2. Jumper Locations MCLK Selection Jumper (JP3) The JP3 jumper is used to select the MCLK source for the AD1836 and AD1852. 2-6 ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Table 2-1. SPDIF Modes Jumper Location Mode 1 and 2 Optical (factory default) 2 and 3 Coax Table 2-2. MCLK Selection Jumper Location MCLK Source 1 and 2 Audio Oscillator (12.288 MHz) (factory default) 2 and 3 Derived clock from SPDIF Stream FLAG0 Enable Jumper (JP4) In standard configuration, FLAG0 is connected to the AD1836 and used as a select for the SPI port. This jumper should be removed to use the push button switch or the signal on the expansion connector (P10). Once the jumper is removed, the SPI can no longer communicate with the AD1836. FLAG1 Enable Jumper (JP5) In standard configuration, FLAG1 is connected to the AD1852 and used as a select for the SPI port. The JP5 jumper should be removed to use the push button switch or the signal on the expansion connector (P10). Once the jumper is removed, the SPI can no longer communicate with the AD1852. Sample Frequency Jumper (JP6) The JP6 jumper is used to select the sample frequency for the AD1852 device. Table 2-3 shows the valid frequency modes. ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-7 Jumper Settings Table 2-3. Sample Frequencies Jumper Location Sample Frequency None installed Not allowed 3 and 4 192 kHz (2x Interpolator) 1 and 2 96 kHz (4x Interpolator) 1 and 2, 3 and 4 48 kHz (8x Interpolator) (factory default) ADC2 Input Mode Selection Jumpers (JP7–8) The JP7 and JP8 jumpers control the input mode to ADC2 on the AD1836 (see Table 2-4). In high-performance mode, the signal is routed straight in to the ADC. In PGA mode, the signal goes through a multiplexer and a programmable gain amplifier inside of the codec. Table 2-4. ADC Input Mode Jumper Location Input Mode 3 and 5, 4 and 6 PGA (factory default) 1 and 3, 2 and 4 High Performance MIC Gain Selection Jumpers (JP9–10) The JP9 and JP10 jumpers are used to select the pre-amp gain for the microphone circuit (see Table 2-5). The gain for the left and right channel should be configured the same. Table 2-5. MIC Pre Amp Gain 2-8 Jumper Position Gain Not Installed 0 dB ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Table 2-5. MIC Pre Amp Gain (Cont’d) Jumper Position Gain 1 and 2 20 dB 2 and 3 40 dB (factory default) ADC1 Input Selection Jumper (JP11) The JP11 jumper is used to select the input source for ADC2. If the input source for ADC2 is LINE-IN, then the RCA connector P6 should be used. If the input source for ADC2 is a microphone, then the mini stereo plug P7 should be used. If a microphone is used, the gain of the circuit may be increased, as described in “MIC Gain Selection Jumpers (JP9–10)” on page 2-8. When the JP11 jumpers are between pins 1 and 3 and between pins 2 and 4, the connection is to P7. When the jumpers are between pins 3 and 5 and between pins 4 and 6, the connection is to P6. The jumper settings are illustrated in Table 2-6). (The words MIC and LINE are on the board as a reference.) Table 2-6. Audio Input Jumper Settings Microphone Input Stereo LINE_IN (Default) MIC 1 2 MIC 1 2 JP11 LINE JP11 LINE ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-9 Jumper Settings Processor ID Jumper (JP19) The JP19 jumper is used to select a different ID for the processor. During typical operation of the EZ-KIT Lite board, there is only a single processor in the system. The jumper should be set to the single processor setting. When a second processor is attached to the board though the link port, these jumpers should be changed to configure one board for processor 1 and the other board for processor 2. System configuration options are shown in Table 2-7. Table 2-7. Processor ID Modes Jumper Position Description 1 and 2, 3 and 4, 5 and 6 Single processor (default) 3 and 4, 5 and 6 Processor 1 1 and 2, 5 and 6 Processor 2 Other Invalid Boot Mode Selection Jumper (JP20) The JP20 jumper determines how the ADSP-21161N processor boots. Table 2-8 shows the jumper setting for the processor boot modes. Table 2-8. Boot Mode Select Jumper (JP20) Settings EBOOT Pins 1 & 2 LBOOT Pins 3 & 4 BMS Pins 5 & 6 Processor Boot Mode Not installed Installed Not installed (output) EPROM BOOT (default) Installed Installed Not installed (input) Host Processor Boot Installed Not installed Installed (input) Serial Boot via SPI 2-10 ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Table 2-8. Boot Mode Select Jumper (JP20) Settings (Cont’d) EBOOT Pins 1 & 2 LBOOT Pins 3 & 4 BMS Pins 5 & 6 Processor Boot Mode Installed Not installed Not installed (input) Link Port Boot Installed Installed Installed (input) No Boot Not installed Not installed Installed (input) Reserved Clock Mode Selection Jumper (JP21) The JP21 jumper controls the speed for the core and external port of the ADSP-21161N processor. The frequency supplied to CLKIN of the processor may be changed by removing the 25 MHz oscillator (U24) that is shipped with the board and replacing it with a different oscillator or crystal (Y2). A clock mode and frequency should be selected so that the minimum and maximum specs of the ADSP-21161N processor are not exceeded. For more information on clock modes, see the ADSP-21161 SHARC Processor Hardware Reference. Table 2-9 shows the jumper setting for the clock modes. Table 2-9. Clock Mode Selections CLKDBL Pins 1 & 2 CLK_CFG1 Pins 3 & 4 CLK_CFG0 Pins 5 & 6 Core Clock Ratio External Port Clock Ratio Not installed Installed Installed 2:1 1x Not installed Installed Not installed 3:1 1x Not installed Not installed Installed 4:1 1x (default) Installed Installed Installed 4:1 2x Installed Installed Not installed 6:1 2x Installed Not installed Installed 8:1 2x ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-11 Jumper Settings ~BMS Enable Jumper (JP22) The JP22 jumper is used to control the routing of the Boot Memory Select (~BMS) signal. When the jumper is installed, the ~BMS signal is routed to the flash memory interface and can be used for reading, writing, and booting. The jumper should be installed when using EPROM boot mode. The jumper should be removed when using the serial boot or no-boot mode. If the jumper remains “ON” in serial boot or no-boot modes, the ~BMS signal is grounded, and the flash memory is selected. AD1836 Control Selection Jumper (JP23) The AD1836 control registers are programmed through an SPI port. The SPI port can be configured to be connected to the processor’s SPI port or SPORT1. When the jumper is installed at JP23, the AD1836 SPI port is connected to SPORT1 of the processor. When the jumper is removed, the AD1836 SPI port connects to the processor’s SPI port. By default, the jumper is installed. SW1 Enable Jumper (JP26) The SW1 push button is attached though a driver to FLAG0 of the processor. To disconnect the driver from FLAG0 (for example, to use FLAG1 as an output), remove JP26. SW2 Enable Jumper (JP27) The SW2 push button is attached though a driver to FLAG1 of the processor. To disconnect the driver from (for example, to use FLAG1 as an output), remove JP27. 2-12 ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference LEDs and Push Buttons This section describes the functionality of the LEDs and push buttons. Figure 2-3 shows the locations of the LEDs and push buttons. USB Monitor: LED10 VERF: LED9 DSP Reset: LED8 Reset: LED1 Power: LED11 FLAG4-9: LED2 - 7 Reset: SW8 IRQ0-2: SW5-7 FLAG0-3: SW1-4 Figure 2-3. LED and Push Button Locations ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-13 LEDs and Push Buttons Reset LEDs (LED1 and LED8) When LED1 is lit, the master reset of all the major ICs is active. When LED8 is lit, the ADSP-21161N processor (U1) is being reset. The USB interface resets the processor during USB communication initialization. FLAG LEDs (LED2–7) The FLAG LEDs connect to the processor’s flag pins (FLAG4–9). The LEDs are active HIGH and are lit by an output of “1” from the processor. Refer to “LEDs and Push Buttons” on page 2-13 for more information on how to use the programmable flags to program the processor. Table 2-10 shows the FLAG signals and the corresponding LEDs. Table 2-10. FLAG LEDs FLAG Pin LED Reference Designator FLAG4 LED7 FLAG5 LED6 FLAG6 LED5 FLAG7 LED4 FLAG8 LED3 FLAG9 LED2 VERF LED (LED9) The VERF LED indicates that there is a possible error in the audio stream of the CS8414 digital receiver. The error may occur when digital audio cables disconnect from the optical or coaxial SPDIF connectors. 2-14 ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference USB Monitor LED (LED10) The USB monitor LED (LED10) indicates that USB communication has been initialized successfully, and you may connect to the processor using a VisualDSP++ EZ-KIT Lite session. If the LED does not light, try cycling power on the board and/or reinstalling the USB driver (see the VisualDSP++ Installation Quick Reference Card). VisualDSP++ is actively communicating with the EZ-KIT L When Lite target board, the LED can flicker, indicating communications handshake. Power LED (LED11) When LED11 is lit (green), it indicates that power is being properly supplied to the board. Programmable FLAG Push Buttons (SW1–4) Four push buttons (SW1–4) are provided for general-purpose user input. The push buttons connect to the processor’s FLAG pins. The push buttons are active “HIGH” and, when pressed, send a High (1) to the processor. Refer to “FLAG Pins” on page 1-9 for more information. The push button reference designators and corresponding FLAGs are summarized in Table 2-11. Table 2-11. FLAG Switches FLAG Pin Push Button Reference Designator FLAG Pin Push Button Reference Designator FLAG0 SW1 FLAG2 SW3 FLAG1 SW2 FLAG3 SW4 ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-15 Connectors Interrupt Push Buttons (SW5–7) Three push buttons are provided for general-purpose user interrupts. SW5– connect to the processor’s programmable FLAG pins. The push buttons are active “HIGH” and, when pressed, send a High (1) to the processor. Refer to “FLAG Pins” on page 1-9 for more information. The push button reference designators and corresponding interrupt signals are summarized in Table 2-12. SW7 Table 2-12. Interrupt Switches Interrupt Signal Push Button Reference Designator IRQ0 SW5 IRQ1 SW6 IRQ2 SW7 Board Reset Push Button (SW8) The RESET push button (SW8) resets all of the ICs on the board. During reset, the USB interface is automatically reinitialized. Pressing the RESET push button ( ) while VisualDSP++ is run[ ning disrupts communication and causes errors in the current SW8 debug session. VisualDSP++ must be closed and re-opened. Connectors This section describes the connector functionality and provides information about mating connectors. Figure 2-4 shows the connector locations. USB Connector (P2) The USB connector (P2) is a standard Type B USB receptacle. 2-16 ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Figure 2-4. Connector Locations Part Description Manufacturer Part Number Type B USB receptacle Mill-Max 897-30-004-90-000 Digi-Key ED90003-ND Mating Connector (provided with the EZ-KIT Lite) USB cable Assmann AK672-5 Digi-Key AK672-5ND ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-17 Connectors Audio Connectors (P4–8, P17) There are two 3.5 mm stereo audio jacks, 13 RCA jacks, and one optical connector. Part Description Manufacturer Part Number 3.5 mm stereo jack (P7 and P17) Shogyo SJ-0359AM-5 RCA Jacks (P6) SWITCHCRAFT PJRAS2X2S01 RCA Jacks (P8) SWITCHCRAFT PJRAS4X2U01 TORX (P4) TOSHIBA TORX173 Coaxial (P5) SWITCHCRAFT PJRAN1X1U01 Mating Connectors 3.5mm stereo plug to 3.5mm stereo cable (P7 and P17) Radio Shack L12-2397A Two channel RCA interconnect cable (P6 and P8) Monster Cable BI100-1M Digital Fiber-Optic Cable (P4) Monster Cable ILS100-1M Digital Coaxial Cable (P5) Monster Cable IDL100-1M External Port Connector (P9) A 40-pin 0.05' spacing connector provides access to some of the processor’s External Port signals. By default, this connector is not populated. Part Description Manufacturer Part Number 40-pin 0.05’ (male) Samtec FTSH-120-01-F-D-K Mating Connector Female to female cable 2-18 Samtec FFSD-20-D-5.000-01-N ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Host Processor Interface Connector (P10) A 20-pin 0.05' spacing connector provides access to some of the processor’s External Port signals. By default, this connector is not populated. Part Description Manufacturer Part Number 20-pin 0.05’ (male) Samtec FTSH-110-01-F-D-K Mating Connector Female to female cable Samtec FFSD-10-D-5.000-01-N JTAG Connector (P12) The JTAG header (P12) is the connecting point for a JTAG in-circuit emulator pod. When an emulator is connected to the JTAG header, the USB debug interface is disabled. Pin 3 is missing to provide keying. Pin 3 in the mating connector should have a plug. using an emulator with the EZ-KIT Lite board, follow the L When connection instructions provided with the emulator. Part Description Manufacturer Part Number 14-pin IDC Header (P12) Berg 54102-T08-07 Link Port Connectors (P13–14) Each link port is connected to a 26-pin connector. Refer to EE-106 found on the ADI website at http://www.analog.com for more information about the link port connectors. ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-19 Connectors Part Description Manufacturer Part Number 26 position connector Honda RMCA-26JL-AD Mating Connector Cable connector Honda RMCA-E26F1S-A Shroud Honda RMCA-E26L1A Coaxial cable Gore DXN2132 SPORT1 and SPORT3 Connector (P15) SPORT1 and SPORT3 are connected to a 20-pin connector. Part Description Manufacturer Part Number 20 position AMPMODU system 50 receptacle AMP 104069-1 Mating Connector 20 position AMPMODU system 20 connector AMP 2-487937-0 20 position AMPMODU system 20 connector (w/o lock) AMP 2-487938-0 Flexible film contacts (20 per connector) AMP 487547-1 Power Connector (P16) The power connector (P16) provides all of the power necessary to operate the EZ-KIT Lite board. Part Description Manufacturer Part Number 2.5 mm Power Jack (P16) SWITCHCRAFT RAPC712 Digi-Key SC1152-ND 2-20 ADSP-21161N EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Part Description Manufacturer Part Number Mating Power Supply (shipped with EZ-KIT Lite) 5V Power Supply CUI Stack DTS070175SUDC-p6-SZ Specifications This section provides the requirements for powering the board. Power Supply The power connector supplies DC power to the EZ-KIT Lite board. Table 2-13 shows the power supply specifications. Table 2-13. Power Supply Specifications Terminal Connection Center pin +7V@2 amps Outer Ring GND Board Current Measurements The ADSP-21161N EZ-KIT Lite board provides two zero-ohm resistors that may be removed to measure current draw. Table 2-14 shows the resistor number, the voltage plane, and a description of the components on the plane. Table 2-14. Current Measurement Resistors Resistor Voltage Plane Description R168 VDDINT Core Voltage of the processor R169 VDDEXT IO Voltage of the processor ADSP-21161N EZ-KIT Lite Evaluation System Manual 2-21 Specifications 2-22 ADSP-21161N EZ-KIT Lite Evaluation System Manual A BILL OF MATERIALS The bill of materials corresponds to the board schematics on page B-1. Please check the latest schematics on the Analog Devices website, http://www.analog.com/Processors/Processors/DevelopmentTools/tec hnicalLibrary/manuals/DevToolsIndex.html#Evaluation%20Kit%20Manuals. ADSP-21161N EZ-KIT Lite Evaluation System Manual A-1 A-2 ADSP-21161N EZ-KIT Lite Evaluation System Manual 1 1 1 2 1 1 1 2 5 6 7 8 9 10 11 12 3 3 1 2 2 4 M29W040 PLCC32 FLASH-512K-X-8-3V 1 1 U5 Reference Designator SN74AHC1G02 SOT23-5 SINGLE-2 INPUT-NOR 12.288MHZ 1/2 OSC001 AD8532AR SOIC8 DUAL AMP 250MA CY7C1019BV33-15VC SOJ32 128K X 8 SRAM 74LVC00AD SOIC14 MMBT4401 SOT-23 NPN TRANSISTOR 200MA MMBT4124 SOT-23 NPN TRANSISTOR 1A CY7C64603-128 PQFP128 USB-TX/RX MICROCONTROLLER CS8414 SOIC28 96KHZ-DIGITAL-AUDIO-RECVR MT48LC1M16A1TG TSOP50 1MX16-SDRAM-143MHZ U34,U37 U25 U29 U30 U9, U27 Q1 Q2 U6 U8 U2-4 74LVC14A SOIC14 U21-22 HEX-INVER-SCHMITT-TRIGGER Description Ref. # CY7C1019BV33-12VC 74LVC00AD MMBT4401 MMBT4124 CY7C64603-128NC CS8414 MT48LC1M16A1TG-7S 74LVC14AD M29W040B120K6 Part Number TI DIG01 SN74AHC1G02DBVR SG-8002DC-PCC-ND 12.288MH ANALOG DEVICES AD8532AR CYPRESS PHILIPS FAIRCHILD FAIRCHILD CYPRESS CIRRUS LOGIC MICRON TI ST MICRO Manufacturer SN74LV164A SOIC14 8-BIT-PARALLEL-SERIAL 1 1 1 1 1 2 8 1 1 1 1 1 13 14 15 16 17 18 19 20 21 22 ADSP-21161N EZ-KIT Lite Evaluation System Manual 23 24 ADP3338AKC-33 SOT-223 3.3V-1.0AMP REGULATOR ADSP-21161NKCA100 PBGA225 1MM SPACING REV. X1.2 AD1836AS MQFP52 MULTI-CHANNEL-96KHZ-CODEC AD1852 SSOP28 MULTIBIT-SIGMA-DELTA-DAC ADM708SAR SOIC8 VOLTAGE-SUPERVISOR 2200pF 50V 5% 1206 NPO 1000pF 50V 5% 1206 CERM 21161 24LC00 U7"" SEE 1000127 12.0MHZ THR OSC006 CRYSTAL 25MHZ 1/2 OSC01 OSC CY7C4201V-15AC TQFP32 64-BYTE-FIFO Description Ref. # VR2 U1 U10 U11 U26 C40, C46, C52, C58, C64, C70, C76, C82 C85-86 U7 Y1 U24 U32 U33 Reference Designator 12065A222JAT050 12065A102JAT2A 24LC00-SN 300-6027-ND SG-8002DC-PCC-ND CY7C4201V-15AC SN74LV164AD Part Number ANALOG DEVICES ADP3338AKC-3.3 ANALOG DEVICES ADSP-21161NCCA100 ANALOG DEVICES AD1836AS ANALOG DEVICES AD1852JRS ANALOG DEVICES ADM708SAR AVX AVX MICROCHIP DIG01 DIGI-KEY CYPRESS TI Manufacturer Bill Of Materials A-3 A-4 ADSP-21161N EZ-KIT Lite Evaluation System Manual 1 1 1 1 1 1 2 1 29 30 31 32 33 34 35 36 10 27 3 1 26 28 ADP3339AKC-5 SOT-223 5V-1.5A REGULATOR 2 25 .05 10X2 CON014 RA LNKPRT 12X2 CON010 RCA 2X2 CON013 RCA 1X1 CON012 BLK RCA 4X2 CON011 RA TORX173 6PIN CON008 FIBER OPTIC REV MODULE USB 4PIN CON009 USB PWR 2.5MM_JACK CON005 RA 4.7uF 25V 10% C TANT LMV722M SOIC8 DUAL AUDIO OP AMP ADP3338AKC-18 SOT-223 1.8V-1A REGULATOR Description Ref. # P15 P13-14 P6 P5 P8 P4 P2 P16 CT23-25 U12-20, U28 VR3 VR1, VR5 Reference Designator Part Number AMP HONDA (TSUSHINK) SWITCHCRAFT SWITCHCRAFT SWITCHCRAFT TOSHIBA MILL-MAX SWITCHCRAFT AVX NATIONAL SEMI 104069-1 RMCA-EA26LMY-0M03-A PJRAS2X2S01 PJRAN1X1U01 PJRAS4X2U01 TORX173 897-30-004-90-000000 SC1152-ND12 TAJC475K025R LMV722M ANALOG DEVICES ADP3338AKC-1.8 ANALOG DEVICES ADP3339AKC-5-REEL Manufacturer SPST-MOMENTARY SWT013 6MM 8 1 1 6 8 8 80 11 16 8 5 37 38 39 40 41 42 43 44 45 46 ADSP-21161N EZ-KIT Lite Evaluation System Manual 47 10uF 16V 10% C TANT 0.001uF 50V 5% 805 NPO 0.1uF 50V 10% 805 CERM 0.22uF 25V 10% 805 CERM 0.01uF 100V 10% 805 CERM 330pF 50V 5% 805 NPO AMBER-SMT LED001 GULL-WING 0.00 1/8W 5% 1206 10 1/8W 5% 1206 DIP8 SWT016 Description Ref. # PANASONIC C&K PANASONIC Manufacturer AVX PANASONIC AVX CT19-22, CT36 C14-15, C19-20, C24-25, C29-30 SPRAGUE AVX C1,C5,C9-11, AVX C33,C87-90,C150-153 , C173,C180 C156-164, C172, C183 AVX C2, C6-7, C91-149, C154-155, C165-171, C184-C186, C174-179 C36, C42, C48, C54, C60, C66, C72, C78 LED2-7, LED9-10 R153, R154, YAGEO R168-169, R217, R218 R2 SW9 SW1-8 Reference Designator 293D106X9025C2T 08055A102JAT2A 08055C104KAT 08053C224FAT 08051C103KAT2A 08055A331JAT LN1461C-TR 0.0ECT-ND P10ECT-ND CKN1365-ND EVQ-PAD04M Part Number Bill Of Materials A-5 A-6 ADSP-21161N EZ-KIT Lite Evaluation System Manual 4 5 11 1 1 1 2 10 2 49 50 51 52 53 54 55 56 57 2.21K 1/8W 1% 1206 49.9K 1/8W 1% 1206 2.00K 1/8W 1% 1206 1.5K 100MW 5% 805 475 100MW 5% 805 1M 100MW 5% 805 680 100MW 5% 805 4.7K 100MW 5% 805 33 100MW 5% 805 10K 100MW 5% 805 48 47 Description Ref. # Manufacturer R10-11 R66, R74, R82, R90, R98, R106, R114, R122, R192, R206 R49-50 R7 R16 R12 R137-147 R184, R188, R189, R191, R165 AVX AVX DALE AVX AVX AVX AVX AVX R1, R150, R176, R152 AVX R3-4,R6,R13,R15,R17 AVX -20,R124,R126,R128, R130, R132,R134, R136, R148-149, R151, R155-164, R175, R177-181, R183,R190, R171,R172, R174, R185-187, R193-194, R219-220 Reference Designator CR32-2211F-T CR32-4992F-T CRCW1206-2001FRT1 CR21-1501F-T CR21-471J-T CR21-1004F-T CR21-6800F-T CR21-4701F-T CR21-330JTR CR21-103J-T Part Number 100pF 100V 5% 1206 NPO 24 5 1 7 8 1 2 11 8 4 58 59 60 61 62 63 64 65 ADSP-21161N EZ-KIT Lite Evaluation System Manual 66 67 750K 1/8W 1% 1206 237 1/8W 1% 1206 600 100MHZ 500MA 1206 0.70 BEAD 2A S2A_RECT DO-214AA SILICON RECTIFIER 1000 100MHZ 1.5A FER002 0.06 CHOKE 220pf 50V 10% 1206 NPO 100 100MW 5% 805 22K 100MW 5% 805 10uF 16V 10% B TANT Description Ref. # Manufacturer R25, R32, R38, R45 R23, R27, R30, R34, R40-41, R47-48 FER1-11 D1-2 FER13 C39, C45, C51, C57, C63, C69, C75, C81 R123, R125, R127, R129, R131, R133, R135 R216 CT1-4, CT11 KOA KOA DIGI-KEY GENERALSEMI MURATA AVX AVX AVX AVX C12, C16-17, C21-22, AVX C26-27, C31, C35, C38, C41, C44, C47, C50, C53, C56, C59, C62, C65, C68, C71, C74, C80, C77 Reference Designator RK73H2BT7503F P11.0FCT-ND 240-1019-1-ND S2A PLM250S40T1 12061A221JAT2A CR21-101J-T CR21-223J-T TAJB106K016R 12061A101JAT2A Part Number Bill Of Materials A-7 A-8 ADSP-21161N EZ-KIT Lite Evaluation System Manual 5.76K 1/8W 1% 1206 16 8 1 8 1 2 2 8 8 16 68 69 70 71 72 73 74 75 76 77 5.49K 1/8W 1% 1206 2.74K 1/8W 1% 1206 680PF 50V 1% 805 NPO 30PF 100V 5% 1206 820PF 100V 10% 1206 NPO 75 1/8W 5% 1206 120PF 50V 5% 1206 NPO 68NF 50V 10% 805 11.0K 1/8W 1% 1206 Description Ref. # Manufacturer R60, R61, R68, R69, R76, R77, R84, R85, R92, R93, R100, R101, R108, R109, R116, R117 R63, R71, R79, R87, R95, R103, R111, R119 C37, C43, C49, C55, C61, C67, C73, C79 C3-4 C32, C34 R14 C13, C18, C23, C28, C187-190 C8 PANASONIC PANASONIC AVX AVX AVX PHILIPS PHILLIPS MURRATA R59, R67, R75, R83, DALE R91, R99, R107, R115 R21, R22, R24, R26, DALE R28-29, R31, R33, R35-37, R39, R42-44, R46 Reference Designator ERJ-8ENF5491V ERJ-8ENF2741V 08055A681FAT2A 12061A300JAT2A 12061A821KAT2A 9C12063A75R0JLRT/R 1206CG121J9B200 GRM40X7R683K050AL CRCW12061102FTR1 CRCW12065761FRT1 Part Number 3.32K 1/8W 1% 1206 8 2 8 6 10 1 2 1 1 2 2 2 1 4 78 79 80 81 82 83 84 85 86 87 88 ADSP-21161N EZ-KIT Lite Evaluation System Manual 89 90 91 10.0K 1/8W 1% 1206 74FCT244AT QSOP20 OCTAL-BUFFER 22 1/8W 5% 1206 20.0K 1/8W 1% 1206 1.00K 1/8W 1% 1206 100K 1/8W 5% 1206 1K 1/8W 5% 1206 10K 100MW 2% RNET16 BUSSED 2A SL22 DO-214AA SCHOTTKY 68UF 25V 20% CAP003 ELEC 10UF 16V 20% CAP002 ELEC 1.65K 1/8W 1% 1206 100 1/8W 1% 1206 Description Ref. # R51-52, R55, R58 U23 R8-9 R170,R173 R53, R56 R167 R5 RN1-2 D3 CT26-35 CT5-10 R64, R72, R80, R88, R96, R104, R112, R120 R54, R57 R62, R70, R78, R86, R94, R102, R110, R118 Reference Designator DALE CYPRESS DALE DALE AVX AVX AVX CTS GENERAL SEMI PANASONIC CRCW1206-1002FRT1 CY74FCT244ATQC CRCW1206-2002FRT1 CR1206-1003FTR1 CR32-102J-T 767-161-103G SL22 EEV-FC1E680P PCE3062TR-ND ERJ-8ENF1651V PANASONIC DIG01 ERJ-8ENF1000V ERJ-8ENF3321V Part Number PANASONIC PANASONIC Manufacturer Bill Of Materials A-9 A-10 ADSP-21161N EZ-KIT Lite Evaluation System Manual 3 7 4 1 1 6 1 1 2 96 97 98 99 100 101 102 103 104 8 94 7 1 93 95 RED-SMT LED001 GULL-WING 2 92 3.5MM STEREO_JACK CON001 2.5A RESETABLE FUS001 IDC 7X2 IDC7X2 HEADER IDC 3X2 IDC3X2 IDC 2X2 IDC2X2 0.1x0.1 IDC 4X1 IDC4X1 IDC 3X1 IDC3X1 IDC 2X1 IDC2X1 2X1 TIN ADG774A QSOP16 QUICKSWITCH-257 1uF 25V 20% A TANT -55+125 604 1/8W 1% 1206 GREEN-SMT LED001 GULL-WING Description Ref. # P7, P17 SHOGYO RAYCHEM CORP. BERG P12 SULLINS BERG BERG BERG BERG F1 ECS-T1EY105R ERJ-8ENF6040V LN1361C LN1261C Part Number SJ-0359AM-5 SMD250-2 54102-T08-07 54102-T08-03 PTC02DAAN 54102-T08-02 54101-T08-03 54101-T08-02 ANALOG DEVICES ADG774ABRQ PANASONIC PANASONIC PANASONIC PANASONIC Manufacturer JP7-8, JP11, JP19-21 JP6 P3 JP2-3, JP9-10 JP1, JP4-5, JP22-23, JP26, JP27 U31.U35, U36 CT12-18 R65, R73, R81, R89, R97, R105, R113, R121 LED11 LED1, LED8 Reference Designator A B C D 1 1 ADSP-21161 EZ-KIT LITE Schematic 2 2 3 3 ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - TITLE PAGE Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-13-2003_11:40 D 1 OF 24 A B C D U1 A[0:21] A0 A1 A2 A3 1 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 2 A18 A19 A20 A21 N06 MS0 MS0 M06 MS1 P05 MS2 R05 MS3 MS1 MS2 MS3 L12 CAS M11 RAS P13 DQM CAS 3 M05 ADDR0 N05 ADDR1 L04 ADDR2 R04 ADDR3 P04 ADDR4 N04 ADDR5 M04 ADDR6 R03 ADDR7 P03 ADDR8 P02 ADDR9 N03 ADDR10 R02 ADDR11 M02 ADDR12 P01 ADDR13 N01 ADDR14 N02 ADDR15 M01 ADDR16 L02 ADDR17 M03 ADDR18 L01 ADDR19 K03 ADDR20 L03 ADDR21 K02 ADDR22 K04 ADDR23 RAS DQM L14 DATA16 M13 DATA17 L15 DATA18 K13 DATA19 L13 DATA20 K14 DATA21 K12 DATA22 K15 DATA23 J13 DATA24 J14 DATA25 J12 DATA26 J15 DATA27 H13 DATA28 H12 DATA29 H14 DATA30 H15 DATA31 G15 DATA32 G14 DATA33 G12 DATA34 G13 DATA35 F15 DATA36 F12 DATA37 F14 DATA38 E13 DATA39 F13 DATA40 E15 DATA41 D13 DATA42 E14 DATA43 D15 DATA44 C14 DATA45 D14 DATA46 C15 DATA47 D02 TCK N10 SDCKE SDCKE P10 SDCLK0 P09 SDCLK1 R14 SDWE M10 SDA10 SDCLK0 SDWE SDA10 B02 TDI TDO D01 C01 TMS B01 TRST C02 EMU U1 D[16:47] D16 A10 L0ACK D17 B10 L0CLK D18 L0D[0:7] D19 R08 RD M09 WR M12 ACK N09 BRST E02 RESET WR ACK BRST 4 DSP_RESET N14 DSP_AVDD AVDD P14 AGND ADSP-21161N-100 PBGA225 J04 ID0 J02 ID1 J03 ID2 RPBA L0D1 B11 L0D2 A11 L0D3 D11 D21 D22 L0D4 A09 L0D5 D10 D23 D24 L0D6 C10 L0D7 B09 D25 D26 L0CLK D05 SCLK0 SFS0 D28 D29 L1CLK D30 L1D[0:7] B13 A13 L1D0 L1D1 B14 C13 D31 L1D2 A14 L1D3 C12 L1D4 B12 L1D5 D12 D32 D33 D34 D35 L1D6 A12 L1D7 C11 D36 D37 SD0A L0DAT1 SD0B FLAG[0:9] FLAG0 D39 FLAG1 D40 FLAG2 D41 FLAG3 D42 FLAG4 D43 FLAG5 D44 FLAG6 D45 FLAG7 D46 FLAG8 D47 FLAG9 TCK CLKIN TMS 3.3V L0DAT3 SCLK1 L0DAT4 SFS1 B06 XTAL TRST CLK_CFG0 EMU R1 33 805 ID0 ID1 P1 CLKDBL N13 N12 R12 R09 SFS1 C06 SD1A L0DAT6 SD1B SD1B DMAG1 DMAR1 A07 DMAR1 C08 DMAR2 L1ACK SFS2 L1CLK SD2A L1DAT0 DMAG2 BMSTR DMAR2 5 6 REDY B07 SD2B 7 CS L1DAT1 L1DAT2 SCLK3 L1DAT3 SFS3 L1DAT5 SD3B COM R2 R15 R3 R14 R4 R13 R5 R12 R6 R11 R7 R10 R8 R9 16 15 14 13 DMAG1 12 DMAG2 11 SBTS 10 HBG 9 MS0 10K RNET16 SFS3 B08 SD3A R1 SCLK3 C09 L1DAT4 8 BRST D09 2 SD3A A08 3.3V SD3B L1DAT6 L1DAT7 D04 MISO CLKIN XTAL CLK_CFG0 CLK_CFG1 CLKDBL MISO B04 SPIDS 2 MS1 C04 SPICLK 1 IRQ2 A04 SPIDS RN2 MOSI SPICLK 3 BR6 IRQ0 IRQ1 6 MS3 J01 IRQ2 5 MS2 H04 IRQ1 4 SPIDS H02 IRQ0 IRQ2 7 BR4 R2 R15 R3 R14 R4 R13 R5 R12 R6 R11 R7 R10 R8 R9 16 15 14 13 IRQ1 12 BR5 11 BR3 10 BR2 9 BR1 3 REDY N11 CS COM 10K RNET16 HBR P11 REDY R1 HBG R10 HBR 8 IRQ0 R11 HBG R2 10 1206 CS DSP_AVDD VDDINT P08 BR1 N08 BR2 R07 BR3 P07 BR4 N07 BR5 M07 BR6 BR1 BR2 C1 0.1UF 805 BR3 C2 0.01UF 805 BR4 BR5 BR6 CLKOUT M15 DMAG1 N15 DMAR1 PA M14 DMAG2 P15 DMAR2 LBOOT BMS AGND SBTS R06 PA A05 ANALOG DEVICES EBOOT A06 LBOOT A03 BMS Approvals Drawn ADSP-21161N-100 PBGA225 Checked Engineering B 4 SD2A AGND A 3 HBR C07 EBOOT TIMEXP 2 WR P06 IDC1X1 1 RD D06 SBTS ID2 RN1 SD1A L0DAT7 FLAG0 G01 FLAG1 G02 FLAG2 G04 FLAG3 G03 FLAG4 F01 FLAG5 F04 FLAG6 F02 FLAG7 E03 FLAG8 F03 FLAG9 E01 FLAG10 D03 FLAG11 R13 SCLK1 D07 L0DAT5 H01 P12 1 L0DAT2 TDI TDO SD0A C05 MOSI D38 SFS0 E04 L0DAT0 D27 L1ACK SCLK0 B05 SCLK2 B03 K01 TIMEXP A02 BMSTR E12 D20 CLK_CFG1 RD L0D0 L0ACK C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - DSP Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:09 D 2 OF 24 A 1 B C D A[0:14] 1 D[16:47] U2 A0 21 A1 22 A2 23 A3 24 A4 27 A5 28 A6 29 A7 30 A8 31 A9 32 2 20 A14 19 U3 5 D18 A2 6 D19 A3 8 D20 A4 9 D21 A5 11 D22 A6 12 D23 A7 39 D24 A8 40 D25 A9 42 D26 43 D27 45 D28 46 D29 48 D30 49 D31 DQ2 A1 A2 D17 DQ1 3 A1 A0 DQ0 D16 A0 2 A3 DQ3 A4 DQ4 A5 DQ5 A6 DQ6 A7 DQ7 A8 DQ8 A9 DQ9 A10 DQ10 BA DQ11 DQ12 15 16 17 14 36 WE DQ13 CAS DQ14 RAS DQ15 DQML DQMH A14 15 WE 16 CAS 17 RAS 18 CS 34 CKE 35 CLK U4 2 DQ0 3 DQ1 5 DQ2 6 DQ3 8 DQ4 9 DQ5 11 DQ6 12 DQ7 39 DQ8 40 DQ9 42 DQ10 43 DQ11 45 DQ12 46 DQ13 48 DQ14 49 DQ15 14 DQML 36 DQMH MT48LC1M16A1TG TSOP50 D32 A0 D33 A1 D34 A2 D35 A3 D36 A4 D37 A5 D38 A6 D39 A7 D40 A8 D41 A9 D42 D43 A14 21 A0 22 A1 23 A2 24 A3 27 A4 28 A5 29 A6 30 A7 31 A8 32 A9 20 A10 19 BA D45 D47 18 CS 34 CKE 35 CLK L0D0 3 L0D1 5 L0D2 6 L0D3 8 L0D4 9 L0D5 11 L0D6 12 L0D7 39 L1D0 40 L1D1 42 DQ10 43 DQ11 45 DQ12 46 DQ13 48 DQ14 49 DQ15 L1D2 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 15 WE 16 CAS 17 RAS D46 2 DQ0 D44 14 DQML 36 DQMH CS CKE L0D[0:7] L1D[0:7] 2 L1D3 L1D4 L1D5 L1D6 L1D7 18 34 35 CLK MT48LC1M16A1TG TSOP50 SDRAM 1M X 16 3 21 A0 22 A1 23 A2 24 A3 27 A4 28 A5 29 A6 30 A7 31 A8 32 A9 20 A10 19 BA MT48LC1M16A1TG TSOP50 SDRAM 1M X 16 SDRAM 1M X 16 3.3V 3 SDA10 SDWE CAS INSTALL JUMPER TO USE X48 MEMORY REMOVE JUMPER TO USE LINK PORTS R3 10K 805 RAS DQM SDCLK0 JP1 SJ1 1 SDCKE SHORTING JUMPER DEFAULT=INSTALLED 2 MS0 IDC2X1 ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - SDRAM Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:09 D 3 OF 24 A B C D 1 1 U5 A[0:18] A0 12 A1 11 A2 10 A3 9 A4 8 A5 7 A6 6 A7 5 A8 27 A9 26 A10 23 A11 25 A12 4 A13 28 A14 29 A15 3 A16 2 A17 30 A18 1 A0 A1 R175 10K 805 JP22 SJ32 1 BMS SHORTING JUMPER DEFAULT=INSTALLED 2 U27 U22 11 13 12 74LVC00AD SOIC14 74LVC14A SOIC14 D3 A4 D4 A5 D5 A6 D6 A7 D7 13 D16 14 D17 15 D18 17 D19 18 D20 19 D21 20 D22 21 D23 D[16:23] 2 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 13 MS1 D2 A3 IDC2X1 12 D1 A2 3.3V 2 D0 A18 22 CE 3 INSTALL JUMPER TO READ/WRITE OR BOOT FROM FLASH REMOVE JUMPER WHEN USING SPI OR NO BOOT MODE RD WR 24 3 OE 31 WE M29W040B PLCC32RS FLASH 512K X 8 ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - FLASH & SRAM Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 2-19-2004_15:44 D 4 OF 24 A B C D 3.3V 1 1 R184 4.7K 805 R188 4.7K 805 R189 4.7K 805 R191 4.7K 805 U36 3.3V USB_TMS USB_TCK 2 R187 10K 805 USB_TRST USB_TDI 2 I0A 3 I1A 5 I0B 6 I1B 11 I0C 10 I1C 14 I0D 13 I1D YA YB 4 TMS 7 TCK 9 YC TRST 12 YD TDI 2 R165 4.7K 805 1 S 15 E QS3257Q QSOP16 P12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 U35 USB_EMU IDC7X2 3 JTAG HEADER PIN 3 SHOULD BE CUT 2 I0A 3 I1A 5 I0B 6 I1B 11 I0C 10 I1C 14 I0D 13 I1D YA YB 4 EMU 7 TDO 3 9 YC 12 YD 1 S 15 E QS3257Q QSOP16 JTAG HEADER CIRCUIT FOR EZ-KIT LITE ONLY REFER TO EE-68 FOR STANDARD JTAG HEADER CONNECTION. THIS CAN BE FOUND AT HTTP://WWW.ANALOG.COM ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size B 20 Cotton Road Nashua, NH 03063 4 21161N EZ-KIT LITE - JTAG INTERFACE Board No. Rev A0157-2000 Date 2.4 Sheet D 6 OF 24 A B C D VCC 1 1 R17 10K 805 JP3 R176 33 805 VCC 1 AUDIO_OSC SJ3 2 MCLK VCC SHORTING JUMPER DEFAULT=2&3 3 IDC3X1 U8 26 SDATA 11 FSYNC 12 SCK 19 MCK DSDATA2 R15 10K 805 FER2 600 1206 2 DLRCLK DBCLK C6 0.01UF 805 MCLK SOURCE FOR AD1836 AND AD1852 1 C 14 U 25 ERF 15 CBL 28 VERF INSTALL JUMPER ON 1 & 2 TO USE AUDIO OSCILALTOR INSTALL JUMPER ON 2 & 3 TO USE CS8414 MCK 2 VERF 9 RXP 10 RXN C5 0.1UF 805 R13 10K 805 23 M0 24 M1 18 M2 17 M3 POR 16 SEL 20 FILT 13 CS12/FCK P4 TOSLINK OPTICAL INPUT 3 3 VCC1 OUT2 GND4 GND5 SHIELD6 SHIELD TORX173 CON008 JP2 1 2 6 C0~/E0 5 CA/E1 4 CB/E2 3 CC/F0 2 CD/F1 27 CE/F2 SJ2 1 SHORTING JUMPER DEFAULT=1&2 U9 3 2 R16 475 805 74LVC00AD SOIC14 3 IDC3X1 4 U9 6 5 74LVC00AD SOIC14 PLACE JUMPER ON 1&2 FOR OPTICAL INPUT PLACE JUMPER ON 2&3 FOR COAX INPUT C7 0.01UF 805 C8 68NF 805 OPERATING IN2 I S COMPATIBLE MODE CS8414 SOIC28 3 DIGITAL AUDIO RECEIVER P5 RCA CON012 1X1 SPDIF COAX INPUT AGND 2 1 R14 75 1206 ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - AUDIO RECEIVER Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 12-9-2003_21:30 D 7 OF 24 A B C D INSTALL JUMPER TO CONNECT CODEC TO SPI PORT (JP12 & JP13 NOT INSTALLED) REMOVE JUMPER TO USE FLAG0 FOR PUSH BUTTON OR EXPANSION HEADER ODVDD IS CONNECTED TO 3.3V 3.3V U10 3.3V 47 ASDATA1 48 ASDATA2 44 ALRCLK 43 ABCLK SD0A ASDATA2 1 SFS0 SCLK0 R219 10K 805 8 OUT1L+ 9 OUT1L- OUT1L+ DAC1 LEFT OUT1L- 31 OUT1R+ 30 OUT1R- SJ5 OUT1R+ DAC1 RIGHT OUT1R- 6 OUT2L+ 7 OUT2L- 50 CLATCH 51 CCLK 2 CDATA 49 COUT CLATCH_C SPICLK_C MOSI_C MISO_C R220 10K 805 SJ6 SHORTING JUMPER DEFAULT=3&4 45 MCLK MCLK 1 SHORTING JUMPER DEFAULT=1&2 OUT2L+ R18 10K 805 R19 10K 805 R20 10K 805 SAMPLE FREQUENCY DAC2 LEFT OUT2L- 1&2 3&4 NOT ALLOWED NOT SHORTEDNOT SHORTED 192kHz (2X INTERPOLATOR)NOT SHORTEDSHORTED 96kHz (4X INTERPOLATOR) SHORTED NOT SHORTED 48kHz (8X INTERPOLATOR) SHORTED SHORTED JP6 1 2 3 4 IDC2X2 33 OUT2R+ 32 OUT2R- OUT2R+ DAC2 RIGHT OUT2R- U11 IN1L+ ADC1 LEFT 2 IN1L- ADC1 RIGHT IN1R+ IN1R- 16 IN1L+ 17 IN1L- 4 OUT3L+ 5 OUT3L- 18 IN1R+ 19 IN1R- 35 OUT3R+ 34 OUT3R- OUT3L+ DAC3 LEFT OUT3L- OUT3R+ MCLK DAC3 RIGHT OUT3R- DBCLK DLRCLK 20 IN2L+/CL2/CL2 21 IN2L-/CL1/CL1 22 NC/IN2L1/IN2L+ 23 NC/IN2L2/IN2L- IN2L+ IN2L- ADC2 LEFT IN2L1 IN2L2 DSDATA2 DSDATA3 IN2R1 IN2RIN2R+ SD2A 41 ASDATA2 SJ7 1 SHORTING JUMPER DEFAULT=INSTALLED DLRCLK DBCLK 2 5 MOSI SJ4 JP4 13 FILTR 12 FILTD FLAG1 DEFAULT=INSTALLED C9 0.1UF 805 CT2 10UF B I0A YA 4 C10 0.1UF 805 I0B R190 10K 805 11 10 MOSI 1 YB 7 I0D 13 MISO JP23 1 1 2 15 I1D CDATA CT3 10UF B CT4 10UF B 3 INSTALL JUMPER TO CONNECT DAC TO SPI PORT (JP12 & JP13 NOT INSTALLED) REMOVE JUMPER TO USE FLAG1 FOR PUSH BUTTON OR EXPANSION HEADER YC 9 5 MOSI_C YD 12 R173 20.0K 1206 MISO_C R154 0.00 1206 U28 7 6 SSM2275 SOIC8 AGND ANALOG DEVICES S E Approvals R153 0.00 1206 IDC2X1 QS3257Q QSOP16 Drawn Checked Engineering A C11 0.1UF 805 VREF SSM2275 SOIC8 SPICLK_C I1C 14 SD1A 4 I0C 22 ZEROL 8 ZEROR CLATCH 2 I1B SD3A CCLK AUX DAC U28 CLATCH_C 6 SPICLK 14 FILTR 19 FILTB AGND I1A 5 2 DEEMP 23 MUTE R164 10K 805 3 SCLK1 DAC4 RIGHT AD1852 SSOP28 U31 2 OUT4R- 24 RESET POR R170 20.0K 1206 3 SFS1 3.3V OUT4R+ DAC4 LEFT 21 IDPM0 20 IDPM1 2 IDC2X1 OUT4L- 9 CT1 10UF B CODEC 1 OUT4L+ IDC2X1 AD1836AAS MQFP52 SHORTING JUMPER 12 OUTR+ 13 OUTR- 3 3 FLAG0 2 MCLK 26 BCLK 25 LRCLK 27 SDATA 4 SPICLK JP5 3 PD/RST POR 17 OUTL+ 16 OUTL- DSDATA2 42 36 DLRCLK 37 DBCLK 24 NC/IN2R2/IN2R25 NC/IN2R1/IN2R+ 26 IN2R-/CR1/CR1 27 IN2R+/CR2/CR2 IN2R2 ADC2 RIGHT DSDATA1 38 10 96/48~ 7 192/48~ B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - CODEC & DAC Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 2-19-2004_14:44 D 8 OF 24 A B C D P6 CON013 CT5 10UF CAP002 FER3 600 1206 2 R22 5.76K 1206 LOOP_ADC1_LEFT 3 1 R21 5.76K 1206 C13 120PF 1206 C12 100PF 1206 2 1 R23 237 1206 U12 AGND 1 IN1L- AGND 3 VREF SSM2275 SOIC8 R24 5.76K 1206 C14 0.001UF 805 R26 5.76K 1206 C16 100PF 1206 ADC1 LEFT C187 120PF 1206 AGND R25 750K 1206 2 6 C15 0.001UF 805 2 R27 237 1206 U12 7 IN1L+ 5 SSM2275 SOIC8 AGND P6 CON013 CT6 10UF CAP002 FER4 600 1206 1 R28 5.76K 1206 R29 5.76K 1206 LOOP_ADC1_RIGHT 3 C18 120PF 1206 C17 100PF 1206 3 3 6 R30 237 1206 U13 AGND 7 IN1R- AGND 5 SSM2275 SOIC8 R31 5.76K 1206 C19 0.001UF 805 R33 5.76K 1206 C21 100PF 1206 ADC1 RIGHT C188 120PF 1206 AGND R32 750K 1206 2 C20 0.001UF 805 R34 237 1206 U13 1 4 ANALOG DEVICES IN1R+ 3 SSM2275 SOIC8 Approvals Drawn Checked AGND A Engineering B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - PRIMARY INPUT Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:10 D 9 OF 24 A B C D SJ8 P6 CON013 CT7 10UF CAP002 FER5 600 1206 R35 5.76K 1206 SHORTING JUMPER DEFAULT=1&3 R36 5.76K 1206 5 SJ9 SHORTING JUMPER DEFAULT=2&4 LOOP_ADC2_LEFT 6 1 C23 120PF 1206 C22 100PF 1206 ADC2 LEFT INPUT MODE 1 PGA MODE 3-5 & 4-6 HIGH PERFORMANCEMODE 1-3 & 2-4 2 IN2L2 U14 IN2L- AGND R40 237 1206 1 AGND 3 VREF SSM2275 SOIC8 R37 5.76K 1206 R39 5.76K 1206 2 C24 0.001UF 805 6 JP7 IDC3X2 1 C189 120PF 1206 3 C26 100PF 1206 6 U14 2 AGND R41 237 1206 7 5 IN2L+ SSM2275 SOIC8 IN2L1LINE AGND SJ10 P6 CON013 CT8 10UF CAP002 FER6 600 1206 ADC2 LEFT 5 C25 0.001UF 805 R38 750K 1206 2 4 R42 5.76K 1206 SHORTING JUMPER DEFAULT=1&3 R43 5.76K 1206 4 SJ11 6 C28 120PF 1206 C27 100PF 1206 JP11 (ON SHEET 10) SHOULD BE IN LINE IN POSITION TO USE EITHER OF THESE MODES SHORTING JUMPER DEFAULT=2&4 LOOP_ADC2_RIGHT ADC2 RIGHT INPUT MODE PGA MODE 3-5 & 4-6 HIGH PERFORMANCEMODE 1-3 & 2-4 3 6 IN2R2 U15 3 IN2R- AGND R47 237 1206 7 AGND 5 SSM2275 SOIC8 R44 5.76K 1206 R46 5.76K 1206 2 4 C29 0.001UF 805 6 JP8 IDC3X2 C190 120PF 1206 1 3 C31 100PF 1206 C30 0.001UF 805 R45 750K 1206 2 U15 AGND R48 237 1206 1 3 4 ADC2 RIGHT 5 SSM2275 SOIC8 IN2R1LINE Approvals AGND Drawn Checked Engineering A ANALOG DEVICES IN2R+ B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - SECONDARY INPUT Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:11 D 10 OF 24 A B C D MIC PRE AMP GAIN JP9 SJ12 1 SHORTING JUMPER DEFAULT=1&2 2 1&2 20dB 2&3 40dB NONE 0 dB 3 IDC3X1 1 1 R53 1.00K 1206 R54 100 1206 C32 820PF 1206 R55 10.0K 1206 AVCC SJ13 U16 2 CT9 10UF CAP002 FER7 600 1206 SHORTING JUMPER DEFAULT=3&5 1 3 SJ14 SSM2275 SOIC8 R51 10.0K 1206 2 R49 2.00K 1206 3 Q2 MMBT4124 SOT-23 P7 2 3 SHORTING JUMPER DEFAULT=4&6 2 IN2R1 2 IN2R1LINE 1 2 VREF 4 6 4 CT11 10UF B 5 1 R50 2.00K 1206 CON001 MIC INPUT FER8 600 1206 JP11 IDC3X2 C33 0.1UF 805 1 3 ADC2 RIGHT/LEFT 5 R52 10.0K 1206 IN2L1LINE AGND CT10 10UF CAP002 IN2L1 AGND U16 5 7 3 3 6 SSM2275 SOIC8 AGND ADC2 INPUT SELECTOR INSTALL JUMPERS ON 3-5 & 4-6 FOR LINE IN INSTALL JUMPERS ON 1-3 & 2-4 FOR MIC IN R58 10.0K 1206 C34 820PF 1206 R56 1.00K 1206 R57 100 1206 ANALOG DEVICES JP10 3 MIC PRE AMP GAIN SJ15 4 2 SHORTING JUMPER DEFAULT=1&2 1 1&2 20dB 2&3 40dB NONE 0 dB Approvals IDC3X1 Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - MIC INPUT Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 2-19-2004_14:44 D 11 OF 24 A B C D 1 1 2 CT34 68UF CAP003 U29 1 2 DAC1_RIGHT 2 3 AD8532AR SOIC8 R206 49.9K 1206 P17 2 3 4 5 AGND 1 CON001 6 CT35 68UF CAP003 U29 AGND 7 DAC1_LEFT 3 5 AD8532AR SOIC8 3 R192 49.9K 1206 AGND ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title 21161N Size B 20 Cotton Road Nashua, NH 03063 4 EZ-KIT LITE - DAC1 OUTPUT-STEREO JACK Board No. Rev A0157-2000 Date 2.4 Sheet D 12 OF 24 A B C D DAC1_LEFT R61 5.49K 1206 C38 100PF 1206 1 1 R59 11.0K 1206 R62 3.32K 1206 OUT1LP8 C36 330PF 805 DAC1 LEFT 2 R65 604 1206 U17 C35 100PF 1206 CT26 68UF CAP003 1 CON011 LOOP_DAC1_LEFT 2 3 R60 5.49K 1206 C37 680PF 805 SSM2275 SOIC8 R64 1.65K 1206 3 C40 2200PF 1206 R66 49.9K 1206 OUT1L+ R63 2.74K 1206 2 C39 220PF 1206 2 AGND VREF AGND DAC1_RIGHT R69 5.49K 1206 R67 11.0K 1206 3 C44 100PF 1206 R70 3.32K 1206 3 OUT1RP8 C42 330PF 805 DAC1 RIGHT 6 R73 604 1206 U17 C41 100PF 1206 CT27 68UF CAP003 7 CON011 LOOP_DAC1_RIGHT 1 5 R68 5.49K 1206 C43 680PF 805 SSM2275 SOIC8 R72 1.65K 1206 3 C46 2200PF 1206 R74 49.9K 1206 OUT1R+ R71 2.74K 1206 C45 220PF 1206 ANALOG DEVICES AGND 4 Approvals Drawn AGND Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - DAC1 OUTPUT Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 13 OF 24 A B C R77 5.49K 1206 D C50 100PF 1206 1 1 R75 11.0K 1206 R78 3.32K 1206 OUT2LP8 C48 330PF 805 DAC2 LEFT 6 R81 604 1206 U18 C47 100PF 1206 CT28 68UF CAP003 7 CON011 LOOP_DAC2_LEFT 5 5 R76 5.49K 1206 C49 680PF 805 SSM2275 SOIC8 R80 1.65K 1206 6 C52 2200PF 1206 R82 49.9K 1206 OUT2L+ R79 2.74K 1206 2 C51 220PF 1206 2 AGND VREF AGND R85 5.49K 1206 R83 11.0K 1206 3 C56 100PF 1206 R86 3.32K 1206 3 OUT2RP8 C54 330PF 805 DAC2 RIGHT 2 R89 604 1206 U18 C53 100PF 1206 CT29 68UF CAP003 1 CON011 LOOP_DAC2_RIGHT 4 3 R84 5.49K 1206 C55 680PF 805 SSM2275 SOIC8 R88 1.65K 1206 6 C58 2200PF 1206 R90 49.9K 1206 OUT2R+ R87 2.74K 1206 C57 220PF 1206 ANALOG DEVICES AGND 4 Approvals Drawn AGND Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - DAC2 OUTPUT Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 14 OF 24 A B C R93 5.49K 1206 D C62 100PF 1206 1 1 R91 11.0K 1206 R94 3.32K 1206 OUT3LP8 C60 330PF 805 DAC3 LEFT 6 R97 604 1206 U19 C59 100PF 1206 CT30 68UF CAP003 7 CON011 LOOP_DAC3_LEFT 8 5 R92 5.49K 1206 C61 680PF 805 SSM2275 SOIC8 R96 1.65K 1206 9 C64 2200PF 1206 R98 49.9K 1206 OUT3L+ R95 2.74K 1206 2 C63 220PF 1206 2 AGND VREF AGND R101 5.49K 1206 R99 11.0K 1206 3 C68 100PF 1206 R102 3.32K 1206 3 OUT3RP8 C66 330PF 805 DAC3 RIGHT 2 R105 604 1206 U19 C65 100PF 1206 CT31 68UF CAP003 1 CON011 LOOP_DAC3_RIGHT 7 3 R100 5.49K 1206 C67 680PF 805 SSM2275 SOIC8 R104 1.65K 1206 9 C70 2200PF 1206 R106 49.9K 1206 OUT3R+ R103 2.74K 1206 C69 220PF 1206 ANALOG DEVICES AGND 4 Approvals Drawn AGND Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - DAC3 OUTPUT Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 15 OF 24 A B C R109 5.49K 1206 D C74 100PF 1206 1 1 R107 11.0K 1206 R110 3.32K 1206 OUT4LP8 C72 330PF 805 DAC4 LEFT 6 R113 604 1206 U20 C71 100PF 1206 CT32 68UF CAP003 7 CON011 LOOP_DAC4_LEFT 11 5 R108 5.49K 1206 C73 680PF 805 SSM2275 SOIC8 R112 1.65K 1206 12 C76 2200PF 1206 R114 49.9K 1206 OUT4L+ R111 2.74K 1206 2 C75 220PF 1206 2 AGND VREF AGND R117 5.49K 1206 R115 11.0K 1206 3 C80 100PF 1206 R118 3.32K 1206 3 OUT4RP8 C78 330PF 805 DAC4 RIGHT 2 R121 604 1206 U20 C77 100PF 1206 CT33 68UF CAP003 1 CON011 LOOP_DAC4_RIGHT 10 3 R116 5.49K 1206 C79 680PF 805 SSM2275 SOIC8 R120 1.65K 1206 12 C82 2200PF 1206 R122 49.9K 1206 OUT4R+ R119 2.74K 1206 C81 220PF 1206 ANALOG DEVICES AGND 4 Approvals Drawn AGND Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - DAC4 OUTPUT Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 16 OF 24 A B C 3.3V D 3.3V 1 1 EXFLAG0 EXFLAG3 R124 10K 805 R123 100 805 U21 1 SW1 SWT013 SPST-MOMENTARY CT12 1UF A JP26 2 1 2 U21 9 FLAG0 IDC2X1 74LVC14A SOIC14 R130 10K 805 R129 100 805 SW4 SWT013 SPST-MOMENTARY SJ16 8 FLAG3 74LVC14A SOIC14 CT15 1UF A SHORTING JUMPER DEFAULT=1 & 2 3.3V 3.3V 3.3V 2 2 R132 10K 805 EXFLAG1 EXIRQ0 R126 10K 805 R125 100 805 U21 3 SW2 SWT013 SPST-MOMENTARY R136 10K 805 4 CT13 1UF A R131 100 805 JP27 1 2 U21 11 FLAG1 IDC2X1 74LVC14A SOIC14 EXIRQ2 SW5 SWT013 SPST-MOMENTARY SJ17 CT16 1UF A R135 100 805 U21 10 74LVC14A SOIC14 13 12 U22 U22 5 IRQ0 SW7 SWT013 SPST-MOMENTARY 74LVC14A SOIC14 CT18 1UF A 6 74LVC14A SOIC14 9 8 IRQ2 74LVC14A SOIC14 SHORTING JUMPER DEFAULT=1 & 2 3 3 3.3V 3.3V R134 10K 805 EXFLAG2 R127 100 805 EXIRQ1 R128 10K 805 5 SW3 SWT013 SPST-MOMENTARY R133 100 805 U21 CT14 1UF A 6 U22 1 FLAG2 SW6 SWT013 SPST-MOMENTARY 74LVC14A SOIC14 CT17 1UF A 74LVC14A SOIC14 U22 2 3 4 IRQ1 74LVC14A SOIC14 ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - PUSHBUTTONS Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 17 OF 24 A B C D VCC 3.3V 1 LED1 RED-SMT LED001 LED8 RED-SMT LED001 R143 680 805 1 R144 680 805 LED9 AMBER-SMT LED001 U23 POR DSP_RESET FLAG4 FLAG[4:9] FLAG5 FLAG6 FLAG7 FLAG8 2 FLAG9 2 1A1 4 1A2 6 1A3 8 1A4 LED10 AMBER-SMT LED001 LED11 GREEN-SMT LED001 18 1Y1 16 1Y2 R145 680 805 14 1Y3 12 1Y4 11 2A1 13 2A2 15 2A3 17 2A4 9 9 R147 680 805 U27 8 VERF 2Y1 R146 680 805 10 74LVC00AD SOIC14 7 2Y2 5 2Y3 1 3 2Y4 U27 2 3 MONITOR 2 74LVC00AD SOIC14 1 OE1 19 OE2 LED2 AMBER-SMT LED001 LED3 AMBER-SMT LED001 LED4 AMBER-SMT LED001 LED5 AMBER-SMT LED001 LED6 AMBER-SMT LED001 LED7 AMBER-SMT LED001 LED9 INDICATES AUDIO OUTPUT MAY NOT BE VALID LED10 INDICATES MONITOR FIRMWARE IS RUNNING 74FCT244AT QSOP20 R137 680 805 R138 680 805 R139 680 805 R140 680 805 R141 680 805 3.3V R151 10K 805 R142 680 805 R152 33 805 U24 1 OE OUT 5 25MHZ OSC01 1/2 CLKIN 3 3.3V 3 XTAL Y2 XXMHZ 12.5MHZ OSC006 3.3V C83 27PF 1206 R177 10K 805 3.3V SOFT_RESET 4 U27 R148 10K 805 74LVC00AD SOIC14 11 10 74LVC14A SOIC14 U26 SW8 SWT013 SPST-MOMENTARY 1 MR 4 PFI 8 RESET 7 RESET 5 PFO R149 10K 805 U22 6 5 4 R150 33 805 U25 DSP_RESET 1 OE 5 OUT AUDIO_OSC OSCILLATOR OR CRYSTAL CAN BE USED FOR THE 21161N 12.288MHZ OSC001 1/2 ANALOG DEVICES POR Approvals ADM708SAR SOIC8 Drawn Checked Engineering A C84 27PF 1206 B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - LEDS, RESET, OSC Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 2-19-2004_14:44 D 18 OF 24 A B C D 3.3V 3.3V 1 1 R158 10K 805 R155 10K 805 R156 10K 805 R159 10K 805 R160 10K 805 R157 10K 805 SJ26 EBOOT JP19 1 ID0 2 3 ID1 4 5 ID2 6 3 4 5 6 SHORTING JUMPER DEFAULT=3 & 4 SHORTING JUMPER DEFAULT=NOT INSTALLED IDC3X2 SJ24 SJ28 BOOT MODES SHORTING JUMPER DEFAULT=3 & 4 * SJ25 SHORTING JUMPER DEFAULT=5 & 6 2 2 SJ27 BMS SHORTING JUMPER DEFAULT=1 & 2 IDC3X2 DSP ID LBOOT SJ23 JP20 1 EBOOT 1 0 0 0 0 1 SHORTING JUMPER DEFAULT=NOT INSTALLED LBOOT BMS Booting Mode 0 Output EPROM 0 1 (Input) Host Processor 1 0 (Input) Serial Boot via SPI 1 1 (Input) Link Port 0 0 (Input) No Booting 1 x (Input) Reserved * DENOTES FACTORY DEFAULT 2 REMOVE JP22 WHEN USING SPI OR NO BOOT MODES (REFER TO SHEET 4) 3.3V ON R163 10K 805 LOOP_ADC1_RIGHT 15 3 14 4 13 5 12 6 11 7 10 8 9 3 3 SJ29 CLKDBL 2 3 4 6 LOOP_ADC2_RIGHT SJ30 8 CLOCK MODES 7 SHORTING JUMPER DEFAULT=NOT INSTALLED IDC3X2 CLKDBL CLK_CFG1 CLK_CFG0 Core Clock Ratio 1 0 0 2:1 1 0 1 3:1 * 1 1 0 4:1 0 0 0 4:1 0 0 1 6:1 0 1 0 8:1 * DENOTES FACTORY DEFAULT LOOP_ADC2_LEFT 6 5 CLK_CFG0 SHORTING JUMPER DEFAULT=NOT INSTALLED 5 CLK_CFG1 1 4 JP21 LOOP_DAC1_LEFT LOOP_DAC1_RIGHT LOOP_DAC2_LEFT 3 LOOP_DAC2_RIGHT LOOP_DAC3_LEFT LOOP_DAC3_RIGHT LOOP_DAC4_LEFT LOOP_DAC4_RIGHT SWT016 DIP8 SJ31 EP Clock Ratio 1x 1x 1x 2x 2x 2x 16 2 2 R162 10K 805 1 R161 10K 805 SW9 1 LOOP_ADC1_LEFT SHORTING JUMPER DEFAULT=5 & 6 TURNING THE SWITCHES ON PUTS THE BOARD IN LOOPBACK MODE ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - CONFIGURATION Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 19 OF 24 A B C D 1 1 P9 1 2 3 4 A8 5 6 A7 7 8 A6 9 10 A17 A19 A[8:0] A5 A4 2 13 14 15 16 A2 17 18 A0 3 12 A3 A1 D[23:16] 11 19 20 21 22 D23 23 24 D22 25 26 D21 27 28 D20 29 30 D19 31 32 D18 33 34 D17 35 36 D16 37 38 39 40 A18 A20 A21 RD VCC WR EBOOT ACK LBOOT DMAG1 BMS DMAR1 EXFLAG0 DMAG2 EXFLAG1 DMAR2 EXFLAG2 PA EXFLAG3 SBTS EXIRQ0 HBR EXIRQ1 HBG REDY P10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 3.3V 1.8V TIMEXP EXIRQ2 P11 1 2 MISO 3 4 MOSI 5 6 SPIDS 7 8 SPICLK 9 10 11 12 P18 1 BR1 2 BR2 3 BR3 4 MS2 2 5 MS3 IDC5X1 DNP DSP_RESET IDC6X2 CON023 CS BMSTR BRST CON022 3 ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - EXPANSION HEADERS Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 20 OF 24 A B C D LINK PORT CONNECTORS 1 1 P13 14 CLKSH 15 ACKSH 16 D0SH 17 D1SH 18 D2SH 19 D3SH 20 D4SH 21 D5SH 22 D6SH 23 D7SH 26 UD2 2 UD1 CLK ACK D0 D1 D2 D3 D4 D5 D6 D7 SERIAL PORT CONENCTOR 1 2 L0CLK 3 L0ACK 4 L0D0 5 L0D1 L0D[0:7] SCLK1 R218 0.00 1206 R217 0.00 1206 SFS1 CH2 2 3 4 5 6 7 8 6 L0D2 7 L0D3 8 L0D4 9 10 9 L0D5 11 12 10 L0D6 13 14 11 L0D7 15 16 17 18 19 20 SD1A SD1B SCLK3 SFS3 SD3A 28 CH1 P15 1 27 SD3B 2 CON014 LINKPORT CON010 SHGND SHGND P14 14 CLKSH 15 ACKSH 16 D0SH 17 D1SH 18 D2SH 19 D3SH 20 D4SH 21 D5SH 22 D6SH 23 D7SH 26 UD2 3 28 CH1 UD1 CLK ACK D0 D1 D2 D3 D4 D5 D6 D7 CH2 1 P3 1 DBCLK 2 L1CLK 2 DLRCLK 3 L1ACK 4 L1D0 5 L1D1 6 L1D2 7 L1D3 8 L1D4 9 L1D5 10 L1D6 11 L1D7 3 DSDATA2 L1D[0:7] 4 ASDATA2 IDC4X1 3 27 LINKPORT CON010 SHGND SHGND ANALOG DEVICES 4 JP1 SHOULD NOT BE INSTALLED WHEN USING THE LINK PORT Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - LINK PORTS & SPORTS Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-13-2003_11:39 D 21 OF 24 A B C D VCC F1 2.5A FUS001 1 FER13 CHOKE_COIL 4 3 1 2 D2 2A DO-214AA VR1 5V_REG_IN 3 INPUT P16 1 D1 2A DO-214AA C86 1000PF 1206 2 R167 100K 1206 CT19 10UF C 2 OUTPUT GND 1 ADP3339AKC-5 SOT-223 C87 0.1UF 805 1 CT20 10UF C C88 0.1UF 805 FER9 600 1206 3 7_5V_POWER CON005 3.3V AGND C85 1000PF 1206 1.8V 3.3V FER10 600 1206 VCC VCC D3 2A DO-214AA VR2 2 3 INPUT SHGND VR3 OUTPUT 2 3 GND 1 ADP3338ARM-33 SOT-223 SHGND 2 OUTPUT INPUT 2 GND 1 ADP3338ARM-18 SOT-223 CT21 10UF C C89 0.1UF 805 VCC CT22 10UF C C90 0.1UF 805 AVCC FER11 600 1206 1.8V 3.3V VDDINT 1.8V R168 0.00 1206 3 SJ34 3 AVCC SHORTING JUMPER DEFAULT=DNP 5V_REG_IN 3.3V R216 22K 805 2 INPUT 6 SD JP25 1 2 IDC2X1 DNP C180 0.1UF 805 4 VR4 3 ERR 1 OUTPUT 5 FB GND 4 ADP3331ART SOT23-6 DNP R213 100K 1206 DNP 3 INPUT R169 0.00 1206 2 OUTPUT GND 1 ADP3339AKC-5 SOT-223 R211 500K RES002 DNP R215 365K 1206 DNP R212 1MEG RES002 DNP R214 634K 1206 DNP CT36 10UF C C173 0.1UF 805 R168 & R169 ARE USED TO MEASURE CURRENT DRAW OF THE DSP ANALOG DEVICES AGND Approvals Drawn Checked Engineering A VDDEXT VR5 B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - POWER Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 2-19-2004_14:44 D 22 OF 24 A B C D 3.3V VDDINT 1 1 C91 0.01UF 805 C92 0.01UF 805 C93 0.01UF 805 C94 0.01UF 805 C95 0.01UF 805 C96 0.01UF 805 C97 0.01UF 805 C98 0.01UF 805 C99 0.01UF 805 C118 0.01UF 805 C100 0.01UF 805 C119 0.01UF 805 C120 0.01UF 805 C121 0.01UF 805 C122 0.01UF 805 C123 0.01UF 805 C127 0.01UF 805 C128 0.01UF 805 C129 0.01UF 805 C133 0.01UF 805 C134 0.01UF 805 C135 0.01UF 805 3.3V VDDINT 2 C101 0.01UF 805 C102 0.01UF 805 VDDEXT C103 0.01UF 805 C104 0.01UF 805 C105 0.01UF 805 C106 0.01UF 805 C107 0.01UF 805 C108 0.01UF 805 C124 0.01UF 805 C125 0.01UF 805 C126 0.01UF 805 2 3.3V VDDEXT C109 0.01UF 805 C110 0.01UF 805 C111 0.01UF 805 C112 0.01UF 805 C113 0.01UF 805 C114 0.01UF 805 C115 0.01UF 805 C116 0.01UF 805 C117 0.01UF 805 C130 0.01UF 805 C131 0.01UF 805 C132 0.01UF 805 3 3 3.3V DSP (U1) SDRAM (U2, U3, U4) 3.3V C136 0.01UF 805 C137 0.01UF 805 C138 0.01UF 805 C139 0.01UF 805 C140 0.01UF 805 C141 0.01UF 805 C142 0.01UF 805 C143 0.01UF 805 C144 0.01UF 805 ANALOG DEVICES 4 FLASH (U5) Approvals USB INTERFACE (U6) Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - BYPASS CAPS 1 Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 23 OF 24 A B 3.3V VCC AVCC 3.3V 3.3V C VCC AVCC VCC D AVCC 1 1 C145 0.01UF 805 C146 0.01UF 805 C147 0.01UF 805 C148 0.01UF 805 C149 0.01UF 805 C150 0.1UF 805 C151 0.1UF 805 C152 0.1UF 805 C153 0.1UF 805 C154 0.01UF 805 C155 0.01UF 805 AGND SERIAL EEPROM (U7) DIGITAL RX (U8) AGND NAND (U9) AGND CODEC (U10) AUX DAC (U11) AVCC 3.3V 2 C156 0.22UF 805 C157 0.22UF 805 C158 0.22UF 805 C159 0.22UF 805 C160 0.22UF 805 C161 0.22UF 805 C162 0.22UF 805 C163 0.22UF 805 C164 0.22UF 805 C172 0.22UF 805 C183 0.22UF 805 C165 0.01UF 805 VCC C166 0.01UF 805 3.3V C167 0.01UF 805 3.3V C168 0.01UF 805 C169 0.01UF 805 2 C170 0.01UF 805 AGND SCHMITT TRIGGERS (U21 & U22) OPAMPS (U12-U20, U28, U29) 3.3V 3.3V 3.3V 3.3V 3.3V OCTAL BUFFER (U23) 3.3V OSCILLATORS (U24 & U25) 3.3V 3 VCC C171 0.01UF 805 C186 0.01UF 805 NAND (U27) SRAM (U30) C185 0.01UF 805 C184 0.01UF 805 MUX (U31) C177 0.01UF 805 FIFO (U32) C176 0.01UF 805 SHIFTER (U33) C178 0.01UF 805 RESET MON (U26) C179 0.01UF 805 NOR (U34 & U37) C174 0.01UF 805 C175 0.01UF 805 3.3V CT23 4.7UF C 1.8V CT24 4.7UF C 3 CT25 4.7UF C QUICK SWITCH (U35 & U36) ANALOG DEVICES 4 Approvals Drawn Checked Engineering A B C Date Title Size Nashua, NH 03063 4 21161N EZ-KIT LITE - BYPASS CAPS 2 Board No. Rev A0157-2000 B Date 20 Cotton Road 2.4 Sheet 11-12-2002_17:12 D 24 OF 24 I INDEX A abort, hang operations, 1-16 acknowledge, hang operation, 1-16 AD1836 audio interface description, 1-10 control registers, 2-12 feature list, xii jumper selection for MCLK, 2-6 MIC1 input channel, 2-4 SPI audio interface, 2-4 SPI port, 1-11 SPI select pin, 1-9 SPORT audio interface, 2-3 AD1852 defined, 1-11 feature list, -xiii jumper selection for MCLK, 2-6 sampling frequency, 2-7 SPI audio interface, 2-4 SPI port, 1-11 SPI select pin, 1-9 ADC1 input selector (JP11), 2-9 ADC2 mode selection (JP7, JP8), 2-8 ADSP-21161N processor boot modes, 2-10 clock jumper (JP21), 2-11 core speed, 2-3 core voltage, 2-2 external voltage, 2-2 ID jumper (JP19), 2-10 interrupt pins, 1-10 memory map, 1-6 reset, 1-9 SPI port, 1-11 analog audio input, 1-10 interface, ii asynchronous FLAGs, 1-9 audio connectors (P4-8, P17), 2-18 input, 1-10, 2-3 interface, 1-10, 2-3 output, 1-12, 2-3 stream, 2-14 B bill of materials, A-1 ~BMS, memory select pin, 1-6, 2-3 BMS pin enabling (JP22), 2-12 see also ~BMS, select pin board measurements, 2-21 ADSP-21161N EZ-KIT Lite Evaluation System Manual I-1 INDEX boot code, xiii load, 1-13 memory select pin (~BMS), 2-3, 2-12 memory space, 1-6 mode select (JP20), 2-10 breadboard area, xiii CS8414 digital receiver clock signals, 1-11 defined, 1-11 errors detected by VERF LED (LED9), 2-14 SPDIF input selection, 2-5 synchronization signals, 1-11 customer support, xvi C D clear, hang operations, 1-16 CLK_CFG pins, 2-11 CLKDBL pins, 2-11 clock frequency, 2-11 mode jumper (JP21), 2-3, 2-11 modes, 2-11 configuring SDRAM, 1-7, 1-8 connectors diagram of locations, 1-4, 2-17 JP11 (analog audio input), 1-10 JP2 (digital audio input), 1-10 list of, xiii P10 (external port), 1-9, 1-10, 2-3, 2-19 P12 (JTAG header), 2-19 P13-14 (link port), 2-19 P15 (SPORT1, SPORT3), 2-20 P16 (power), 2-20 P2 (USB), 2-16 P4 (optical input), 1-10, 2-5 P5-6 (mono jack), 1-10, 2-5 P7 (stereo jack), 1-10, 2-4, 2-9 P9 (external port), 2-3, 2-18 contents, EZ-KIT Lite package, 1-2 converters, 1-11 core clock ratio, 2-11 hang conditions, 1-15 voltage, 2-21 digital audio playback, 1-11 data, 1-11 stereo channels, 1-11 DIP switches diagram of, 1-4 see also SW DVD formats, 1-11 I-2 E EBOOT pins, 2-10 emulator connector, xiii EPROM boot mode, 2-10, 2-12 example programs, 1-12 expansion connector footprints, xiv external, 1-8 data bus, 2-5 interrupts, 1-10 memory, EZ-KIT Lite, 1-7 port clock ratio, 2-11 port connectors, 2-3 port interface, xiv, 2-3 port signals, 2-18, 2-19 EZ-KIT Lite architecture, 2-2 features, xii memory map, 1-6 specifications, 2-21 ADSP-21161N EZ-KIT Lite Evaluation System Manual INDEX F features, EZ-KIT Lite, -xii FLAG directing, 1-9 pins, 1-9, 2-15 registers, 1-9 FLAG0, 1-9, 2-12, 2-15 enable jumper (JP4), 2-7 FLAG1, 1-9, 2-12, 2-15 enable jumper (JP5), 2-7 FLAG10-11, 1-9 FLAG2-3, 1-9, 2-15 FLAG4-9, 1-9, 2-14 flash memory, xiii, 1-6, 2-3, 2-12 programmer utility, 1-12 frequency jumper (JP6), 2-7 G general-purpose IO, -xiii graphical user interface (GUI), 1-13 H hard reset, 1-13 Help, online, xxi, 1-12 host processor booting, 2-10 interface, xiv, 2-3 interface connector (P10), 2-19 hung conditions, 1-15 I ignore, hang operations, 1-16 input clock, 2-2 interface connectors, xiii interfaces, see graphical user interface (GUI) internal memory, EZ-KIT Lite, 1-7 interrupt pins, 1-10 push buttons, xiii see also push buttons IO input push buttons (SW1-4), 2-15 pins, 1-9 voltage, 2-21 see also FLAGs IRQ0-2 pins, 1-10, 2-16 J JTAG connector (P12), 2-19 emulation port, 2-5 emulator, 2-19 jumpers JP10 (microphone), 2-8 JP11 (audio in), 2-4, 2-9 JP19 (processor ID), 2-10 JP1 (SDRAM disable), 2-5 JP20 (boot mode), 2-10 JP21 (clock), 2-11 JP22 (~BMS), 2-12 JP26 (SW1 enable), 2-12 JP27 (SW2 enable), 2-12 JP2 (SPDIF), 2-5 JP3 (MCLK source), 2-6 JP6 (frequency), 2-7 JP7-8 (ADC2), 2-8 JP9 (microphone), 2-8 microphone and line-in jacks, 1-11 settings, 1-4 L LBOOT pins, 2-10 ADSP-21161N EZ-KIT Lite Evaluation System Manual I-3 INDEX LEDs diagrammed on board, 1-4, 2-13 features list, included in, xiii FLAG pin connections, 1-9 LED10 (USB monitor), 1-5, 2-15 LED11 (power), 2-15 LED1 (reset), 2-14 LED2-7 (FLAG4-9), 2-14 LED8 (DSP reset), 2-14 LED9 (VERF), 1-12, 2-14 license restrictions, 1-6 line-in input channel, 2-4 jacks, 1-11 line-out jacks, 1-12 link port booting, 2-11 connectors, 2-19 SDRAM jumper (JP1), 2-5 second processor attachment, 2-10 M O oscillator changing frequency by removing, 2-11 surface-mount, 2-2 through-hole, 2-2 P package contents, 1-2 power connector (P16), 2-20 LED (LED11), 2-15 specifications, 2-21 supply, 2-21 processor signals, DAI_P, 2-15 programmable FLAGs see FLAGs push buttons diagram of, 2-13 interrupt pin connection, 1-10 reference designators and FLAGs, xiii SW1-4 (FLAG0-3), 2-15 SW5-7 (IRQ0-2), 1-10, 2-16 SW8 (reset), 2-16 MCLK, selecting (JP3), 2-6 measurements, EZ-KIT Lite, 2-21 memory external memory, 1-6 internal memory, 1-6 select pins, 2-3 memory, EZ-KIT Lite, 1-8 microphone circuit, 2-8 jacks, 1-11 MODE2 register, 1-9 ~MS0-1, memory select pins, 1-6, 2-3 RCA jacks, 1-11, 2-3 registering this product, 1-3 reset board, 1-13 hang operation, 1-16 processor, 2-14 push button (SW8), 2-16 retry, hang operation, 1-16 N S no-boot mode, 2-11, 2-12 notation conventions, xxii sample frequencies, 1-11 I-4 R ADSP-21161N EZ-KIT Lite Evaluation System Manual INDEX SDRAM configuration, 1-7 control registers, 1-6 disabling (JP1), 2-5 memory, 1-6, 2-3 semiconductor receiver, xiii serial booting, 2-10, 2-12 setting target options, 1-13 SMT footprints, xiii SPDIF connectors, 2-14 modes, 2-7 selecting (JP2), 2-5 specifications, 2-21 SPI audio interface, 2-4 port, 2-4, 2-12 select pin, 1-9 SPORT0, xiv, 2-3 SPORT1, xiv connection to offboard devices, -xiv connection to SP1 port, 2-12 connector (P15), 2-20 SPORT2, xiv, 2-3 SPORT3, xiv connection to offboard devices, -xiv connector (P15, 2-20 SRAM memory, 1-6 stereo jack (P7), 1-10, 2-3 output channels, 1-10 SW1 (FLAG0) enable push button, 1-9, 2-12 SW2-4 (FLAG1-3) push buttons, 1-9 SW5-7 (interrupt) push buttons, 1-10, 2-16 system architecture, EZ-KIT Lite, 2-2 T target options dialog box, 1-13 miscellaneous, 1-15 on emulator exit, 1-13 while target is halted, 1-13 Two-Wire Interface (TWI) mode, 1-11 U UART, 2-11 USB cable, 1-3 connector (P2), 2-16 debug interface, 2-19 interface, 2-14, 2-16 monitor LED (LED10), 2-15 user input, 1-9 output, 1-9 V VERF flag (LED9), 1-12, 2-14 VisualDSP++ documentation, xxi online Help, xxi, 1-12 voltage regulators, xiii ADSP-21161N EZ-KIT Lite Evaluation System Manual I-5 INDEX I-6 ADSP-21161N EZ-KIT Lite Evaluation System Manual