TLE 4267 5-V Low-Drop Voltage Regulator TLE 4267 Bipolar IC Features ● ● ● ● ● ● ● ● ● ● ● ● ● ● Output voltage tolerance ≤ ± 2 % Low-drop voltage Very low standby current consumption Input voltage up to 40 V Overvoltage protection up to 60 V (≤ 400 ms) Reset function down to 1 V output voltage ESD protection up to 2000 V Adjustable reset time On/off logic Overtemperature protection Reverse polarity protection Short-circuit proof Wide temperature range Suitable for use in automotive electronics P-TO220-7-3 P-TO220-7-180 Type Ordering Code Package TLE 4267 Q67000-A9153 P-TO220-7-3 TLE 4267 G Q67006-A9169 P-TO220-7-180 (SMD) TLE 4267 S Q67000-A9246 P-TO220-7-230 P-TO220-7-230 Functional Description TLE 4267 is a 5-V low-drop voltage regulator in a TO220-7 package. It supplies an output current of > 400 mA. The IC is shortcircuit-proof and incorporates temperature protection that disables the IC at overtemperature. Application The IC regulates an input voltage VI in the range 5.5 V < VI < 40 V to VQrated = 5.0 V. A reset signal is generated for an output voltage VQ of < 4.5 V. The reset delay can be set with an external capacitor. The device has two logic inputs. It is turned-ON by a voltage of > 4 V on E2 by the ignition for example. It remains active as a function of the voltage on E6, even if the voltage on E2 goes Low. This makes it possible to implement a selfholding circuit without external components. When the device is turned-OFF, the output voltage drops to 0 V and current consumption tends towards 0 µA. Semiconductor Group 1 1998-11-01 TLE 4267 Design Notes for External Components The input capacitor CI is necessary for compensation line influences. The resonant circuit consisting of lead inductance and input capacitance can be damped by a resistor of approx. 1 Ω in series with CI. The output capacitor is necessary for the stability of the regulating circuit. Stability is guaranteed at values of ≥ 22 µF and an ESR of ≤ 3 Ω within the operating temperature range. Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturating of the power element. A comparator in the reset-generator block compares a reference that is independent of the input voltage to the scaled-down output voltage. If this reaches a value of 4.5 V, the reset-delay capacitor is discharged and then the reset output is set Low. As the output voltage increases again, the reset-delay capacitor is charged with constant current from VQ = 4.5 V onwards. When the capacitor voltage reaches the upper switching threshold, reset goes High again. The reset delay can be set within wide range by selection of the external capacitor. With the integrated turn-ON/turn-OFF logic it is simple to implement delayed turn-OFF without external components. Truth Table for Turn-ON/Turn-OFF Logic Pin 2 Pin 6 VQ Remarks L X OFF Initial state, pin 6 internally pulled up H X ON Regulator switched on via pin 2, by ignition for example H L ON Pin 6 clamped active to ground by controller while pin 2 is still high X L ON Previous state remains, even ignition is shut off: self-holding state L L ON Ignition shut off while regulator is in self-holding state L H OFF Regulator shut down by releasing of pin 6 while pin 2 remains Low, final state. No active clamping required by external selfholding circuit (µC) to keep regulator shut off. Pin 2: (Inhibit, E2) Enable function, active High Pin 6: (Hold, E6) Hold and release function, active Low Semiconductor Group 2 1998-11-01 TLE 4267 Pin Configuration (top view) P-TO220-7-3 P-TO220-7-180 1 2 3 Ι 1 2 3 4 5 6 7 4 5 6 R E2 P-TO220-7-230 7 1 2 3 4 5 Ι R 6 7 D GND E6 AEP01724 Ι R E2 GND E2 Q D E6 Q D GND E6 AEP02123 AEP01481 Pin Definitions and Functions Pin Symbol Function 1 I Input; block to ground directly at the IC by a ceramic capacitor 2 E2 Inhibit; device is turned-ON by High signal on this pin; internal pulldown resistor of 100 kΩ 3 R Reset Output; open-collector output internally connected to the output via a resistor of 30 kΩ 4 GND Ground; connected to rear of chip 5 D Reset Delay; connect with capacitor to GND for setting delay 6 E6 Hold; see truth table above for function; this input is connected to output voltage across pullup resistor of 50 kΩ 7 Q 5-V Output; block to GND with 22-µF capacitor, ESR < 3 Ω Semiconductor Group 3 1998-11-01 TLE 4267 Temperature Sensor Saturation Control and Protection Circuit 7 5V Output In- 1 put Control Amplifier Adjustment Buffer Reset Generator Bandgap Reference 5 Reset Delay 3 Reset Output Turn-ON/Turn-OFF Logic 2 Inhibit 6 E6 Hold 4 GND AEB01482 Block Diagram Absolute Maximum Ratings TJ = – 40 to 150 °C Parameter Symbol Limit Values Unit Notes min. max. VI VI II – 42 42 V – – 60 V t ≤ 400 ms – – – Limited internally VR IR – 0.3 7 V – – – – Limited internally Vd – 0.3 42 V – Input Voltage Voltage Current Reset Output Voltage Current Reset Delay Voltage Semiconductor Group 4 1998-11-01 TLE 4267 Absolute Maximum Ratings (cont’d) TJ = – 40 to 150 °C Parameter Current Symbol Limit Values Unit Notes min. max. Id – – – – VQ IQ – 0.3 7 V – – – – Limited internally VE2 IE2 – 42 42 V –5 5 mA t ≤ 400 ms VE6 IE6 – 0.3 7 V – – – mA Limited internally IGND – 0.5 – A – TJ Tstg – 150 °C – – 50 150 °C – Output Voltage Current Inhibit Voltage Current Hold Voltage Current GND Current Temperatures Junction temperature Storage temperature Operating Range Parameter Input voltage Junction temperature Symbol Limit Values Unit Notes min. max. VI TJ 5.5 40 V see diagram – 40 150 °C – Rthja Rthjc Rthjc – 70 K/W – – 6 K/W – – 2 K/W t < 1 ms Thermal Resistance Junction ambient Junction-case Junction-case Semiconductor Group 5 1998-11-01 TLE 4267 Characteristics VI = 13.5 V; – 40 °C < TJ < 125 °C; VE2 > 4 V (unless specified otherwise) Parameter Symbol Limit Values min. typ. max. Unit Test Condition Output voltage VQ 4.9 5 5.1 V 5 mA ≤ IQ ≤ 400 mA 6 V ≤ VI ≤ 26 V Output voltage VQ 4.9 5 5.1 V 5 mA ≤ IQ ≤ 150 mA 6 V ≤ VI ≤ 40 V Output-current limiting IQ Iq 500 – – mA TJ = 25 °C – – 50 µA Regulator-OFF Current consumption Iq = II – IQ Iq – 1.0 10 µA TJ = 25 °C Current consumption Iq = II – IQ Iq – 1.3 4 mA IQ = 5 mA IC turned on Current consumption Iq = II – IQ Iq – – 60 mA IQ = 400 mA Current consumption Iq = II – IQ Iq – – 80 mA Drop voltage VDr ∆VQ ∆VQ – 0.3 0.6 V – – 50 mV – 15 25 mV IQ = 400 mA VI = 5 V IQ = 400 mA1) 5 mA ≤ IQ ≤ 400 mA VI = 6 to 36 V; IQ = 5 Current consumption Iq = II – IQ Load regulation Supply-voltage regulation Supply-voltage rejection IC turned off mA SVR – 54 – dB fr = 100 Hz; Vr = 0.5 Vpp Longterm stability ∆VQ – 0 – mV 1000 h 1) Drop voltage = VI – VQ (measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V) Semiconductor Group 6 1998-11-01 TLE 4267 Characteristics (cont’d) Parameter Symbol Limit Values min. typ. max. Unit Test Condition Reset Generator Switching threshold Vrt 4.2 4.5 4.8 V – Reset High level – 4.5 – – V – 0.1 0.4 V Rext = ∞ RR = 4.7 kΩ 1) – 30 – kΩ – – 50 100 mV 8 15 25 µA VQ < VRT VD = 1.5 V 2.6 3 3.3 V – – 20 – ms Cd = 100 nF – 0.43 – V – – 2 – µs Cd = 100 nF VE2 VE2 RE2 ∆VE2 IE2 VE6 VE6 RE6 – 3 4 V IC turned-ON 2 – – V IC turned-OFF 50 100 200 kΩ – 0.2 0.5 0.8 V – – 35 100 µA VIP2 = 4 V 30 35 40 % Referred to VQ 60 70 80 % Referred to VQ 20 50 100 kΩ – Vi,ov ∆Vi,ov 42 44 46 V – 2 – 6 V – VR Pullup RR VD,sat Saturation voltage Charge current Id Delay switching threshold Vdt td Delay Vst Switching threshold tt Delay Saturation voltage Inhibit Turn-ON voltage Turn-OFF voltage Pulldown Hysteresis Input current Holding voltage Turn-OFF voltage Pullup Overvoltage Protection Turn-OFF voltage Turn-ON hysteresis 1) The reset output is Low between VQ = 1 V and VRT Semiconductor Group 7 1998-11-01 TLE 4267 ΙΙ 1 1000 µF 7 470 nF Ι E2 3 5 Ιd VE2 22 µF TLE 4267 2 VΙ ΙQ ΙR VQ 6 4 Ι GND VR VE6 CD VC 4.7 k Ω AES01483 Test Circuit Input 1 5 V Output 7 470 nF E2; eg 2 Reset To MC 5 TLE 4267 from Terminal 15 22 µF 3 100 nF 6 4 E6 From µC AES01484 Application Circuit Semiconductor Group 8 1998-11-01 TLE 4267 Vi VE VE2, ON VE2, OFF <t t VQ VRT tt Vd VdT VST Vd, sat VR td VR, sat Power on Thermal Reset Shutdown Voltage Drop at Input Undervoltage at Output Secondary Load Spike Bounce Shutdown AET01985 Time Response Semiconductor Group 9 1998-11-01 TLE 4267 Vi VE2 VE2, ON 1) 5) VE2, OFF <1 µs VE6 VE6, rel 2) VE6, hold 4) < 10 µs 10) 6) VQ VQ, VRT 8) Vd VdT VST Vd, sat VR td 9) 3) VR, sat tt 1) 2) 3) 4) Enable active Hold inactive, pulled up by VQ Power-ON reset Hold active, clamped to GND by external µC 5) Enable inactive, clamped by int. pull-down resistor 6) 7) 8) 9) 10) Pulse width smaller than 1 µ s Hold inactive, released by µC Voltage controller shutdown Output-low reset No switch on via VE6 possible after E6 was released to VE6 >VE6, rel for more than 4 µs AET01986 Enable and Hold Behaviour Semiconductor Group 10 1998-11-01 TLE 4267 Drop Voltage VDr versus Output Current IQ Output Voltage VQ versus Temperature Tj AED01486 5.10 VQ VDr V Ι = 13.5 V V AED01488 700 mV 5.00 500 400 T j = 125 C 4.90 300 T j = 25 C 200 4.80 100 4.70 -40 0 0 40 80 160 C 0 100 200 300 400 ΙQ Tj Charge Current Id versus Temperature Tj Delay Switching Threshold VdT versus Temperature Tj AED01485 22 AED01487 4.0 Ιd VdT µA V Ι = 13.5 V VC = 0 V 18 600 mA V Ι = 13.5 V V 3.0 VdT 2.5 16 2.0 Ιd 14 1.5 12 1.0 10 -40 0.5 0 40 80 0 -40 160 C Tj Semiconductor Group 0 40 80 160 C Tj 11 1998-11-01 TLE 4267 Current Consumption Iq versus Input Voltage VI Current Consumption Iq versus Output Current IQ AED01491 15 AED01490 70 Ιq Ιq R L = 25 Ω mA mA V Ι = 13.5 V 50 10 40 30 5 20 10 0 0 0 100 200 300 400 mA 600 0 10 20 30 VΙ ΙQ Output Current IQ versus Temperature Tj Output Current IQ versus Input Voltage VI AED01489 700 AED01987 700 mA Ι Q mA 600 500 500 ΙQ Tj = 25 C Tj = 125 C V Ι = 13.5 V 400 400 300 300 200 200 100 100 0 -40 0 40 80 0 160 C Tj Semiconductor Group 50 V 12 0 10 20 30 40 V 50 Vi 1998-11-01 TLE 4267 Inhibit Current IE2 versus Inhibit Voltage VE2 Output Voltage VQ versus Inhibit Voltage VE2 AED01988 6 VQ AED01989 50 Ι E2 µA V 5 40 4 30 3 20 2 10 1 0 0 1 2 3 4 0 5 V 6 VE2 Semiconductor Group 13 0 1 2 3 4 5 V 6 V E2 1998-11-01 TLE 4267 Package Outlines P-TO220-7-3 (Plastic Transistor Single Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information” Dimensions in mm Semiconductor Group 14 1998-11-01 TLE 4267 P-TO220-7-180 (Plastic Transistor Single Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information” Dimensions in mm SMD = Surface Mounted Device Semiconductor Group 15 1998-11-01 TLE 4267 P-TO220-7-230 (Plastic Transistor Single Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information” Dimensions in mm Semiconductor Group 16 1998-11-01