PD - 91841C
IRLBA3803
HEXFET® Power MOSFET
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Logic-Level Gate Drive
Advanced Process Technology
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Purchase IRLBA3803/P for solder plated option.
D
VDSS = 30V
RDS(on) = 0.005Ω
G
ID = 179AV
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized device design that HEXFET
Power MOSFETs are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of applications.
The Super-220 is a package that has been designed to have the same mechanical
outline and pinout as the industry standard TO-220 but can house a considerably
larger silicon die. It has increased current handling capability over both the TO-220
and the much larger TO-247 package. This makes it ideal to reduce component
count in multiparalled TO-220 applications, reduce system power dissipation,
upgrade existing designs or have TO-247 performance in a TO-220 outline.
Super - 220
This package has also been designed to meet automotive qualification standard
Q101.
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current Q
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche EnergyRU
Avalanche CurrentQU
Repetitive Avalanche EnergyQ
Peak Diode Recovery dv/dt SU
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Recommended clip force
179 V
126V
720
270
1.8
±16
610
71
27
5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
20
N
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.5
–––
0.55
–––
58
°C/W
1
05/20/02
IRLBA3803
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
30
–––
–––
–––
1.0
55
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.052
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
230
29
35
LD
Internal Drain Inductance
–––
2.0
LS
Internal Source Inductance
–––
5.0
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
5000
1800
880
V(BR)DSS
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mAU
0.005
VGS = 10V, ID = 71AT
Ω
0.009
VGS = 4.5V, ID = 59A T
V
VDS = V GS, ID = 250µA
–––
S
VDS = 25V, ID = 71AU
25
VDS = 30V, VGS = 0V
µA
250
VDS = 24V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
140
ID = 71A
41
nC VDS = 24V
78
VGS = 4.5V, See Fig. 6 and 13TU
–––
VDD = 15V
–––
ID = 71A
–––
RG = 1.3Ω
–––
RD = 0.20Ω, See Fig. 10 TU
D
Between lead,
–––
nH
6mm (0.25in.)
G
from package
–––
S
and center of die contact
–––
VGS = 0V
–––
pF
VDS = 25V
–––
ƒ = 1.0MHz, See Fig. 5U
Source-Drain Ratings and Characteristics
IS
I SM
VSD
trr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)Q
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 179V
showing the
A
G
integral reverse
––– ––– 720
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS = 71A, VGS = 0VT
––– 120 180
ns
TJ = 25°C, IF = 71A
––– 450 680
nC di/dt = 100A/µs TU
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Q Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
R VDD = 15V, starting TJ = 25°C, L = 180µH
RG = 25Ω, IAS = 71A. (See Figure 12)
S ISD ≤ 71A, di/dt ≤ 130A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
2
T Pulse width ≤ 300µs; duty cycle ≤ 2%.
U Uses IRL3803 data and test conditions.
V Calculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
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IRLBA3803
1000
1000
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
100
2.7V
10
0.1
1
100
20µs PULSE WIDTH
T = 25 C
2.7V
20µs PULSE WIDTH
T = 175 C
°
J
10
°
J
10
0.1
100
1
10
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
TJ = 25 ° C
TJ = 175 ° C
100
V DS = 25V
20µs PULSE WIDTH
10
2.0
4.0
6.0
8.0
10.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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R D S (on ) , D rain-to-S ource O n R esistance
(N orm alized)
I D , Drain-to-Source Current (A)
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
I D = 1 20 A
1.5
1.0
0.5
V G S = 10 V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRLBA3803
8000
V GS
C iss
C
C iss C rs s
o ss
6000
C oss
=
=
=
=
15
0V ,
f = 1MHz
C g s + C g d , C d s S H O R TE D
C gd
C ds + C g d
V G S , G ate-to-S ource V oltage (V )
C , Capacitance (pF)
10000
4000
C rss
2000
0
10
V D S = 24 V
V D S = 15 V
12
9
6
3
FO R TE S T C IRC UIT
S E E FIG U R E 1 3
0
A
1
I D = 71 A
100
0
40
V D S , D rain-to-S ourc e V oltage (V )
80
120
160
A
200
Q G , T otal G ate C harge (nC )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
1000
OPERATION IN THIS AREA LIMITED
BY R
TJ = 175 ° C
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
DS(on)
100
1000
TJ = 25 ° C
10
1
0.4
100us
100
V GS = 0 V
0.8
1.2
1.6
2.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10us
2.4
1ms
10
TC = 25 ° C
TJ = 175 ° C
Single Pulse
1
10ms
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRLBA3803
200
LIMITED BY PACKAGE
RD
V DS
VGS
160
D.U.T.
I D , Drain Current (A)
RG
+
V
- DD
120
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
80
Fig 10a. Switching Time Test Circuit
40
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.01
P DM
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLBA3803
1 5V
D R IV E R
L
VDS
D .U .T
RG
+
V
- DD
IA S
20V
tp
0 .0 1 Ω
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
A
E A S , S ingle P ulse A valanche E nergy (m J)
1500
TO P
B O TTO M
1200
ID
29 A
5 0A
71 A
900
600
300
0
V D D = 15 V
25
50
A
75
100
125
150
175
S tarting T J , J unc tion T em perature (°C )
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
4.5
V
QGS
12V
.2µF
.3µF
QGD
D.U.T.
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRLBA3803
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
S
+
R
-
-
T
+
Q
•
•
•
•
RG
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
V DD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRLBA3803
Super-220 Package Outline
Super-220 package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.05/02
8
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