IRF IRFI3205PBF

PD - 95040
IRFI3205PbF
Advanced Process Technology
l Ultra Low On-Resistance
l Isolated Package
l High Voltage Isolation = 2.5KVRMS …
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
l Lead-Free
Description
HEXFET® Power MOSFET
l
D
VDSS = 55V
RDS(on) = 0.008Ω
G
ID = 64A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
V GS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current †
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚†
Avalanche Current†
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt Ġ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
64
45
390
63
0.42
± 20
480
59
6.3
5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
2.4
65
°C/W
°C/W
2/24/04
IRFI3205PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
–––
–––
2.0
42
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.057
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
100
43
70
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
–––
–––
4000
1300
480
12
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA†
0.008
Ω
VGS = 10V, ID = 34A „
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 59A†
25
VDS = 55V, VGS = 0V
µA
250
VDS = 44V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
170
ID = 59A
32
nC
VDS = 44V
74
VGS = 10V, See Fig. 6 and 13 „†
–––
VDD = 28V
–––
ID = 59A
ns
–––
RG = 2.5Ω
–––
RD = 0.39Ω, See Fig. 10 „†
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
V
DS = 25V
pF
–––
ƒ = 1.0MHz, See Fig. 5†
–––
ƒ = 1.0MHz
D
S
Source-Drain Ratings and Characteristics
IS
I SM
VSD
t rr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) †
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
64
––– –––
showing the
A
G
integral reverse
––– ––– 390
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS = 34A, VGS = 0V „
––– 110 170
ns
TJ = 25°C, IF = 59A
––– 450 680
µC di/dt = 100A/µs „†
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
‚ VDD = 25V, starting TJ = 25°C, L = 190µH
… t=60s, ƒ=60Hz
ƒ ISD ≤ 59A, di/dt ≤ 290A/µs, VDD ≤ V(BR)DSS,
† Uses IRF3205 data and test conditions
max. junction temperature. ( See fig. 11 )
RG = 25Ω, IAS = 59A. (See Figure 12)
T J ≤ 175°C
IRFI3205PbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
100
4.5V
20µs PULSE WIDTH
TTCJ = 25°C
10
0.1
1
10
A
100
4.5V
100
2.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
V DS = 25V
20µs PULSE WIDTH
5
6
7
8
9
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
10
100
A
Fig 2. Typical Output Characteristics
1000
1
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
20µs PULSE WIDTH
TTCJ = 175°C
10
0.1
VDS , Drain-to-Source Voltage (V)
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
TOP
10
A
I D = 98A
1.5
1.0
0.5
VGS = 10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFI3205PbF
8000
6000
V GS , Gate-to-Source Voltage (V)
7000
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = Cds + C gd
I D = 59A
V DS = 44V
V DS = 28V
V DS = 11V
16
Ciss
5000
12
Coss
4000
3000
2000
Crss
1000
0
1
10
100
A
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
VDS , Drain-to-Source Voltage (V)
60
90
120
150
180
A
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
10µs
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
30
TJ = 175°C
100
TJ = 25°C
VGS = 0V
10
0.6
1.0
1.4
1.8
2.2
2.6
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
3.0
100
100µs
1ms
10
10ms
TC = 25°C
TJ = 175°C
Single Pulse
1
1
10
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
A
100
IRFI3205PbF
70
60
ID , Drain Current (A)
RD
V DS
VGS
RG
50
40
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
30
Fig 10a. Switching Time Test Circuit
20
VDS
10
90%
0
25
50
75
100
125
150
TC , Case Temperature ( ° C)
175
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
PDM
0.05
0.1
t1
0.02
t2
0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
10
L
VDS
D.U.T.
RG
+
V
- DD
IAS
10 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
EAS , Single Pulse Avalanche Energy (mJ)
IRFI3205PbF
1200
TOP
1000
BOTTOM
800
600
400
200
0
VDD = 25V
25
tp
VDD
ID
24A
42A
59A
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
A
175
IRFI3205PbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
Period
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRFI3205PbF
TO-220 Full-Pak Package Outline
Dimensions are shown in millimeters (inches)
TO-220 Full-Pak Part Marking Information
E X AM P L E :
T H IS IS AN IR F I8 4 0 G
W IT H AS S E M B L Y
L OT C OD E 3 4 3 2
AS S E M B L E D ON W W 2 4 1 9 9 9
IN T H E AS S E M B L Y L IN E "K "
Note: "P" in assembly line
position indicates "Lead-Free"
IN T E R N AT IO N AL
R E CT IF IE R
L OGO
AS S E M B L Y
L OT C OD E
P AR T N U M B E R
IR F I8 40 G
924 K
34
32
D AT E C O D E
Y E AR 9 = 1 9 9 9
WE E K 24
L IN E K
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/04
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/