INTEGRATED CIRCUITS 74LVC157A Quad 2-input multiplexer Product specification Supercedes data of 1997 Nov 07 IC24 Data Handbook 1998 Jul 29 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A input (S). The four outputs present the selected data in the true (non-inverted) form. The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74LV157. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. FEATURES • Wide supply voltage range of 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A • CMOS lower power consumption • Direct interface with TTL levels • 5 Volt tolerant inputs, for interfacing with 5 Volt logic The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. DESCRIPTION The 74LVC157A is a high-performance, low-power, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC157A is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC157A is a quad 2-input multiplexer which select 4 bits of data from two sources under the control of a common data select QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns PARAMETER SYMBOL tPHL/tPLH Propagation delay nl0, nl1, to nY E to nY S to nY CI Input capacitance CPD CONDITIONS TYPICAL 3.1 3.0 3.3 CL = 50 pF; VCC = 3.3 V Power dissipation capacitance per gate UNIT VI = GND to VCC1 ns 5.0 pF 33 pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi Σ (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; Σ (CL × VCC2 × fo) = sum of the outputs. ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 16-Pin Plastic SO PACKAGES –40°C to +85°C 74LVC157A D 74LVC157A D SOT109-1 16-Pin Plastic SSOP Type II –40°C to +85°C 74LVC157A DB 74LVC157A DB SOT338-1 16-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC157A PW 74LVC157APW DH SOT403-1 PIN CONFIGURATION S 1I 1I 0 1 1Y 2I 2I 0 1 PIN DESCRIPTION 1 16 V CC 2 15 E 3 14 4I 4 13 4I PIN NUMBER 0 1 5 12 4Y 6 11 3I SYMBOL FUNCTION 1 S Common data select input 2, 5, 11, 14 1l0 to 4l0 Data inputs from sources 0 3, 6, 10, 13 1l1 to 4l1 Data inputs from sources 1 4, 7, 9, 12 1Y to 4Y Multiplexer outputs 8 GND Ground (0 V) 0 15 E Enable input (active LOW) 1 16 VCC Positive supply voltage 2Y 7 10 3I GND 8 9 3Y SV00563 1998 Jul 29 2 853-1945 19802 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A LOGIC SYMBOL FUNCTIONAL DIAGRAM 2 1I0 1 S 15 E 3 1I1 6 5 2I0 1Y 2I1 2Y 4 7 11 3I0 3Y 9 10 3I1 14 4I0 13 2 1I 0 3 1I 1 5 2I 0 6 2I 1 11 3I 0 10 3I 1 14 4I 0 13 4I 1 4I1 4Y 12 SV00564 1 15 4 2Y 7 3Y 9 4Y 12 MULTIPLEXER OUTPUTS SELECTOR LOGIC SYMBOL (IEEE/IEC) 1Y S E 1 15 G1 SV00566 EN FUNCTION TABLE 2 3 INPUTS 1 OUTPUTS MUX 4 1 5 7 6 11 9 E S nl0 nl1 nY H X X X L L L L L L L H H L H X X X X L H L H L H NOTES: H = HIGH voltage level L = LOW voltage level X = don’t care 10 14 12 13 LOGIC DIAGRAM SV00565 S E 1I1 1Y 1I0 2I1 2Y 2I0 3I1 3Y 3I0 4I1 4Y 4I0 SV00581 1998 Jul 29 3 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER CONDITIONS MIN MAX DC supply voltage (for max. speed performance) 2.7 3.6 DC supply voltage (for low-voltage applications) 1.2 3.6 UNIT V VI DC input voltage range 0 5.5 V VO DC output voltage range 0 VCC V –40 +85 °C 0 0 20 10 ns/V Tamb tr, tf Operating free-air temperature range VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V Input rise and fall times ABSOLUTE MAXIMUM RATINGS1 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V). SYMBOL VCC PARAMETER CONDITIONS DC supply voltage RATING UNIT –0.5 to +6.5 V IIK DC input diode current VI t 0 –50 mA VI DC input voltage Note 2 –0.5 to +5.5 V IOK DC output diode current VO uVCC or VO t 0 "50 mA VO DC output voltage Note 2 IO DC output diode current VO = 0 to VCC IGND, ICC DC VCC or GND current Tstg PTOT Storage temperature range Power dissipation per package – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP) above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K –0.5 to VCC +0.5 V "50 mA "100 mA –65 to +150 °C 500 500 mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Jul 29 4 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIH HIGH level Input voltage VIL LOW level Input voltage VOH O VCC = 1.2V VCC VCC = 2.7 to 3.6V 2.0 TYP1 V VCC = 1.2V GND V VCC = 2.7 to 3.6V HIGH level output voltage 0.8 VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC*0.5 VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC*0.2 VCC = 3.0V; VI = VIH or VIL; IO = –18mA VCC*0.6 VCC = 3.0V; VI = VIH or VIL; IO = –24mA VCC*0.8 VCC V VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOL 0.40 VCC = 3.0V; VI = VIH or VIL; IO = 100µA LOW level output voltage GND VCC = 3.0V; VI = VIH or VIL; IO = 24mA II ICC ∆ICC UNIT MAX 0.20 V 0.55 Input leakage current VCC = 3 3.6V; 6V; VI = 5 5.5V 5V or GND Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 Additional quiescent supply current per input pin VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 "0 1 "0.1 "5 µA 0.1 10 µA 5 500 µA NOTE: 1. All typical values are measured at VCC = 3.3V and Tamb = 25°C. AC CHARACTERISTICS GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF; RL = 500; Tamb = –40C to +85C LIMITS SYMBOL PARAMETER VCC = 3.3V ±0.3V WAVEFORM VCC = 2.7V VCC = 1.2V MIN TYP1 MAX MIN MAX TYP UNIT tPHL/tPLH Propagation delay nl0 to nY; nl1 to nY Figure 2, 3 1.5 3.1 5.7 1.5 6.7 12 ns tPHL/tPLH Propagation delay E to nY Figure 1, 3 1.5 3.0 6.3 1.5 7.3 11 ns tPHL/tPLH Propagation delay S to nY Figure 2, 3 1.5 3.3 6.8 1.5 7.8 13 ns NOTE: 1. These typical values are at VCC = 3.3V and Tamb = 25°C. 1998 Jul 29 5 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A AC WAVEFORMS TEST CIRCUIT VM = 0.5 × VCC at VCC < 2.7 V VM = 1.5 V at VCC ≥ 2.7 V VX = VOL + 0.3 V at VCC ≥ 2.7 V VX = VOL + 0.1 × VCC at VCC < 2.7 V VY = VOH – 0.3 V at VCC ≥ 2.7V VY = VOH – 0.1 × VCC at VCC < 2.7 V VOL and VOH are the typical output voltage drop that occur with the output load. S1 VCC 500Ω VI VO PULSE GENERATOR D.U.T. 50pF RT CL VI E INPUT SWITCH POSITION t PHL TEST t PLH V OH tPLH/tPHL nY OUTPUTS VM V OL Open VCC VI < 2.7V VCC 2.7–3.6V 2.7V Figure 3. Load circuitry for switching times. Figure 1. Enable input (E) to output (nY) propagation delays. VI nI0, nI1, S INPUTS S1 SV00903 SV00561 VM GND t PHL t PLH V OH VM V OL SV00562 Figure 2. Data inputs (nI0, nI1) and common data select input (S) to output (nY) propagation delays. 1998 Jul 29 500Ω VM GND nY OUTPUT 2 * VCC Open GND 6 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A SO16: plastic small outline package; 16 leads; body width 3.9 mm 1998 Jul 29 7 SOT109-1 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm 1998 Jul 29 8 SOT338-1 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm 1998 Jul 29 9 SOT403-1 Philips Semiconductors Product specification Quad 2-input multiplexer 74LVC157A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 10 Date of release: 08-98 9297-750-04495