CY3210-28XXX EvalPod Schematic.pdf

5
4
3
2
1
1
C1
C2
3528
0.1 uFd
0603
2
2
0603
C3
+
0.1 uFd
10 uFd 16v
VCC
2
R1
1
Be aware when
measuring current that
this resistor may need
to be removed.
VCC
1
VCC
D1
0603
1206
56
LED Green
R2
1
2
OCD_DE
1
R3
1K
NO LOAD
VCC
R4
2
OCD_DO
1
R5
1K
NO LOAD
U2
VCC
19
R6
1
2
1
56.2
C7
R7
1K
NO LOAD
24
4
25
3
26
2
27
1
XRES
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
1
2
0603
1
2
0603
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
OCD_CCLK
0603
VCC
SMP
0603
9
SMP
GND2
2
C8
0.1 uFd
OCD_HCLK
OCD_CCLK
42
43
OCD_RESET
41
OCDE
OCDO
HCLK
CCLK
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
20
8
21
7
22
6
23
5
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
52
5
53
4
54
3
55
2
XRES
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
48
9
49
8
50
7
51
6
SMP
16
TV1
TV2
TV3
TV4
1
25
29
30
D
CY8C28000-24PVXI
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
P3_6
P3_7
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
P4_0
P4_1
P4_2
P4_3
P4_4
P4_5
P4_6
P4_7
SMP
P5_0
P5_1
P5_2
P5_3
NC1
NC2
NC3
NC4
31
27
32
26
33
24
34
23
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
37
20
38
19
39
18
40
17
P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
P3_6
P3_7
44
13
45
12
46
11
47
10
P4_0
P4_1
P4_2
P4_3
P4_4
P4_5
P4_6
P4_7
35
22
36
21
P5_0
P5_1
P5_2
P5_3
P1
P3_7
P3_5
P3_3
P3_1
P4_7
P4_5
P4_3
P4_1
P5_3
P5_1
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
RECEPTACLE 10x1
C
P2
P3_6
P3_4
P3_2
P3_0
P4_6
P4_4
P4_2
P4_0
P5_2
P5_0
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
RECEPTACLE 10x1
U1
P2_[0:7]
8
7
6
5
4
3
2
1
C9
330 pFd
R8
1K
28 DIP Socket
B
P1_[0:7]
2
2
0603
0603
1
P3
R9
1
C10
56.2
1
2OCD_HCLK
1
0603
B
14
1
OCD_RESET
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
15
13
16
12
17
11
18
10
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
28
C6
2
2
0603
0603
1
0603
C
56.2
28
1
14
15
P0_[0:7]
2
2
C4
0603
1
0603
0603
56.2
OCD_DE
OCD_DO
VDD
1
1K
VSS
2
D
RJ45 Right Angle
R10
1K
NO LOAD
2
0603
2
0603
NOTE: RJ45 pinout assumes a
straight-through connector
will be used.
VCC
1
P1_[0:7]
0603
2
A
C11
TP1
TP-43R
0.1 uFd
TP2
TP-43R
PCB:
PCA:
VCC
PDCR-9310 REV*B
121R-31002 REV**
A
J1
1
2
3
4
5
1
2
3
4
5
CYPRESS SEMICONDUCTOR © 2005
OCD_RESET
P1_1
P1_0
Title
CY8C28000 28 PDIP Module
TP3
TP-43R
HDR 1x5
Programming header
Size
B
Test points
Date:
5
4
3
2
Document Number
REF-15039
Wednesday, November 19, 2008
Rev
**
Sheet
1
of
1
1
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