Supertex inc. TN0110 N-Channel Enhancement-Mode Vertical DMOS FET Features ►► ►► ►► ►► ►► ►► ►► General Description Low threshold - 2.0V max. High input impedance Low input capacitance - 50pF typical Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Applications ►► ►► ►► ►► ►► ►► ►► Logic level interfaces – ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Ordering Information Product Summary Part Number Package Option Packing TN0110N3-G TN0110N3-G P002 TO-92 1000/Bag TO-92 2000/Reel TN0110N3-G P003 TN0110N3-G P005 TN0110N3-G P013 BVDSS/BVDGS 100V RDS(ON) ID(ON) VGS(th) 2.0A 2.0V (min) (max) 3.0Ω (max) Pin Configuration TN0110N3-G P014 -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. DRAIN SOURCE Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55OC to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package θja TO-92 132OC/W Doc.# DSFP-TN0110 C080813 GATE TO-92 Product Marking SiTN 0 1 1 0 YYWW YY = Year Sealed WW = Week Sealed = “Green” Packaging Package may or may not include the following marks: Si or TO-92 Supertex inc. www.supertex.com TN0110 Thermal Characteristics ID Package TO-92 (continuous)† ID Power Dissipation (pulsed) @TC = 25OC 350mA 2.0A 1.0W IDR† IDRM 350mA 2.0A Notes: † ID (continuous) is limited by max rated Tj . Electrical Characteristics (T A = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage 100 - - V VGS = 0V, ID = 1.0mA VGS(th) Gate threshold voltage 0.6 - 2.0 V VGS = VDS, ID= 0.5mA Change in VGS(th) with temperature - -3.2 -5.0 IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V - - 10 µA IDSS Zero Gate voltage drain current VGS = 0V, VDS = Max Rating - - 500 µA VGS = 0V, VDS = 0.8 Max Rating, TA = 125°C ID(ON) ON-state drain current 0.75 1.4 - 2.0 3.4 - - 2.0 4.5 - 1.6 3.0 - 0.6 1.1 225 400 - ΔVGS(th) RDS(ON) ΔRDS(ON) Static drain-to-source on-state resistance Change in RDS(ON) with temperature Conditions mV/ C VGS = VDS, ID= 1.0mA O A Ω %/OC VGS = 5.0V, VDS = 25V VGS = 10V, VDS = 25V VGS = 4.5V, ID = 250mA VGS = 10V, ID = 500mA VGS = 10V, ID = 500mA GFS Forward transductance CISS Input capacitance - 50 60 COSS Common source output capacitance - 25 35 CRSS Reverse transfer capacitance - 4.0 8.0 td(ON) Turn-on delay time - 2.0 5.0 Rise time - 3.0 5.0 Turn-off delay time - 6.0 7.0 Fall time - 3.0 6.0 1.0 1.5 V VGS = 0V, ISD = 500mA 400 - ns VGS = 0V, ISD = 500mA tr td(OFF) tf VSD trr Diode forward voltage drop Reverse recovery time - mmho VDS = 25V, ID = 500mA pF ns VGS = 0V, VDS = 25V, f = 1.0MHz VDD = 25V, ID = 1.0A, RGEN = 25Ω Notes: 1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 10V INPUT 0V Pulse Generator 10% t(ON) td(ON) VDD OUTPUT 0V Doc.# DSFP-TN0110 C080813 VDD 90% t(OFF) tr td(OFF) OUTPUT RGEN tf 10% 10% 90% RL INPUT D.U.T. 90% 2 Supertex inc. www.supertex.com TN0110 Typical Performance Curves Output Characteristics 5.0 4.0 4.0 ID (amperes) ID (amperes) VGS = 10V 3.0 8V 2.0 6V 1.0 10 20 30 40 VDS (volts) 2V VGS = 10V 3.0 8V 2.0 6V 1.0 4V 0 0 Saturation Characteristics 5.0 4V 2V 0 0 50 2.0 4.0 6.0 8.0 10 VDS (volts) Transconductance vs. Drain Current 0.5 Power Dissipation vs. Case Temperature 2.0 TA = -55OC 0.4 0.3 PD (watts) GFS (siemens) TA = 25OC TA = 150OC 0.2 TO-92 1.0 0.1 0 VDS = 25V 0 0.6 1.2 1.8 2.4 0 3.0 0 25 50 ID (amperes) Maximum Rated Safe Operating Area 10 1.0 Thermal Resistance (normalized) TC = 25OC ID (amperes) TO-92 (pulsed) 1.0 TO-92 (DC) 0.1 0.01 1.0 10 100 100 125 150 Thermal Response Characteristics 0.8 0.6 0.4 TO-92 TC = 25OC PD = 1W 0.2 0 0.001 1000 0.01 0.1 1.0 10 tp (seconds) VDS (volts) Doc.# DSFP-TN0110 C080813 75 TC (OC) 3 Supertex inc. www.supertex.com TN0110 Typical Performance Curves (cont.) BVDSS Variation with Temperature 1.3 RDS(ON) (ohms) 1.0 2.0 1.0 0.9 0.8 -50 3.0 0 50 100 0 150 1.0 2.0 3.0 4.0 5.0 Tj ( C) ID (amperes) Transfer Characteristics V(th) and RDS Variation with Temperature 1.4 VDS = 25V TA = -55OC VGS(th) (normalized) 1.2 25OC 1.8 150OC 1.2 0.6 0 0 O 2.4 ID (amperes) 3.0 2.0 4.0 6.0 8.0 1.4 V(th) @ 0.5mA 1.0 0.8 0.8 0.6 0.6 0 50 VGS (volts) 0.4 150 100 Tj (OC) Capacitance vs. Drain-to-Source Voltage 100 1.0 RDS(ON) @ 10V, 0.5A 0.4 -50 10 1.2 RDS(ON) (normalized) BVDSS (normalized) 1.1 VGS = 10V VGS = 5.0V 4.0 1.2 0 On-Resistance vs. Drain Current 5.0 Gate Drive Dynamic Characteristics 10 f = 1.0MHz VDS = 10V 8.0 VGS (volts) C (picofarads) 75 CISS 50 VDS = 40V 55pF 6.0 4.0 COSS 25 2.0 CRSS 0 0 10 20 30 0 0 40 VDS (volts) Doc.# DSFP-TN0110 C080813 50pF 1.0 2.0 3.0 4.0 5.0 QG (nanocoulombs) 4 Supertex inc. www.supertex.com TN0110 3-Lead TO-92 Package Outline (N3) D A Seating Plane 1 2 3 L c b e1 e Side View Front View E1 E 1 3 2 Bottom View Symbol Dimensions (inches) A b c MIN .170 .014 NOM - - MAX .210 .022 † .014 † D E E1 e e1 L .175 .125 .080 .095 .045 .500 - - - - - - .205 .165 .105 .105 .055 .610* † .022 † JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TN0110 C080813 5 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com