INTEGRATED CIRCUITS DATA SHEET TDA8576T Class-H high-output voltage level line driver Product specification Supersedes data of 1997 Feb 26 File under Integrated Circuits, IC01 1998 Oct 16 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T With a supply voltage of 9 V the output voltage swing over the load will be more than 14 V (peak-to-peak). The TDA8576T is available in a SO16 package. FEATURES • Output voltage swing larger than supply voltage • High supply voltage ripple rejection Line drivers are necessary in car audio systems in which the power amplifiers are driven by long cables. The signal-to-noise ratio of these car audio systems is improved by using the TDA8576T class-H high-output level line driver. The high-output level of TDA8576T enables a reduction of the gain of the power amplifier resulting in an improvement of the power amplifier performance. • Low distortion • Low noise • ESD protected on all pins. GENERAL DESCRIPTION The TDA8576T is a two channel class-H high-output voltage line driver for use in car audio applications. The line driver operates as a non-inverting amplifier with a gain of 6 dB and a single-ended output. Due to the class-H voltage lifting principle the voltage swing over the load is more than the supply voltage. QUICK REFERENCE DATA SYMBOL PARAMETER VCC supply voltage CONDITIONS MIN. TYP. MAX. UNIT 6 9 12 V ICC supply current − 14 20 mA Gv voltage gain 5 6 7 dB Vo(rms) maximum output voltage (RMS value) THD = 0.1% 5.0 5.3 − V VCC = 9 V 40 65 − dB − 0.005 − % noise output voltage − 5 − µV output impedance − − 10 Ω SVRR supply voltage ripple rejection THD total harmonic distortion Vno Zo Vo(rms) = 3 V; f = 1 kHz ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8576T SO16 1998 Oct 16 DESCRIPTION plastic small outline package; 16 leads; body width 7.5 mm 2 VERSION SOT162-1 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T BLOCK DIAGRAM handbook, full pagewidth VCCL 1 36 kΩ BUFFER 36 kΩ SVRL 3 − + BUFFER REFERENCE INML INMR INR SIGNAL AMP. 13 14 4 OUTL 11 7 6 LGND 5Ω TDA8576T 5 RGND VCCR − + 12 OUTR SIGNAL AMP. 20 kΩ + − 36 kΩ BUFFER LIFT AMP. VCCR 10 9 36 kΩ 8 MGE671 Fig.1 Block diagram. 1998 Oct 16 CL− LIFT AMP. 2 BUFFER VCCR CL+ VCCL REFERENCE SVRR 15 20 kΩ + − INL 16 VCCL 3 CR− CR+ Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T PINNING SYMBOL PIN DESCRIPTION VCCL 1 supply voltage left channel INL 2 input voltage left channel SVRL 3 SVRR left channel INML 4 inverting input left channel INMR 5 inverting input right channel SVRR 6 INR 7 handbook, halfpage VCCL 1 16 CL+ INL 2 15 CL− SVRR right channel SVRL 3 14 LGND input voltage right channel INML 4 13 OUTL VCCR 8 supply voltage right channel CR+ 9 lift capacitor (+) right channel CR− 10 lift capacitor (−) right channel RGND 11 ground right channel OUTR 12 output voltage right channel OUTL 13 output voltage left channel LGND 14 ground left channel CL− 15 lift capacitor (−) left channel CL+ 16 lift capacitor (+) left channel TDA8576T 5 12 OUTR SVRR 6 11 RGND INR 7 10 CR− VCCR 8 9 CR+ MGE670 Fig.2 Pin configuration. The rail-to-rail output stage of the signal amplifier uses the lifted supply voltage to increase the output voltage swing. The DC output level is set to ≈0.87 × VCC. The maximum peak-to-peak output voltage of the signal amplifier is calculated with the formula: FUNCTIONAL DESCRIPTION Lift amplifier The lift amplifier, referred to as LIFT AMP. in Fig.1, is used as a non-inverting amplifier with a voltage gain of 6 dB set by an internal feedback network. If the output voltage of the signal amplifier is low, the external lift capacitor is recharged by the lift amplifier. As soon as the output voltage of the signal amplifier increases above 0.87 × VCC the lift amplifier switches the voltage of the lift capacitor in series with the supply voltage VCC. The voltage at the positive side of the lift capacitor is referred to as lifted supply voltage. Vo ( p – p) ( max ) ≈ 2 × ( 0.87V CC – 0.4 ) Buffers The buffers prevent loading of the internal voltage divider network made by a series connection of resistors. For a good supply voltage ripple rejection this internal voltage divider network has to be decoupled by an external capacitor. Signal amplifier Reference The signal amplifier, referred to as SIGNAL AMP. in Fig.1, is used as a non-inverting amplifier. The voltage gain Gv is set by the feedback resistors according to the formula: This circuit supplies all currents needed in the device. R G v = 1 + ------2R1 and should be set to 6 dB. The LIFT AMP. and SIGNAL AMP. must have equal voltage gain Gv. 1998 Oct 16 INMR 4 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T LIMITING VALUES In accordance with the Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage − 12 V IORM repetitive peak output current − 20 mA Tamb ambient temperature −40 +85 °C Tstg storage temperature −55 +150 °C Tj junction temperature − +150 °C operating THERMAL CHARACTERISTICS SYMBOL Rth j-a 1998 Oct 16 PARAMETER thermal resistance from junction to ambient in free air 5 VALUE UNIT 110 K/W Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T DC CHARACTERISTICS VCC = 9 V; RL = 10 kΩ; Tamb = 25 °C; in accordance with application diagram (see Fig.3). SYMBOL PARAMETER VCC supply voltage ICC supply current VO DC output voltage CONDITIONS Vi = 0 V note 1 MIN. TYP. MAX. UNIT 6 9 12 V − 14 20 mA − 7.8 − V Note 1. The DC output voltage with respect to ground is ≈0.87 × VCC. AC CHARACTERISTICS VCC = 9 V; RL = 10 kΩ; f = 1 kHz; Tamb = 25 °C; in accordance with application diagram (see Fig.3); note 1. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Gv voltage gain 5 6 7 dB ∆Gv channel unbalance − − 0.5 dB αcs channel separation Rs = 600 Ω; Vo(rms) = 1 V; note 1 80 90 − dB fIr low frequency roll-off −1 dB; note 2 − − 5 Hz fhr high frequency roll-off −1 dB 20 − − kHz Zi input impedance 14 20 28 kΩ Zo output impedance − − 10 Ω Vo(max)(rms) maximum output voltage (RMS value) THD + N = 0.1% 5.0 5.3 − V Vno noise input voltage unweighted; note 3 − 7 9 µV A-weighted; note 4 − 5 − µV f = 1 kHz; VO = 3 Vrms; note 5 − 0.005 0.01 % f = 17 Hz to 20 kHz; note 6 − 0.01 − % note 7 40 65 − dB f = 20 Hz to 20 kHz; note 8 − 55 − dB THD + N total harmonic distortion plus noise SVRR supply voltage ripple rejection Notes 1. The channel separation is determined by the parasitic capacitance between the inverting input left channel (pin 4) and the inverting input right channel (pin 5). The PCB layout has a major contribution to the parasitic capacitance. To obtain best results the PCB tracks to pin 4 and pin 5 should be separated as much as possible. 2. The frequency response is externally fixed by the input coupling capacitors. 3. Noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz with a source resistor Rs = 600 Ω. 4. Noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz with an A-weighted filter with a source resistor Rs = 600 Ω. 5. Distortion is measured at a frequency of 1 kHz using an A-weighted filter. 6. Distortion is measured at an output voltage of 3.0 V (RMS) at frequencies between 17 Hz and 20 kHz. 7. Ripple rejection is measured at the output, using a source resistor Rs = 600 Ω and a ripple amplitude of 100 mV (RMS) at a frequency of 1 kHz. 8. Ripple rejection is measured at the output, using a source resistor Rs = 600 Ω and a ripple amplitude of 100 mV (RMS) at frequencies between 20 Hz and 20 kHz. 1998 Oct 16 6 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T APPLICATION INFORMATION handbook, full pagewidth 36 kΩ 36 kΩ R1(1) R2(1) VCC VCCL 1 VCC C6 100 nF C5 1.5 nF 36 kΩ BUFFER 36 kΩ SVRL 3 − + BUFFER C4 100 µF 15 CL− LIFT AMP. 20 kΩ + − REFERENCE C1 16 CL+ VCCL SIGNAL AMP. C3 13 OUTL 22 µF VCCL RL 10 kΩ C5 1.5 nF RL 10 kΩ C5 1.5 nF INL 2 14 LGND INML 4 22 µF 5Ω TDA8576T INMR 5 C1 11 RGND INR 7 22 µF VCCR REFERENCE Rs Vi(L) − + Rs C3 12 OUTR SIGNAL AMP. 22 µF Vi(R) SVRR 6 20 kΩ BUFFER + − C2 47 µF 36 kΩ BUFFER LIFT AMP. VCCR 36 kΩ VCCR 8 10 CR− C4 100 µF 9 CR+ C5 1.5 nF VCC 36 kΩ 36 kΩ R1(1) R2(1) MGE672 (1) R1and R2 should have a tolerance of ≤ 1%. Fig.3 Application diagram. 1998 Oct 16 7 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T Printed Circuit Board (PCB) layout 64 handbook, full pagewidth 46.08 22 µF 22 µF OUTR OUTL 10 kΩ SGND 10 kΩ 22 µF SGND SO16 INR 36 kΩ 22 µF 36 kΩ INL 36 kΩ 36 kΩ RL 47 µF GND VCC MBH884 Dimensions in mm. IC mounted on track side, additional components mounted on component side. Tracks viewed from component side. Fig.4 Recommended PCB-layout. 1998 Oct 16 8 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T Application characteristics VCC = 9 V; RI = 10 kΩ; Tamb = 25 °C; 80 kHz filter. MGD912 1 MGD913 1 handbook, halfpage handbook, halfpage THD + N (%) THD + N (%) 10−1 10−1 Vo = 5 V 4V 3V 2V f = 10 kHz 10−2 10−2 1 kHz 100 Hz 10−3 Fig.5 10−3 0 2 4 V (V) o Total harmonic distortion plus noise as a function of Vo. Fig.6 MGD914 8 102 0 6 103 104 105 Total harmonic distortion plus noise as a function of frequency. MGD915 −40 handbook, halfpage f (Hz) handbook, halfpage G (dB) SVRR (dB) 6 −50 4 −60 2 −70 Rs = 600 Ω 0 10 102 103 104 105 f (Hz) −80 106 10 Fig.8 Fig.7 Total circuit gain as a function of frequency. 1998 Oct 16 9 0Ω 102 103 104 f (Hz) 105 Supply voltage ripple rejection as a function of frequency. Philips Semiconductors Product specification Class-H high-output voltage level line driver MGD916 −60 TDA8576T MGD917 −60 handbook, halfpage handbook, halfpage αcs (dB) αcs (dB) f = 10 kHz −80 −80 1V 1 kHz 100 Hz −100 3V −100 5V −120 −120 0 1 2 3 4 Vo (V) 10 5 103 104 f (Hz) Fig.10 Channel separation as a function of frequency. Fig.9 Channel separation as a function of Vo. 1998 Oct 16 102 10 105 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T PACKAGE OUTLINE SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 D E A X c HE y v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 10.5 10.1 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.41 0.40 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT162-1 075E03 MS-013AA 1998 Oct 16 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-24 97-05-22 11 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T SOLDERING Wave soldering Introduction Wave soldering techniques can be used for all SO packages if the following conditions are observed: There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The longitudinal axis of the package footprint must be parallel to the solder flow. • The package footprint must incorporate solder thieves at the downstream end. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all SO packages. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. 1998 Oct 16 12 Philips Semiconductors Product specification Class-H high-output voltage level line driver TDA8576T DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Oct 16 13 Philips Semiconductors Product specification Class-H high-output voltage level line driver NOTES 1998 Oct 16 14 TDA8576T Philips Semiconductors Product specification Class-H high-output voltage level line driver NOTES 1998 Oct 16 15 TDA8576T Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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