INTEGRATED CIRCUITS 74F670 4 x 4 register file (3-State) Product specification IC15 Data Handbook 1990 Jul 12 Philips Semiconductors Product specification 4 x 4 register file (3-State) 74F670 FEATURES PIN CONFIGURATION • Simultaneous and Independent Read and Write operations • Expandable to almost any word size and bit length • 3-State outputs DESCRIPTION The 74F670 is a 16-bit 3-State Register File organized as 4 words of 4 bits each. Separate Read and Write Address and Enable inputs are available, permitting simultaneous writing into one word location and reading from another location. The 4-bit word to be stored is presented to four data inputs. D1 1 16 VCC D2 2 15 D0 D3 3 14 WA RB 4 13 WB RA 5 12 WE Q3 6 11 RE Q2 7 10 Q0 GND 8 9 Q1 SF01178 The Write address inputs (WA and WB) determine the location of the stored word. The Write Address inputs should only be changed when the Write Enable input (WE) is High for conventional operation. When the WE is Low, the data is entered into the addressed location. The addressed location remains transparent to the data while the WE is Low. Data supplied at the inputs will be read out in true (non-inverting) form from the 3-State outputs. Data and address inputs are inhibited when the WE is High. Direct acquisition of data stored in any of the four registers is made possible by individual Read Address inputs (RA, RB). The addressed word appears at the four outputs when the Read Enable (RE) is Low. Data outputs are in the high impedance “off” state when the RE is High. This permits outputs to be tied together to increase the word capacity to very large numbers. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F670 6.5ns 50mA ORDERING INFORMATION DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 16-pin plastic DIP N74F670N SOT38-4 16-pin plastic SOL N74F670D SOT162-1 Up to 128 devices can be stacked to increase the word size to 512 locations by tying the 3-State outputs together. Since the limiting factor for expansion is the output High current, further stacking is possible by tying pullup reisistors to the outputs to increase the IOH current available. Design of the Read Enable signals for the stacked devices must ensure that there is no overlap in the Low levels which cause more than one output to be active at the same time. Parallel expansion to generate n-bit words is accomplished by driving the Enable and address inputs of each device in parallel. INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW D0 - D3 Data inputs 1.0/1.0 20µA/0.6mA WA, WB Write address inputs 1.0/1.0 20µA/0.6mA RA, RB Read address inputs 1.0/1.0 20µA/0.6mA WE Write Enable inputs 1.0/1.0 20mA/0.6mA RE Read Enable inputs 1.0/1.0 20mA/0.6mA Data output 150/40 3.0mA/24mA Q0–Q3 NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state. 1990 Jul 12 2 853-0014 99965 Philips Semiconductors Product specification 4 x 4 register file (3-State) 74F670 LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 14 13 5 4 15 1 2 3 RAM 4X4 14 0 13 WA WB RA RB D0 D1 D2 D3 1A 0 3 2A 0 3 1 5 0 WE 12 4 RE 11 12 Q0 10 Q2 Q1 7 9 Q3 11 15 6 VCC=Pin 16 GND=Pin 8 1 C4 [WRITE] EN [READ] 10 1A, 4D 1 SF01179 2A 9 2 7 3 6 SF01180 WORD SELECT FUNCTION TABLE WRITE MODE READ MODE WB WA RB RA L L L L L H L H L WRITE MODE FUNCTION TABLE INPUTS OPERATING MODE WE Dn INTERNAL LATCHES* Word 0 L L L H Word 1 L H H H L Word 2 H H H H = High voltage level L = Low voltage level H Word 3 Word Selected H L X Z * OUTPUT RE INTERNAL LATCHES* L L L L H H = = = = = OPERATING MODE Qn Read H X Z Disabled High voltage level Low voltage level Don’t care High impedance “off” state The selection of “internal latches” by Read Address (RA and RB) are not constrained by WE or RE operation. 1990 Jul 12 Write data H X NC Data latched H = High voltage level L = Low voltage level NC= No change X = Don’t care * = The write address (WA and WB) to the “internal latches” must be stabled while WE is Low for conventional operation. READ MODE FUNCTION TABLE INPUT OPERATING MODE 3 Philips Semiconductors Product specification 4 x 4 register file (3-State) 74F670 LOGIC DIAGRAM RE 11 RA 5 RB 4 WE 12 WB 13 WA 14 Q E D3 6 Q3 E D D D D Q Q Q Q E E 7 Q2 E D D D D Q Q Q Q 2 E D E D 9 Q1 E D D 1 Q E Q Q E D D0 E Q 3 E D1 Q E E D2 Q E D Q 10 Q0 E D D 15 VCC=Pin 16 GND=Pin 8 1990 Jul 12 SF01181 4 Philips Semiconductors Product specification 4 x 4 register file (3-State) 74F670 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT V VCC Supply voltage –0.5 to +7.0 VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 48 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL LIMITS PARAMETER MIN NOM MAX 5.0 5.5 UNIT VCC Supply voltage 4.5 V VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –3 mA IOL Low-level output current 24 mA Tamb Operating free-air temperature range 70 °C V 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL TEST CONDITIONSNO TAG PARAMETER MIN TYP NO TAG MAX UNIT VCC = MIN, VIL = MAX ±10%VCC 2.4 VIH = MIN, IOH = MAX ±5%VCC 2.7 VCC = MIN, VIL = MAX ±10%VCC 0.35 0.50 VIH = MIN, IOL = MAX ±5%VCC 0.35 0.50 –0.73 –1.2 V VCC = MAX, VI = 7.0V 100 µA VCC = MAX, VI = 2.7V 20 µA Low-level input current VCC = MAX, VI = 0.5V –0.6 mA IOZH Off state output current, High-level voltage applied VCC = MAX, VO = 2.7V 50 µA IOZL Off state output current, Low-level voltage applied VCC = MAX, VO = 0.5V –50 µA IOS Short-circuit output currentNO TAG VCC = MAX –150 mA 50 70 mA ICC Supply current (total) 50 70 mA 55 80 mA VOH O High level output voltage High-level VOL O Low level output voltage Low-level VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage IIH High-level input current IIL ICCH ICCL VCC = MAX ICCZ V 3.4 –60 V NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting 1990 Jul 12 5 Philips Semiconductors Product specification 4 x 4 register file (3-State) 74F670 of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER Tamb= +25°C +5 0V VCC = +5.0V CL = 50pF, RL = 500Ω TEST CONDITION Tamb = 0°C to +70°C +5 0V ± 10% VCC = +5.0V CL = 50pF, RL = 500Ω MIN TYP MAX MIN MAX UNIT tPLH tPHL Propagation delay RA, RB to Qn Waveform 3, 4 3.5 4.0 5.5 5.5 9.0 8.5 3.0 3.5 10.0 9.9 ns ns tPLH tPHL Propagation delay WE to Qn Waveform 1, 2 5.0 6.5 7.0 8.5 10.0 11.5 4.5 6.0 11.0 12.5 ns ns tPLH tPHL Propagation delay Dn to Qn Waveform 1, 2 3.5 6.0 6.0 8.0 8.5 11.0 3.0 5.5 9.5 12.5 ns ns tPZH tPZL RE Enable time Qn to High or Low level Waveform 5 Waveform 6 3.0 4.5 7.0 6.5 12.0 9.0 2.5 4.0 13.0 10.0 ns ns tPHZ tPLZ RE Disable time Qn to High or Low level Waveform 5 Waveform 6 2.0 3.0 3.0 5.0 6.5 8.5 1.5 3.0 7.5 8.5 ns ns AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = +5.0V CL = 50pF, RL = 500Ω TEST CONDITION MIN ts(H) ts(L) Setup time, High or Low Dn to positive going WE th(H) th(L) TYP MAX Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MIN UNIT MAX Waveform 3, 4 1.5 6.0 1.5 7.0 ns ns Hold time, High or Low Dn to positive going WE Waveform 3, 4 0 1.0 0 1.0 ns ns ts(H) ts(L) Setup time, High or Low WA, WB to negative going WE1 Waveform 3, 4 0 0 0 0 ns ns th(H) th(L) Hold time, High or Low WA, WB to negative going WE1 Waveform 3, 4 0 0 0 0 ns ns tw(L) WE Pulse width, Low Waveform 3, 4 6.5 8.5 ns NOTES: 1. Write Address (WA, WB) setup time will protect the data written into the previous address. If protection of data in the previous address is not required, setup time for Write Address to WE can be ignored. Any address selection sustained for the final 7ns of the WE pulse during hold time for Write Address to WE will result in data being written into that location. 1990 Jul 12 6 Philips Semiconductors Product specification 4 x 4 register file (3-State) 74F670 AC WAVEFORMS For all waveforms, VM=1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. VM Dn Dn VM WE tPLH Qn VM WE tPHL VM VM tPHL Qn VM tPLH VM VM SF01182 SF01183 Waveform 1. Propagation Delay, Write Enable and Data to Outptus WA, WB VM Waveform 2. Propagation Delay, Write Enable and Data to Outputs RA, RB VM ts VM tPHL th Dn VM VM VM ts th VM tPLH Qn VM tPLH VM tPHL tw(L) WE VM VM Qn VM SF01184 SF01185 Waveform 3. Setup and Hold Times for Write Address to Write Enable and Data to Write Enable Waveform 4. Propagation Delays for Read Address to Output RE RE VM tPHZ VM tPZL VOH -0.3V Qn tPLZ VM VM VOL +0.3V 0V SF01187 SF01186 Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level 1990 Jul 12 VM VM tPZH Qn VM Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 7 Philips Semiconductors Product specification 4 x 4 register file (3-State) 74F670 TEST CIRCUIT AND WAVEFORM VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for 3-State Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00777 1990 Jul 12 8 Philips Semiconductors Product specification Register file 74F670 DIP16: plastic dual in-line package; 16 leads (300 mil) 1990 Jul 12 9 SOT38-4 Philips Semiconductors Product specification Register file 74F670 SO16: plastic small outline package; 16 leads; body width 7.5 mm 1990 Jul 12 10 SOT162-1 Philips Semiconductors Product specification Register file 74F670 NOTES 1990 Jul 12 11 Philips Semiconductors Product specification Register file 74F670 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 10-98 9397-750-05172