IRF IRFPS38N60LPBF

PD - 95701
SMPS MOSFET
IRFPS38N60LPbF
HEXFET® Power MOSFET
Applications
• Zero Voltage Switching SMPS
• Telecom and Server Power Supplies
• Uninterruptible Power Supplies
• Motor Control applications
• Lead-Free
VDSS RDS(on) typ. Trr typ. ID
120mΩ
600V
170ns
Features and Benefits
• SuperFast body diode eliminates the need for external
diodes in ZVS applications.
• Lower Gate charge results in simpler drive requirements.
• Enhanced dv/dt capabilities offer improved ruggedness.
• Higher Gate voltage threshold offers improved noise immunity .
38A
SUPER TO-247AC
Absolute Maximum Ratings
ID @ TC = 25°C
Parameter
Continuous Drain Current, VGS @ 10V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
IDM
Pulsed Drain Current
PD @TC = 25°C Power Dissipation
c
VGS
dv/dt
TJ
Peak Diode Recovery dv/dt
Operating Junction and
TSTG
Storage Temperature Range
d
24
A
540
W
4.3
±30
W/°C
V
13
-55 to + 150
V/ns
°C
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw
1.1(10)
Diode Characteristics
Parameter
Units
150
Linear Derating Factor
Gate-to-Source Voltage
Symbol
Max.
38
N•m (lbf•in)
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
–––
–––
38
ISM
(Body Diode)
Pulsed Source Current
–––
–––
150
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 38A, VGS = 0V
c
MOSFET symbol
A
(Body Diode)
VSD
Diode Forward Voltage
–––
–––
1.5
V
trr
Reverse Recovery Time
–––
170
250
ns
–––
420
630
–––
830
1240
–––
2600 3900
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
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–––
9.1
14
nC
D
G
TJ = 25°C, IF = 38A
TJ = 125°C, di/dt = 100A/µs
f
S
f
T = 25°C, I = 38A, V = 0V f
T = 125°C, di/dt = 100A/µs f
J
S
GS
J
A
TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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9/10/04
IRFPS38N60LPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
∆V(BR)DSS/∆TJ
Drain-to-Source Breakdown Voltage
600
–––
–––
Breakdown Voltage Temp. Coefficient
–––
0.41
–––
V/°C Reference to 25°C, ID = 1mA
RDS(on)
Static Drain-to-Source On-Resistance
–––
120
150
VGS(th)
Gate Threshold Voltage
3.0
–––
5.0
mΩ
V
IDSS
Drain-to-Source Leakage Current
–––
–––
50
µA
VDS = 600V, VGS = 0V
–––
–––
2.0
mA
VDS = 480V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage
–––
–––
100
nA
VGS = 30V
Gate-to-Source Reverse Leakage
–––
–––
-100
Internal Gate Resistance
–––
1.2
–––
Ω
f = 1MHz, open drain
IGSS
RG
V
VGS = 0V, ID = 250µA
VGS = 10V, ID = 23A
f
VDS = VGS, ID = 250µA
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Forward Transconductance
Qgs
Gate-to-Source Charge
–––
–––
85
Qgd
Gate-to-Drain ("Miller") Charge
–––
–––
160
VGS = 10V, See Fig. 7 & 15
td(on)
Turn-On Delay Time
–––
44
–––
VDD = 300V
tr
Rise Time
–––
130
–––
td(off)
Turn-Off Delay Time
–––
92
–––
RG = 4.3Ω
tf
Fall Time
–––
69
–––
VGS = 10V, See Fig. 11a & 11b
Ciss
Input Capacitance
–––
7990
–––
VGS = 0V
Coss
Output Capacitance
–––
740
–––
Crss
Reverse Transfer Capacitance
–––
72
–––
Coss eff.
Effective Output Capacitance
–––
350
–––
Coss eff. (ER)
Effective Output Capacitance
–––
260
–––
Total Gate Charge
20
–––
–––
–––
–––
320
S
Conditions
gfs
Qg
VDS = 50V, ID = 23A
ID = 38A
nC
ns
VDS = 480V
f
ID = 38A
f
VDS = 25V
pF
ƒ = 1.0MHz, See Fig. 5
VGS = 0V,VDS = 0V to 480V
g
(Energy Related)
Avalanche Characteristics
Symbol
EAS
Parameter
Single Pulse Avalanche Energy
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
c
d
c
Typ.
–––
Max.
680
Units
mJ
–––
38
A
–––
54
mJ
Units
Thermal Resistance
Typ.
Max.
RθJC
Symbol
Junction-to-Case
Parameter
–––
0.22
RθCS
Case-to-Sink, Flat, Greased Surface
0.24
–––
RθJA
Junction-to-Ambient
–––
40
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
‚ Starting TJ = 25°C, L = 0.91mH, RG = 25Ω,
IAS = 38A, dv/dt = 13V/ns. (See Figure 12a)
ƒ ISD ≤ 38A, di/dt ≤ 630A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C.
2
°C/W
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% V DSS .
Coss eff.(ER) is a fixed capacitance that stores the same energy
as Coss while VDS is rising from 0 to 80% V DSS .
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IRFPS38N60LPbF
1000
1000
100
10
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1
0.1
4.5V
0.01
100
BOTTOM
10
4.5V
1
20µs PULSE WIDTH
Tj = 150°C
20µs PULSE WIDTH
Tj = 25°C
0.1
0.001
0.1
1
10
0.1
100
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
T J = 150°C
10
1
T J = 25°C
0.1
ID = 38A
2.5
VGS = 10V
2.0
(Normalized)
100
RDS(on) , Drain-to-Source On Resistance
1000
ID, Drain-to-Source Current (Α)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
1.5
1.0
0.5
0.0
0.01
4
6
8
10
12
14
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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16
-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
vs. Temperature
3
IRFPS38N60LPbF
50
100000
VGS
Ciss
Crss
Coss
45
40
Ciss
1000
35
Energy (µJ)
C, Capacitance(pF)
10000
= 0V,
f = 1 MHZ
= Cgs + Cgd , Cds SHORTED
= Cgd
= Cds + Cgd
Coss
30
25
20
15
100
10
Crss
5
0
10
1
10
100
0
1000
VDS , Drain-to-Source Voltage (V)
300
400
500
600
700
Fig 6. Typ. Output Capacitance
Stored Energy vs. VDS
1000.00
12.0
10.0
VDS= 480V
VDS= 300V
ISD, Reverse Drain Current (A)
ID= 38A
VGS , Gate-to-Source Voltage (V)
200
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
100.00
VDS= 120V
8.0
6.0
4.0
2.0
T J = 150°C
10.00
1.00
0.10
0.0
0
50
100
150
200
Q G Total Gate Charge (nC)
Fig 7. Typical Gate Charge vs.
Gate-to-Source Voltage
4
100
250
T J = 25°C
VGS = 0V
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VSD, Source-to-Drain Voltage (V)
Fig 8. Typical Source-Drain Diode
Forward Voltage
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IRFPS38N60LPbF
1000
40
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
35
100
ID, Drain Current (A)
30
100µsec
10
1msec
1
Tc = 25°C
Tj = 150°C
Single Pulse
10msec
25
20
15
10
5
0.1
0
1
10
100
1000
10000
25
VDS, Drain-to-Source Voltage (V)
VGS
RG
RD
100
125
150
Fig 10. Maximum Drain Current vs.
Case Temperature
VDS
90%
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 11a. Switching Time Test Circuit
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75
T C , Case Temperature (°C)
Fig 9. Maximum Safe Operating Area
VDS
50
10%
VGS
td(on)
tr
t d(off)
tf
Fig 11b. Switching Time Waveforms
5
IRFPS38N60LPbF
Thermal Response ( Z thJC )
1
0.1
D = 0.50
0.20
0.10
0.05
0.01
0.02
0.01
P DM
t1
0.001
t2
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty factor D =
2. Peak T
t1/ t 2
J = P DM x Z thJC
+T C
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
VGS(th) Gate threshold Voltage (V)
5.0
4.5
4.0
3.5
3.0
ID = 250µA
2.5
2.0
1.5
1.0
0.5
0.0
-75 -50 -25
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
Fig 13. Threshold Voltage vs. Temperature
6
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1
IRFPS38N60LPbF
EAS , Single Pulse Avalanche Energy (mJ)
1400
ID
TOP
17A
24A
BOTTOM 38A
1200
1000
800
600
400
200
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14a. Maximum Avalanche Energy
vs. Drain Current
15V
V(BR)DSS
DRIVER
L
VDS
D.U.T
RG
+
- VDD
IAS
20V
tp
tp
A
0.01Ω
I AS
Fig 14b. Unclamped Inductive Test Circuit
Fig 14c. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
VGS V
.2µF
.3µF
D.U.T.
QGS
+
V
- DS
QGD
VG
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
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Charge
Fig 15b. Basic Gate Charge Waveform
7
IRFPS38N60LPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 16. For N-Channel HEXFET® Power MOSFETs
8
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IRFPS38N60LPbF
Case Outline and Dimensions — Super-247
Super-247 (TO-274AA) Part Marking Information
E XA M P LE : TH
A S
A S
IN
IS IS
SE M
S E M
TH E
A N IR F P S 3 7 N 5 0 A W IT H
B LY LO T C O D E 1789
BLE D O N W W 19, 1997
A S S E M B L Y L IN E "C "
P A R T N U M B ER
IN T E R N A T IO N A L R E C T IF IE R
LO G O
IR F P S 3 7 N 5 0 A
7 19C
1 7
89
A SS E M BLY LO T C O D E
N o t e : " P " in a s s e m b ly lin e p o s it io n
in d ic a t e s " L e a d - F r e e "
TO P
D ATE C O D E
(Y Y W W )
Y Y = Y EA R
W W = W EE K
Super TO-247AC package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/04
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