MB39C605 Phase Dimmable PSR LED Driver IC for LED Lighting MB39C605 is a Primary Side Regulation (PSR) LED driver IC for LED lighting. Using the information of the primary peak current and the transformer-energy-zero time, it is able to deliver a well regulated current to the secondary side without using an opto-coupler in an isolated flyback topology. Operating in critical conduction mode, a smaller transformer is required. In addition, MB39C605 has a built-in phase dimmable circuit and can constitute the lighting system for phase dimming. It is most suitable for the general lighting applications, for example replacement of commercial and residential incandescent lamps. Features PSR topology in an isolated flyback circuit High efficiency (>80% : without dimmer) and low EMI by detecting transformer zero energy TRAIC Dimmable LED lighting Highly reliable protection functions Under voltage lock out (UVLO) voltage protection (OVP) Over current protection (OCP) Short circuit protection (SCP) Over temperature protection (OTP) Over Switching frequency setting : 30 kHz to 133 kHz Input voltage range VDD : 9V to 20V Input voltage for LED lighting applications : AC110VRMS, AC230VRMS Output power range for LED lighting applications : 5W to 10W Small Package : SOP-8 (3.9 mm × 5.05 mm × 1.75 mm[Max]) Applications Phase dimmable (Leading/Trailing) LED lighting LED lighting Online Design Simulation Easy DesignSim This product supports the web-based design simulation tool. It can easily select external components and can display useful information. Please access from the following URL. http://cypress.transim.com/login.aspx Cypress Semiconductor Corporation Document Number: 002-08444 Rev.*A • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised April 13, 2016 MB39C605 Contents 1. 2. 3. 4. 5. 6. 7. 8. 8.1 8.2 8.3 8.4 8.5 8.6 8.7 9. 10. 10.1 11. 12. 13. 14. 14.1 14.2 15. 16. 17. Pin Assignment ............................................................................................................................................................ 3 Pin Descriptions........................................................................................................................................................... 3 Block Diagram .............................................................................................................................................................. 4 Absolute Maximum Ratings ........................................................................................................................................ 5 Recommended Operating Conditions ........................................................................................................................ 6 Electrical Characteristics ............................................................................................................................................ 7 Standard Characteristics............................................................................................................................................. 9 Function Explanations............................................................................................................................................... 10 LED Current Control by PSR(Primary Side Regulation) .............................................................................................. 10 Dimming Function........................................................................................................................................................ 11 Power-On Sequence ................................................................................................................................................... 12 Power-Off Sequence ................................................................................................................................................... 13 IP_PEAK Detection Function ........................................................................................................................................... 13 Zero Voltage Switching Function ................................................................................................................................. 13 Protection Functions .................................................................................................................................................... 14 I/O Pin Equivalent Circuit Diagram ........................................................................................................................... 15 Application Examples ................................................................................................................................................ 17 5W Non-isolated Dimming Application ...................................................................................................................... 17 Usage Precautions ..................................................................................................................................................... 23 Ordering Information ................................................................................................................................................. 24 Marking Format .......................................................................................................................................................... 25 Recommended Mounting Condition [JEDEC Level3] Lead Free ........................................................................... 26 Recommended Reflow Condition ................................................................................................................................ 26 Reflow Profile .............................................................................................................................................................. 26 Package Dimensions ................................................................................................................................................. 27 Major Changes ........................................................................................................................................................... 28 Document History ...................................................................................................................................................... 29 Document Number: 002-08444 Rev.*A Page 2 of 30 MB39C605 1. Pin Assignment Figure 1-1. Pin Assignment (TOP VIEW) VDD 1 8 DRV TZE 2 7 GND 6 CS COMP 3 5 ADJ VAC 4 (FPT-8P-M02) 2. Pin Descriptions Table 2-1. Pin Descriptions Pin No. Pin Name I/O Description 1 VDD - Power supply pin. 2 TZE I Transformer Zero Energy detecting pin. 3 COMP O External Capacitor connection pin for the compensation. 4 VAC I Phase dimming control pin. 5 ADJ O Pin for adjusting the switch-on timing. 6 CS I Pin for detecting peak current of transformer primary winding. 7 GND - Ground pin. 8 DRV O External MOSFET gate connection pin. Document Number: 002-08444 Rev.*A Page 3 of 30 MB39C605 3. Block Diagram Figure 3-1. Block Diagram (Isolated Flyback Application) Phase Dimmer 4 VAC 1 VDD VAC Comp Err Ref generator Internal Bias Generator TZE 2 OVP Comp LEB UVLO TZE Comp Err Ref OTP Err Amp Ton Comp Driver PWM Control Logic COMP 3 OCP Comp DRV 8 LEB 6 CS ADJ 5 Current Calculator Sawtooth Generator Peak Current Detector Document Number: 002-08444 Rev.*A 7 GND Page 4 of 30 MB39C605 4. Absolute Maximum Ratings Table 4-1. Absolute Maximum Rating Parameter Power Supply Voltage Symbol Rating Condition Min Unit Max VVDD VDD pin -0.3 +25 V VCS CS pin -0.3 +6.0 V VTZE TZE pin -0.3 +6.0 V VVAC VAC pin -0.3 +6.0 V VDRV DRV pin -0.3 +25 V IADJ ADJ pin -1 - mA IDRV DRV pin -50 +50 mA Power Dissipation PD Ta≤+25°C - 800 (*1) mW Storage temperature TSTG - -55 +125 °C ESD Voltage 1 VESDH Human Body Model -2000 +2000 V ESD Voltage 2 VESDC Charged Device Model -1000 +1000 V Input Voltage Output Voltage Output Current DC level *1: The value when using two layers PCB. Reference: θja (wind speed 0m/s): +125°C/W Figure 4-1. Power Dissipation 1000 Power Dissipation [mW] 900 800 700 600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 150 Ta [°C] WARNING: 1. Semiconductor devices may be permanently damaged by application of stress (including, without limitation, voltage, current or temperature) in excess of absolute maximum ratings. Do not exceed any of these ratings. Document Number: 002-08444 Rev.*A Page 5 of 30 MB39C605 5. Recommended Operating Conditions Table 5-1. Recommended Operating Conditions Parameter Symbol Value Condition VDD pin Input Voltage VDD VDD pin VAC pin Input Voltage VVAC VAC pin VAC pin Input Current IVAC VAC pin TZE pin Resistance RTZE ADJ pin Resistance Min Typ Max Unit 9 - 20 V After UVLO release 0 - 5 V Before UVLO release 0 - 2.5 µA TZE pin 50 - 200 kΩ RADJ ADJ pin 9.3 - 185.5 kΩ COMP pin Capacitance CCOMP COMP pin - 0.01 - µF VDD pin Capacitance Operating Junction Temperature CBP Set between VDD pin and GND pin - 4.7 - µF Tj - -40 - +125 °C WARNING: 1. The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated under these conditions. 2. Any use of semiconductor devices will be under their recommended operating condition. 3. Operation under any conditions other than these conditions may adversely affect reliability of device and could result in device failure. 4. No warranty is made with respect to any use, operating conditions or combinations not represented on this data sheet. If you are considering application under any conditions other than listed herein, please contact sales representatives beforehand. Document Number: 002-08444 Rev.*A Page 6 of 30 MB39C605 6. Electrical Characteristics Table 6-1 . Electrical Characteristics (Ta = +25°C, VVDD = 12V) Parameter POWER SUPPLY CURRENT UVLO TRANSFORMER ZERO ENERGY DETECTION COMPENSATIO N DIMMING Symbol Pin Condition Min Value Typ Max Unit IVDD(STATIC) VDD VVDD = 20V, VTZE = 1V - 3 3.6 mA IVDD(OPERATING) VDD VVDD = 20V, Qg = 20 nC, fSW = 133 kHz - 5.6 - mA UVLO Turn-on threshold voltage VTH VDD - 12.25 13 13.75 V UVLO Turn-off threshold voltage VTL VDD - 7.55 7.9 8.5 V Startup current ISTART VDD VVDD = 7V - 65 160 µA Zero energy threshold voltage VTZETL TZE TZE = "H" to "L" - 20 - mV Zero energy threshold voltage VTZETH TZE TZE = "L" to "H" 0.6 0.7 0.8 V TZE clamp voltage VTZECLAMP TZE ITZE = -10 µA -200 -160 -100 mV OVP threshold voltage VTZEOVP TZE - 4.15 4.3 4.45 V OVP blanking time tOVPBLANK TZE - 0.6 1 1.7 µs TZE input current ITZE TZE VTZE = 5V -1 - +1 µA Source current ISO COMP VCOMP = 2V, VCS = 0V, VVAC = 1.85V - -27 - µA Trans conductance gm COMP VCOMP = 2.5V, VCS = 1V - 96 - µA/V VAC input current IVAC VAC VVAC = 5V -0.1 - +0.1 µA VACCMP threshold voltage VVACCMPVTH VAC - 135 150 165 mV VACCMP hysteresis VVACCMPHYS VAC - - 70 - mV ADJ voltage VADJ ADJ - 1.81 1.85 1.89 V ADJ source current IADJ ADJ VADJ = 0V -650 -450 -250 µA ADJ time TADJ TZE DRV TADJ (RADJ = 51 kΩ) TADJ (RADJ = 9.1 kΩ) 490 550 610 ns Minimum switching period TSW TZE DRV - 6.75 7.5 8.25 µs Power supply current ADJUSTMENT Document Number: 002-08444 Rev.*A Page 7 of 30 MB39C605 (Ta = +25°C, VVDD = 12V) Parameter CURRENT SENSE Symbol Pin Condition Min Value Typ Max Unit OCP threshold voltage VOCPTH CS - 1.9 2 2.1 V OCP delay time tOCPDLY CS - - 400 500 ns CS input current ICS CS VCS = 5V -1 - +1 µA DRV high voltage VDRVH DRV VDD = 18V, IDRV = -30 mA 7.6 9.4 - V DRV low voltage VDRVL DRV VDD = 18V, IDRV = 30 mA - 130 260 mV Rise time tRISE DRV VDD = 18V, CLOAD = 1 nF - 94 - ns Fall time tFALL DRV VDD = 18V, CLOAD = 1 nF - 16 - ns Minimum on time tONMIN DRV TZE trigger 300 500 700 ns Maximum on time tONMAX DRV - 27 44 60 µs Minimum off time tOFFMIN DRV - 1 1.5 1.93 µs Maximum off time tOFFMAX DRV TZE = GND 270 320 370 µs OTP threshold TOTP - Tj, temperature rising - +150 - °C OTP hysteresis TOTPHYS - Tj, temperature falling, degrees below TOTP - +25 - °C DRV OTP Document Number: 002-08444 Rev.*A Page 8 of 30 MB39C605 7. Standard Characteristics Figure 7-1. Standard Characteristics ISO - VVAC IDD - VDD 120% 7.0 VVAC = 1.8V VCS = 1.0V VCOMP = 1.3V RADJ = 51kΩ 6.5 6.0 VDD =12V VVAC = 0V to 1.85V VCS = 1.0V VCOMP = 2.0V 100% 80% ISO [%] IDD [mA] 5.5 5.0 60% 40% 4.5 4.0 20% Ta=-25°C Ta=+25°C Ta=+85°C 3.5 Ta=-25°C Ta=+25°C Ta=+85°C 0% 3.0 -20% 8 10 12 14 16 VDD [V] 18 20 0 0.5 TADJ - RADJ 1.5 2 VDRVH - VDD 14 2500 VDD = 12V VVAC = 1.8V VCS = 1.0V VCOMP = 1.3V DRV pin : open 13 12 VDRVH [V] 2000 1500 TADJ [ns] 1 VVAC [V] 1000 11 VVAC = 1.8V VCS = 1.0V VCOMP = 3.0V RADJ = 51kΩ 10 9 Ta=-25°C Ta=+25°C Ta=+85°C 500 Ta=-25°C Ta=+25°C Ta=+85°C 8 7 6 0 0 50 100 150 200 8 10 12 14 16 18 20 VDD [V] RADJ [kΩ] TON - VCOMP 60 VDD = 12V VVAC = 1.8V VCS = 1.0V RADJ = 51kΩ 50 TON [μs] 40 30 20 Ta=-25°C Ta=+25°C Ta=+85°C 10 0 1.4 1.8 2.2 2.6 3 VCOMP [V] Document Number: 002-08444 Rev.*A 3.4 3.8 Page 9 of 30 MB39C605 8. Function Explanations 8.1 LED Current Control by PSR (Primary Side Regulation) MB39C605 regulates the average LED current (ILED) by feeding back the information based on Primary Winding peak current (IP_PEAK) and Secondary Winding energy discharge time (TDIS) and switching period (TSW ). Figure 8-1 shows the operating waveform in steady state. IP is Primary Winding current and IS is Secondary Winding current. ILED as an average current of the Secondary Winding is described by the following equation. TDIS 1 ILED = × IS_PEAK × 2 TSW Using IP_PEAK and the transformer Secondary to Primary turns ratio (NP/NS), Secondary Winding peak current (IS_PEAK) is described by the following equation. NP IS_PEAK = × IP_PEAK NS Therefore, TDIS 1 NP ILED= × ×IP_PEAK× 2 NS TSW MB39C605 detects TDIS by monitoring TZE pin and IP_PEAK by monitoring CS pin. An internal Err Amp sinks gm current proportional to IP_PEAK from COMP pin during TDIS period. In steady state, since the average of the gm current is equal to internal reference current (ISO), the voltage on COMP pin (VCOMP) is nearly constant. IP_PEAK × RCS × gm × TDIS = ISO × TSW In above equation, gm is transconductance of the Err Amp and RCS is a sense resistance. Eventually, ILED can be calculated by the following equation. ILED= 1 NP ISO 1 × × × 2 NS gm RCS Figure 8-1. LED Current Control Waveform IP_PEAK System Power supply through Diode Bridge (VBULK) IP IP IS_PEAK LP VAUX IS ILED ILED IS TON ADJ MB39C605 TZE TDIS TSW VD VTZE TZE threshold DRV VD (VAUX) CS 1/4 x TRING CD RCS GND Document Number: 002-08444 Rev.*A VTZE 1/4 x TRING Page 10 of 30 MB39C605 8.2 Dimming Function MB39C605 has the built-in Phase dimmable circuit to control ILED by changing a reference of Err Amp based on the input dimming control level on the VAC pin and realizes dimming. Figure 8-2 shows the input circuit to the VAC pin for phase dimming. VBULK0 is divided and filtered into an analog voltage with RC network. It is possible to configurate phase dimmable system by inputting the voltage to the VAC pin. Figure 8-2. VAC Pin Input Circuit VBULK0 VAC MB39C605 0V GND Document Number: 002-08444 Rev.*A Page 11 of 30 MB39C605 8.3 Power-On Sequence When the AC line voltage is supplied, VBULK is powered from the AC line through a diode bridge and a diode (D1) with charging a capacitor (CBULK), and the VDD pin is charged from VBULK through a start-up resistance (Rst). (Figure 8-3 red path) When the VDD pin is charged up and the voltage on the VDD pin (VVDD) rises above the UVLO threshold voltage, an internal Bias circuit starts operating, and MB39C605 starts the dimming control. After the UVLO is released, this device enables switching and is operating in a forced switching mode (TON = 1.5 µs, TOFF = 78 µs to 320 µs). When the voltage on the TZE pin reaches the Zero energy threshold voltage (VTZETH = 0.7V), MB39C605 enters normal operation mode. After the switching begins, the VDD pin is also charged from Auxiliary Winding through an external diode (DBIAS). (Figure 8-3 blue path) During start-up period VVDD is not supplied from Auxiliary Winding, because the LED voltage is low. VVDD decreases gradually until the LED voltage rises above enough high that the Auxiliary Winding voltage can exceed VVDD. In this period, if VVDD falls below the UVLO threshold voltage, the switching stops. When the VDD pin is charged up again and VVDD rises above the UVLO threshold voltage, MB39C605 restarts the switching. This device repeats above operation until the LED voltage rises above enough high. VVDD becomes stable after that. Figure 8-3. VDD Supply Path at Power-On Phase VBULK0 Dimmer VBULK D1 CBULK To TZE Rst DBIAS 1 VDD Internal Bias Generator UVLO PWM Control Logic Driver DRV 8 6 CS 7 GND Figure 8-4. Power-On Waveform VBULK0 VBULK UVLO Vth = 13V VDD Force switching (TON=1.5µs/TOFF=78µs to 320µs) Normal switching Switching start DRV VLED VTZETH = 0.7V TZE Document Number: 002-08444 Rev.*A Page 12 of 30 MB39C605 8.4 Power-Off Sequence After the AC line voltage is removed, VBULK is discharged by switching operation. Since any Secondary Winding current does not flow, ILED is supplied only from output capacitors and decreases gradually. VVDD also decreases because there is no current supply from both Auxiliary Winding and VBULK. When VVDD falls below the UVLO threshold voltage, MB39C605 shuts down. Figure 8-5. Power-Off Waveform AC line removed VBULK0 VBULK UVLO Vth = 7.9V VDD Shutdown DRV VLED 8.5 IP_PEAK Detection Function MB39C605 detects Primary Winding peak current (IP_PEAK) of Transformer. ILED is set by connecting a sense resistance (Rcs) between CS pin and GND pin. Maximum IP_PEAK (IP_PEAKMAX) limited by Over Current Protection (OCP) can also be set with the resistance. Using the Secondary to Primary turns ratio (NP/NS) and ILED, RCS is set as the following equation (refer to 8.1) NP 0.14 × NS ILED In addition, using the OCP threshold voltage (VOCPTH) and RCS, IP_PEAKMAX is calculated with the following equation. RCS= IP_PEAKMAX = 8.6 VOCPTH RCS Zero Voltage Switching Function MB39C605 has built-in zero voltage switching function to minimize switching loss of the external switching MOSFET. This device detects a zero crossing point through a resistor divider connected from TZE pin to Auxiliary Winding. A zero energy detection circuit detects a negative crossing point of the voltage on TZE pin to Zero energy threshold voltage (V TZETL). On-timing of switching MOSFET is decided with waiting an adjustment time (tADJ) after the negative crossing occurs. tADJ is set by connecting an external resistance (RADJ) between ADJ pin and GND pin. Using Primary Winding inductance (LP) and the parasitic drain capacitor of switching MOSFET (CD), tADJ is calculated with the following equation. π LP × CD 2 Using tADJ, RADJ is expressed by the following calculation. RADJ [kΩ] = 0.0927 × tADJ [ns] tADJ= Document Number: 002-08444 Rev.*A Page 13 of 30 MB39C605 8.7 Protection Functions Under Voltage Lockout Protection (UVLO) The under voltage lockout protection (UVLO) prevents IC from a malfunction in the transient state during VVDD startup and a malfunction caused by a momentary drop of VVDD, and protects the system from destruction/deterioration. An UVLO comparator detects the voltage decrease below the UVLO threshold voltage on VDD pin, and then DRV pin is turned to “L” and the switching stops. MB39C605 automatically returns to normal operation mode when VVDD increases above the UVLO threshold voltage. Over Voltage Protection (OVP) The over voltage protection (OVP) protects Secondary side components from an excessive voltage stress. If the LED is disconnected, the output voltage of Secondary Winding rises up. The output overvoltage can be detected by monitoring TZE pin. During Secondary Winding energy discharge time, VTZE is proportional to VAUX and the voltage of Secondary Winding (refer to 8.1). When VTZE rises higher than the OVP threshold voltage for 3 continues switching cycles, DRV pin is turned to “L”, and the switching stops (latch off). When VVDD drops below the UVLO threshold voltage, the latch is removed. Over Current Protection (OCP) The over current protection (OCP) prevents inductor or transformer from saturation. The drain current of the external switching MOSFET is limited by OCP. When the voltage on CS pin reaches the OCP threshold voltage, DRV pin is turned to “L” and the switching cycle ends. After zero crossing is detected on TZE pin again, DRV pin is turned to “H” and the next switching cycle begins. Short Circuit Protection (SCP) The short circuit protection (SCP) protects the transformer and the Secondary side diode from an excessive current stress. When the short circuit between LED terminals occurs, output voltage decreases. If the voltage on TZE pin falls below SCP threshold voltage, VCOMP is discharged and fixed at 1.5V and then the switching enters a low frequency mode.(TON = 1.5 µs /TOFF = 78 µs to 320 µs) Over Temperature Protection (OTP) The over temperature protection (OTP) protects IC from thermal destruction. When the junction temperature reaches +150°C, DRV pin is turned to “L”, and the switching stops. It automatically returns to normal operation mode if the junction temperature falls back below +125°C. Table 8-1. Protection Functions Table Function Normal Operation DRV Active PIN Operation COMP ADJ Active Active Return Condition Detection Condition Remarks - - - Under Voltage Lockout Protection (UVLO) L L L VDD < 7.9V VDD > 13V Auto Restart Over Voltage Protection (OVP) L 1.5V fixed Active TZE > 4.3V VDD < 7.9V → VDD > 13V Latch off Over Current Protection (OCP) L Active Active CS > 2V Cycle by cycle Auto Restart Short Circuit Protection (SCP) Active 1.5V fixed Active TZE (peak) < 0.7V TZE (peak) > 0.7V Auto Restart Over Temperature Protection (OTP) L 1.5V fixed Active Tj> +150°C Tj< +125°C Auto Restart Document Number: 002-08444 Rev.*A Page 14 of 30 MB39C605 9. I/O Pin Equivalent Circuit Diagram Figure 9-1. I/O Pin Equivalent Circuit Diagram Pin No. Pin Name Equivalent Circuit Diagram VREF5V GND VREF5V 2 TZE TZE 2 GND VREF5V GND 7 VREF5V GND 3 COMP VREF5V COMP 3 GND 7 VREF5V 4 VAC VAC 4 VREF5V GND Document Number: 002-08444 Rev.*A 7 Page 15 of 30 MB39C605 Pin No. Pin Name Equivalent Circuit Diagram VREF5V 5 ADJ ADJ 5 GND 7 VREF5V GND 6 CS CS 6 VREF5V GND VDD 7 1 GND 8 DRV VREF5V 8 GND Document Number: 002-08444 Rev.*A DRV 7 Page 16 of 30 MB39C605 10. Application Examples 10.1 5W Non-isolated Dimming Application Input: AC90VRMS~110VRMS, Output: 70mA/70V~76V, Ta = +25°C Figure 10-1. 5W EVB Schematic Document Number: 002-08444 Rev.*A Page 17 of 30 MB39C605 Table 10-1. 5W BOM List No. 1 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 C2 C3 C4, C7 C5 C6 R1 R2, R11 R3 R4 R5 R6 R7 R8 R9 R10 R12 R13 R14 R15 R16 Description LED driver IC SOP-8 Op-Amp, Low voltage Rail-to-Rail, 130µA, SOT-23-5 Transformer, Lp = 550 μH Np/Na = 150/35 MosFET N-CH 600V 2.8A I-PAK MosFET N-CH 60V 115mA SOT-23 MosFET N-CH 600V 0.3A TO-92 Bridge Rectifiers, 0.5A, 600V, SOIC-4 Diode, Zener, 18V, 500mW, SOD-123 Diode, Zener, 5.1V, 500mW, SOD-123 Diode, fast rectifier, 1A, 400V, SMA Diode, 200mA, 200V, SOT-23 PNP Bipolar Transistor 12V 3A CPH3 Fuse, chip, 2A, AC/DC125V, 1206 Capacitor, aluminum electrolytic, 8.2µF 200V ϕ8.0 × 11.0 Capacitor Ceramic 2.2µF 100V 1206 Capacitor Ceramic 4.7µF 35V 0603 Capacitor Ceramic 10µF 25V 0603 Capacitor Ceramic 0.01µF 50V 0603 Capacitor Ceramic 0.1µF 50V 0603 Resistor, winding 10Ω 3W ±5% Resistor, chip, 240kΩ, 1/10W, 0603 Resistor, chip, 10kΩ, 1/10W, 0603 Resistor, chip, 2kΩ, 1/4W, 1206 Resistor, chip, 470kΩ, 1/10W, 0603 Resistorr, chip, 200kΩ 1/4W, 1206 Resistor, chip, 100kΩ, 1/10W, 0603 Resistor, chip, 10Ω, 1/10W, 0603 Resistor, chip, 110kΩ, 1/10W, 0603 Resistor, chip, 30kΩ, 1/10W, 0603 Resistor, chip, 3.0kΩ, 1/10W, 0603 Resistor, chip, 24kΩ, 1/10W, 0603 Resistor, chip, 3.3Ω, 1/10W, 0603 Resistor, chip, 4.7Ω, 1/10W, 0603 Resistorr, chip, 150kΩ 1/4W, 1206 35 36 37 38 R17 R18 R19 R20 Resistor, chip, 5.1kΩ, 1/10W, 0603 Resistor, chip, 36kΩ, 1/10W, 0603 Resistor, chip, 150kΩ, 1/10W, 0603 Resistor, chip, 3.3kΩ, 1/10W, 0603 - - 39 R21 Resistor, chip, 1kΩ, 1/10W, 0603 - - 2 3 4 5 6 7 8 9 10 11 12 13 14 Component M1 U1 T1 Q1 Q2 Q3 BR1 ZD1, ZD2 ZD3 D1, D2 D3 D4 F1 C1 Document Number: 002-08444 Rev.*A Part No. MB39C605 LMV321 Vendor Cypress TI EE808 FQU5N60C 2N7002 FQN1N60C MB6S MMSZ5248B MMSZ4689 ES1G MMBD1405 CPH3106 3410.0035.01 200LLE8R2MEFC8X9 Fairchild Fairchild Fairchild Fairchild Fairchild Fairchild Fairchild Fairchild On semiconductor Schurter Inc Rubycon GRM31CR72A225KA73L - murata - Page 18 of 30 MB39C605 TI Fairchild On Semiconductor Schurter Inc Rubycon muRata Document Number: 002-08444 Rev.*A : : : : : : Texas Instruments Incorporated Fairchild Semiconductor International, Inc. ON Semiconductor Schurter Holding AG Rubycon Corporation Murata Manufacturing Co., Ltd. Page 19 of 30 MB39C605 Figure 10-2. 5W Reference Data Efficiency Power Factor LED:70V 73mA LED:70V 73mA 1.00 100.0% 0.95 95.0% 0.90 90.0% 0.85 50Hz 0.80 80.0% PF Efficiency η[%] 85.0% 60Hz 0.75 0.70 75.0% 0.65 70.0% 0.60 50Hz 65.0% 0.55 60Hz 0.50 60.0% 90 95 100 105 90 110 95 100 Line Regulation 73mA VIN=100Vrms 100 90 90 80 80 IOUT [mA] IOUT [mA] LED:70V 70 70 60 50Hz 50Hz 60Hz 60Hz 50 90 110 Load Regulation 100 60 105 VIN [Vrms] VIN [Vrms] 95 100 VIN [Vrms] Document Number: 002-08444 Rev.*A 105 110 50 70 71 72 73 74 75 76 VOUT [V] Page 20 of 30 MB39C605 Output Ripple Waveform Switching Waveform VIN=100VRMS / 60Hz LED:70V 73mA VBULK0(BR1+) VIN=100VRMS / 60Hz LED:70V 73mA VSW(Q1 Drain) VOUT IOUT IOUT Turn-On Waveform Turn-Off Waveform VIN=100VRMS / 60Hz LED:70V 73mA VIN=100VRMS / 60Hz LED:70V 73mA VBULK0(BR1+) VBULK0(BR1+) VDD(M1 VDD) VDD(M1 VDD) VOUT VOUT IOUT IOUT Document Number: 002-08444 Rev.*A Page 21 of 30 MB39C605 Dimming Curve Dimming Curve VIN=100VRMS / 60Hz LED:70V 73mA 80 80 70 70 60 60 50 50 40 40 Iout [mA] Iout [mA] VIN=100VRMS / 50Hz LED:70V 73mA 30 30 20 20 10 10 0 0 0 45 90 135 180 0 Conduction Angle [°] Dimmer Parts Name DVCL-123P-JA WTC 57521 WDG9001 DVCL-123P-JA WTC 57521 WDG9001 90 135 180 Conduction Angle [°] ：DVCL-123P-JA ：WTC 57521 ：WDG9001 Vendor LUTRON Panasonic TOSHIBA LUTRON Panasonic TOSHIBA 45 ：DVCL-123P-JA ：WTC 57521 ：WDG9001 Input Condition VIN=100Vrms 50Hz (Japan Dimmer) VIN=100Vrms 60Hz (Japan Dimmer) Total Harmonic Distortion(THD) LED:70V Tｙｐｅ Leading Edge Trailing Edge Leading Edge Trailing Edge Minimum Minimum Maximum Maximum Angle (°) IOUT (mA) Angle (°) IOUT (mA) 32.8 1.3 130.9 73.2 31.1 1.0 134.1 73.2 27.5 5.7 146.9 73.2 31.3 1.2 126.1 73.3 30.5 1.0 133.7 73.4 33.9 8.7 152.5 73.4 73mA 140 120 100 THD [%] 80 60 40 20 0 90 95 100 105 110 VIN [Vrms] Document Number: 002-08444 Rev.*A Page 22 of 30 MB39C605 11. Usage Precautions Do not configure the IC over the maximum ratings. If the IC is used over the maximum ratings, the LSI may be permanently damaged. It is preferable for the device to normally operate within the recommended usage conditions. Usage outside of these conditions can have an adverse effect on the reliability of the LSI. Use the device within the recommended operating conditions. The recommended values guarantee the normal LSI operation under the recommended operating conditions. The electrical ratings are guaranteed when the device is used within the recommended operating conditions and under the conditions stated for each item. Printed circuit board ground lines should be set up with consideration for common impedance. Take appropriate measures against static electricity. Containers for semiconductor materials should have anti-static protection or be made of conductive material. After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. Work platforms, tools, and instruments should be properly grounded. Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ in serial between body and ground. Do not apply negative voltages. The use of negative voltages below - 0.3 V may make the parasitic transistor activated to the LSI, and can cause malfunctions. Document Number: 002-08444 Rev.*A Page 23 of 30 MB39C605 12. Ordering Information Table 12-1. Ordering Information Part Number Shipping Form Package MB39C605PNF-G-JNEFE1 Emboss 8-pin plastic SOP (FPT-8P-M02) MB39C605PNF-G-JNE1 Document Number: 002-08444 Rev.*A Tube Page 24 of 30 MB39C605 13. Marking Format Figure 13-1. Marking Format XXXX XXX INDEX Document Number: 002-08444 Rev.*A Lead-free version Page 25 of 30 MB39C605 14. Recommended Mounting Condition [JEDEC Level3] Lead Free 14.1 Recommended Reflow Condition Table 14-1. Recommended Reflow Condition Items Method Times Contents IR(Infrared Reflow) / Convection 3 times in succession Before unpacking From unpacking to reflow Please use within 2 years after production. Within 7 days Floor life Baking with 125°C+/-3°C for 24hrs+2hrs/-0hrs is required. Then In case over period of floor life(*1) please use within 7 days. (Please remember baking is up to 2 times) Floor life Between 5°C and 30°C and also below 60%RH required. (It is preferred lower humidity in the required temp condition range.) *1: Concerning the Tape & Reel product, please transfer product to heatproof tray and so on when you perform baking. Also please prevent lead deforming and ESD damage during baking process. 14.2 Reflow Profile Figure 14-1. Reflow Profile 260°C Max. (J-STD-020D) TL to TP : Ramp Up Rate 3°C/s Max. TS : Preheat & Soak 150 to 200°C, 60 to 120s TP - tP : Peak Temperature 260°C Down, within 30s TL - tL : Liquidous Temperature 217°C, 60 to 150s TP to TL : Ramp Down Rate 6°C/s Max. Time 25°C to Peak 8min Max. Temperature on the top of the package body is measured. Document Number: 002-08444 Rev.*A Page 26 of 30 MB39C605 15. Package Dimensions 8-pin plastic SOP Lead pitch 1.27 mm Package width× package length 3.9 mm × 5.05 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.75 mm MAX Weight 0.06 g (FPT-8P-M02) 8-pin plastic SOP (FPT-8P-M02) Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. +0.25 +.010 *1 5.05 –0.20 .199 –.008 8 +0.03 0.22 –0.07 +.001 .009 –.003 5 *23.90±0.30 6.00±0.20 (.154±.012) (.236±.008) Details of "A" part 45° 1.55±0.20 (Mounting height) (.061±.008) 0.25(.010) 0.40(.016) 1 "A" 4 1.27(.050) 0.44±0.08 (.017±.003) 0.13(.005) M 0~8° 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.15±0.10 (.006±.004) (Stand off) 0.10(.004) C 2002-2012 FUJITSUSEMICONDUCTOR LIMITED F08004S-c-5-10 Document Number: 002-08444 Rev.*A Dimensions in mm (inches). Note: The values in parentheses are reference values. Page 27 of 30 MB39C605 16. Major Changes Spansion Publication Number: MB39C605-DS405-00017 Page Section Revision 1.0 Revision 2.0 16 11.6 Zero Voltage Switching Function 20 13. Application Examples 26 15. Ordering Information - - Revision 3.0 8 7. Absolute Maximum Ratings Labeling Sample 17. Recommended mounting condition 28 [JEDEC Level3] Lead Free Descriptions Initial release Corrected the RADJ formula Added Application Examples Added Shipping in Table 15-1 Rewrote entire document for improving the ease of understanding (the original intentions are remained unchanged). Removed ESD Voltage (Machine Model) from Table 7-1 Removed section of Labeling Sample Changed Recommended Condition from three conditions to one condition “JEDEC LEVEL3” NOTE: Please see “Document History” about later revised information. Document Number: 002-08444 Rev.*A Page 28 of 30 MB39C605 17. Document History Document Title: MB39C605 Phase Dimmable PSR LED Driver IC for LED Lighting Document Number: 002-08444 Revision ECN ** – Orig. of Submission Change Date TOYO 02/20/2015 Description of Change Migrated to Cypress and assigned document number 002-08444. No change to document contents or format. *A 5211375 TOYO Document Number: 002-08444 Rev.*A 04/12/2016 Updated to Cypress format. Page 29 of 30 MB39C605 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC® Solutions Products ARM® Cortex® Microcontrollers Automotive Clocks & Buffers Interface Lighting & Power Control Memory PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/arm cypress.com/automotive cypress.com/clocks PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP Cypress Developer Community Forums | Projects | Videos | Blogs | Training | Components cypress.com/interface cypress.com/powerpsoc cypress.com/memory Technical Support cypress.com/support cypress.com/psoc cypress.com/touch cypress.com/usb cypress.com/wireless ARM and Cortex are the registered trademarks of ARM Limited in the EU and other countries. © Cypress Semiconductor Corporation, 2014-2016. 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Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage (“Unintended Uses”). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. Document Number: 002-08444 Rev.*A April 6, 2016 Page 30 of 30