MPC5744P-144DC-SCH.pdf?fpsp=1&WT TYPE=Schematics&WT VENDOR=FREESCALE&WT FILE FORMAT=pdf&WT ASSET=Downloads&fileExt=

5
4
3
2
1
Table of Contents
2
3
4
5
6
7
8
9
Notes
Block Diagram
MPC5744 MCU in SKT
MPC5744 MCU
Power, RST, LIN, CAN
JTAG & NEXUS
MB Connections 1
MB Connections 2
Revisions
Rev
Description
Date
Approved
A
Prototype Release
21 May 12
J.H.
A1
Update from DVT
- Change shunt on J6 to
pins 2-3
- Change shunt on J24
to pins 2-4
- Change shunts on J17
to wires jumpers from
8-12, 9-11, 2-6, 3-5
- Change R224, R225,
R226, R227, R230, and
R231 to zero ohms.
02 Jul 12
J.H.
AX1
Update from DVT
- Remove R224 thru R227,
R230, and R231 and
connect pin 2 of C211
C213, C216, C221,
C234, and C235 to GND.
- Change connection to
J18 pin 3 to MB_PTC6
and J18 pin 6 to
MB_PTC7.
- Change connection to
J17 pin 2 to be PTB1,
pin 5 to be PTB0,
pin 8 to be PBB3,
and pin 11 to be PTB2.
Update default shunt
positions to match.
- Update MCU bodies to
the new library parts.
07 Nov 12
J.H.
AX2
- Crystal & OSC Circuits,
Series resistor options
were replaced by
Jumpers (210-30004)
20 Mar 13
Barbara
AX3
- Q1 MFR-PN changed to
22 Mar 13
D
D
Marilyn &
C
C
PDTC115TE
Barbara
- Y200 Prefered MFR-PN
25 Mar 13
changed to
CX3225GA40000D0PTVZ1
- SW3 MFR-PN changed to
1101M2S3CQE2
27 Mar 13
- R235 changed to
two pin jumper, JP4
B
A085 Release
05 Apr 13 Marilyn &
Barbara
B
B
Microcontroller Solutions Group
A
A
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: ___ PUBI: X
Designer:
Drawing Title:
Jay Hartvigsen
MPC5744P-144DC
5
4
3
2
Drawn by:
Jay Hartvigsen
Page Title:
Approved:
Barbara
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Title Page
Rev
B
SCH-27513: SPF-27513
Sheet
1
1
of
9
5
4
3
2
1
1. Interrupted lines coded with the same letter or letter
combinations are electrically connected.
Power & Ground Nets
2. Device type number is for reference only. The number
varies with the manufacturer.
3. Special signal usage:
_B Denotes - Active-Low Signal
<> or [] Denotes - Vectored Signals
MOTHER BOARD SUPPLIED POWER
D
4. Interpret diagram in accordance with American
National Standards Institute specifications, current
revision, with the exception of logic block symbology.
1.25V_MB_SR
1.25V
3.3V_MB_SR
3.3V
5V_MB_SR
5V
From the MB switching regulator - only used to provide power back to the MB I/'O circuits
5V_MB_LR
5V
From the MB linear regulator - used for 3.3V on the daughter card
D
EXTERNALLY SUPPLIED POWER
EXT_PWR
12V
External power supplied through the barrel connector to the System Basis Chip (SBC) - MC33907
EXT_PWR_SW
12V
EXT_PWR out of the power switch - used by the SBC to detect input power
VSUP
12V
EXT_PWR_SW after the reverse voltage protection diode
1.25V_DC_LR
1.25V
External power into pin 1 of the terminal block
3.3V_DC_LR
3.3V
External power into pin 2 of the terminal block
5V_DC_LR
5V
External power into pin 3 of the terminal block
SYSTEM BASIS CHIP (SBC) POWER NETS
VSUP12
12V
Power into the pre-regulator switching regulator in the SBC
V_PRE
6.5V
Power out of the pre-regulator switching regulator in the SBC
SB_VCORE
3.3V
Power out of the core switching regulator in the SBC
SB_VAUX
3.3V
Power out of the VAUX linear regulator in the SBC
SB_VCCA
3.3V
Power out of the VCCA linear regulator in the SBC
VCAN
5V
Power out of the CAN linear regulator in the SBC
VDD_LV_CORE
1.25V
Power to the core logic on the MCU
VDD_LV_EXT
1.25V
Power derived from VDD_HV_PMU and regulated by the MCU through an external transistor
VDD_LV_PLL
1.25V
Power to the pll circuit on the MCU
VDD_HV_PMU
3.3V
Power to the pmu circuit on the MCU
VDD_HV_IO
3.3V
Power to the I/O circuits on the MCU
VDD_HV_OSC0
3.3V
Power to the oscillator circuit on the MCU
VDD_HV_FLA0
3.3V
Power to the flash memory circuit on the MCU
C
C
POWER TO THE MCU
B
VDD_HV_ADV0/1 3.3V
Power to the ADC circuit on the MCU
VDD_HV_ADR0
3.3V
Reference voltage to the ADC0 circuit on the MCU
VDD_HV_ADR1
3.3V
Reference voltage to the ADC1 circuit on the MCU
B
GROUND NETS
GND
0V
VSS_PLL
0V
Filtered ground for the on chip PLL circuit
VSS_OSC
0V
Filtered ground for the on chip oscillator circuit
VSSA
0V
Filtered ground for the on chip ADC circuits
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
MPC5744P-144DC
Page Title:
Notes
5
4
3
2
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Rev
B
SCH-27513: SPF-27513
Sheet
1
2
of
9
5
4
3
2
1
D
D
Sheet 4
MPC5744P MCU in Socket
External Power Jack
External Power Switch & LED
40 MHz XTAL
8 MHz Crystal Oscillator
SMA for External Clock
Power Selector for VDD_LV_CORE
C
Sheet 6
MPC5744P MCU
MC_RGM Boot Selector
External Power Terminal Block
Terminal Block Power LEDs
SBC Power Supply
Power Selector for VDD_LV_PLL
Vcca/Vaux Voltage Sel Header
Power Selector for VDD_HV_PMU
SBC I/O & MCU FCCU_F0,1 Header
Power Selector for VDD_HV_IO
SBC Power LEDs (V_PRE, VCCA,
Power Selector for VDD_HV_OSC0
Sheet 5
VAUX, VCAN, VCORE)
Power Selector for VDD_HV_FLA0
SBC FS0 and FS1 LEDs
Power Selector for VDD_HV_ADV0/1
CAN Interface
Power Selector for VDD_HV_ADR0
LIN Interface
Power Selector for VDD_HV_ADR1
RESET & POR Push Buttons & LEDs
VSS_PLL, VSS_OSC, VSSA filters
SPI, CAN, & LIN Source Headers
C
Sheet 7
Nexus Connector
JTAG Connector
B
B
Sheets 8 and 9
Motherboard Connectors
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
MPC5744P-144DC
Page Title:
Block Diagram
5
4
3
2
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Rev
B
SCH-27513: SPF-27513
Sheet
1
3
of
9
5
4
3
2
3.3V_DC_LR
3.3V_DC_LR
SB_VCORE
3.3V_DC_LR
SB_VCORE
SB_VAUX
SB_VCORE
3.3V_MB_SR
3.3V_MB_SR
3.3V_MB_SR
Default: 3-4
(Use SR on MB)
TP5
J1
2
4
6
1
3
5
VDD_HV_IO
HDR_2X3
C224
C233
C220
C217
C238
C212
10UF
10UF
0.047UF
0.047UF
0.047UF
0.047UF
Default: 3-4
(Use SR on MB)
2
C244
C252
C245
10UF
10UF
0.1UF
4
0
5V_MB_LR
2
0.01UF
VSSA
D
J21
1
VAR0
1
3
5
7
9
2
VDD_HV_ADR0
330 OHM
C230
C232
C231
1.0 UF
0.047UF
0.01UF
4.7UF
4.7UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
VDD_HV_IO
J6
17
40
71
94
96
132
137
1
2
3
J8/GPIO152/ETIMER_2_ETC4/ETIMER_2_ETC2/CAN2_RXD
J9/GPIO153/ETIMER_2_ETC5/NPC_NEX_RDY/CTU_1_EXT_IN
RESET
EXT_POR
FCCU_F0
FCCU_F1
TMS
TCK
JCOMP
MDO0
NMI
XTAL
EXTAL
J11
CON_1_SMA
1
L202 330 OHM
2
DNP
1
102
104
100
85
98
83
81
79
77
75
PTG2
PTG3
PTG4
PTG5
PTG6
PTG7
PTG8
PTG9
PTG10
PTG11
95
16
DNP
130
C228
1.0 UF
0.047UF
VSSA
C229
0.01UF
VSSA
Default: 1-2
(disable)
VCC
E/D
8MHz
0
0
R222
0
pag{5,8}
PTF[0..15]
pag{5,7,8,9}
PTG[2..11]
pag{5,8}
B
VDD_HV_PMU
PTJ[8..9]
PTJ8
PTJ9
R229
R232
DNP
DNP
0
0
R221
DNP
0
pag{7,9}
LPJ8 pag{5}
LPJ9 pag{5}
RESET_B pag{5,6,7,8}
EXT_POR_B pag{6,7}
LEXT_POR_B pag{5}
FCCU_F0
pag{5,6}
FCCU_F1
pag{5,6}
87
88
123
9
TMS pag{5,7}
TCK pag{5,7}
JCOMP pag{5,7}
MDO0 pag{5,7}
1
NMI_B
29
30
XTAL
EXTAL
2 EX
pag{5,6}
XTAL pag{5}
EXTAL pag{5}
R234
0
A
X1
X2
Y200
1
2
2
40MHz
Providing EXternal clock Via SMA ,J11
VDD_HV_IO
OUT
R223
R228
PTE[0..15]
Note: To test with the Leopard chip
remove the zero ohm resistors to the
port J bus and EXT_POR_B and move
them to the DNP locations to connect
to VDD_HV_PMU.
38
141
JP2
OSC
4
VSSA
J12
Y201
GND
VSSA
3
C227
31
2
1
2
HDR 1X2 TH
1 CK_EN 1
2
VSS_OSC
4
PTF0
PTF3
PTF4
PTF5
PTF6
PTF7
PTF8
PTF9
PTF10
PTF11
PTF12
PTF13
PTF14
PTF15
DNP
5
VSS_OSC
L200 330 OHM
2
VDD_HV_ADR1
VSSA
133
139
4
5
8
19
20
23
24
25
106
112
115
113
1
JP1
1
EXT_CLK
VDD_HV_IO
VSS_PLL
1
VSSA
PTE0
PTE2
PTE4
PTE5
PTE6
PTE7
PTE9
PTE10
PTE11
PTE12
PTE13
PTE14
PTE15
4
VSS_PLL
L203 330 OHM
1
2
2
330 OHM
HDR_2X5
68
49
42
44
46
48
61
63
65
67
117
119
121
JP6
3
HDR TH 1X3
VSSA
R236
49.9
2
VPP_TEST
F0/GPIO80/FLEXPWM_0_A1/ETIMER_0_ETC2/SIUL2_REQ28
F3/GPIO83/DSPI0_CS6
F4/GPIO84/NPC_WRAPPER_MDO3
F5/GPIO85/NPC_WRAPPER_MDO2
F6/GPIO86/NPC_WRAPPER_MDO1
F7/GPIO87/NPC_WRAPPER_MCKO
F8/GPIO88/NPC_WRAPPER_MSEO_B1
F9/GPIO89/NPC_WRAPPER_MSEO_B0
F10/GPIO90/NPC_WRAPPER_EVTO
F11/GPIO91/NPC_WRAPPER_EVTI_IN
F12/GPIO92/ETIMER_1_ETC3/FLEXPWM_1_A1/SIUL2_REQ30
F13/GPIO93/ETIMER_1_ETC4/FLEXPWM_1_B1/SIUL2_REQ31
F14/GPIO94/LIN1_TXD/CAN2_TXD
F15/GPIO95/LIN1_RXD/CAN2_RXD
VSS_HV_AD0_VSSE/VSS_HV_ADRE0/VSS_HV_ADSW0
VSS_HV_AD1_VSSE/VSS_HV_ADRE1/VSS_HV_ADSW1
BCTRL
E0/GPI64/ADC1_ADC3_AN5
E2/GPI66/ADC0_AN5
E4/GPI68/ADC0_AN7
E5/GPI69/ADC0_AN8
E6/GPI70/ADC0_AN4
E7/GPI71/ADC0_AN6
E9/GPI73/ADC1_ADC3_AN7
E10/GPI74/ADC1_ADC3_AN8
E11/GPI75/ADC1_ADC3_AN5
E12/GPI76/ADC1_ADC3_AN6
E13/GPIO77/ETIMER_0_ETC5/DSPI2_CS3/DSPI1_CS4/SIUL2_REQ25
E14/GPIO78/ETIMER_1_ETC5/DSPI1_CS5/FLEXPWM_1_B2/SIUL2_REQ26
E15/GPIO79/DSPI0_CS1/SIUL2_REQ27
51
57
69
107
D0/GPIO48/FLEXRAY_FR_A_TX/ETIMER_1_ETC1/FLEXPWM_0_B1
D1/GPIO49/ETIMER_1_ETC2/CTU_0_EXT_TGR/FLEXRAY_FR_A_RX
D2/GPIO50/ETIMER_1_ETC3/FLEXPWM_0_X3/FLEXRAY_FR_B_RX
D3/GPIO51/FLEXRAY_FR_B_TX/ETIMER_1_ETC4/FLEXPWM_0_A3
D4/GPIO52/FLEXRAY_FR_B_TXEN/ETIMER_1_ETC5/FLEXPWM_0_B3
D5/GPIO53/DSPI0_CS3/FLEXPWM_0_FAULT2/SENT0_SENT_RX0
D6/GPIO54/DSPI0_CS2/FLEXPWM_0_X3/FLEXPWM_0_FAULT1
D7/GPIO55/SWGOUT_SWG/DSPI1_CS3/DSPI0_CS4/SENT1_SENT_RX0
D8/GPIO56/DSPI1_CS2/ETIMER_1_ETC4/DSPI0_CS5/FLEXPWM_0_FAULT3
D9/GPIO57/FLEXPWM_0_X0/LIN1_TXD
D10/GPIO58/FLEXPWM_0_A0/ETIMER_0_ETC0
D11/GPIO59/FLEXPWM_0_B0/ETIMER_0_ETC1
D12/GPIO60/FLEXPWM_0_X1/DSPI1_CS6/LIN1_RXD
D14/GPIO62/FLEXPWM_0_B1/ETIMER_0_ETC3
1
C
G2/GPIO98/FLEXPWM_0_X2/DSPI1_CS1
G3/GPIO99/FLEXPWM_0_A2/ETIMER_0_ETC4
G4/GPIO100/FLEXPWM_0_B2/ETIMER_0_ETC5
G5/GPIO101/FLEXPWM_0_X3/DSPI2_CS3
G6/GPIO102/FLEXPWM_0_A3
G7/GPIO103/FLEXPWM_0_B3
G8/GPIO104/FLEXRAY_FR_DBG0/DSPI0_CS1/SIUL2_REQ21/FLEXPWM_0_FAULT0
G9/GPIO105/FLEXRAY_FR_DBG1/DSPI1_CS1/SIUL2_REQ29/FLEXPWM_0_FAULT1
G10/GPIO106/FLEXRAY_FR_DBG2/DSPI2_CS3/FLEXPWM_0_FAULT2
G11/GPIO107/FLEXRAY_FR_DBG3/FLEXPWM_0_FAULT3
VSS_HV_ADV0/1
125
3
140
128
129
33
34
37
32
26
76
78
99
105
VSS_HV_OSC0
PTD0
PTD1
PTD2
PTD3
PTD4
PTD5
PTD6
PTD7
PTD8
PTD9
PTD10
PTD11
PTD12
PTD14
C0/GPI32/ADC1_AN3
C1/GPI33/ADC0_AN2
C2/GPI34/ADC0_AN3
C4/GPIO36/DSPI0_CS0/FLEXPWM_0_X1/SSCM_DEBUG4/SIUL2_REQ22
C5/GPIO37/DSPI0_SCK/SSCM_DEBUG5/FLEXPWM_0_FAULT3/SIUL2_REQ23
C6/GPIO38/DSPI0_SOUT/FLEXPWM_0_B1/SSCM_DEBUG6/SIUL2_REQ24
C7/GPIO39/FLEXPWM_0_A1/SSCM_DEBUG7/DSPI0_SIN
C10/GPIO42/DSPI2_CS2/FLEXPWM_0_A3/FLEXPWM_0_FAULT1
C11/GPIO43/ETIMER_0_ETC4/DSPI2_CS2
C12/GPIO44/ETIMER_0_ETC5/DSPI2_CS3
C13/GPIO45/ETIMER_1_ETC1/FLEXPWM_1_A0/CTU_0_EXT_IN/FLEXPWM_0_EXT_SYNC
C14/GPIO46/ETIMER_1_ETC2/CTU_0_EXT_TGR/DSPI1_CS7/FLEXPWM_1_B0
C15/GPIO47/FLEXRAY_FR_A_TXEN/ETIMER_1_ETC0/FLEXPWM_0_A1/CTU_0_EXT_IN/FLEXPWM_0_EXT_SYNC
59
66
41
45
11
13
142
15
111
80
82
101
103
124
B0/GPIO16/CAN0_TXD/ETIMER_1_ETC2/SSCM_DEBUG0/SIUL2_REQ15
B1/GPIO17/ETIMER_1_ETC3/SSCM_DEBUG1/CAN0_RXD/CAN1_RXD/SIUL2_REQ16
B2/GPIO18/LIN0_TXD/SSCM_DEBUG2/SIUL2_REQ17
B3/GPIO19/SSCM_DEBUG3/LIN0_RXD
B4/GPIO20/TDO
B5/GPIO21/TDI
B6/GPIO22/MC_RGM_CLK_OUT/DSPI2_CS2/SIUL2_REQ18
B7/GPI23/ADC0_AN0/LIN0_RXD
B8/GPI24/ADC0_AN1/ETIMER_0_ETC5
B9/GPI25/ADC0_AN2
B10/GPI26/ADC0_ADC1_AN12
B11/GPI27/ADC0_ADC1_AN13
B12/GPI28/ADC0_ADC1_AN14
B13/GPI29/ADC1_AN0/LIN1_RXD
B14/GPI30/ADC1_AN1/ETIMER_0_ETC4/SIUL2_REQ19
B15/GPI31/ADC1_AN2/SIUL2_REQ20
28
PTC0
PTC1
PTC2
PTC4
PTC5
PTC6
PTC7
PTC10
PTC11
PTC12
PTC13
PTC14
PTC15
VDD_LV_PLL
VDD_LV_1
VDD_LV_2
VDD_LV_3
VDD_LV_4
VDD_LV_5
VDD_LV_6
109
110
114
116
89
86
138
43
47
52
53
54
55
60
64
62
VDD_HV_ADR1
L6
VAR1
Default: 3-4
(Use SR on MB)
VSSA
A0/GPIO0/ETIMER_0_ETC0/DSPI2_SCK/SIUL2_REQ0
A1/GPIO1/ETIMER_0_ETC1/DSPI2_SOUT/SIUL2_REQ1
A2/GPIO2/ETIMER_0_ETC2/FLEXPWM_0_A3/MC_RGM_ABS1/DSPI2_SIN/SIUL2_REQ2
A3/GPIO3/ETIMER_0_ETC3/DSPI2_CS0/FLEXPWM_0_B3/MC_RGM_ABS2/SIUL2_REQ3
A4/GPIO4/ETIMER_1_ETC0/DSPI2_CS1/ETIMER_0_ETC4/FLEXPWM_1_A2/SIUL2_REQ4/MC_RGM_FAB
A5/GPIO5/DSPI1_CS0/ETIMER_1_ETC5/DSPI0_CS7/SIUL2_REQ5
A6/GPIO6/DSPI1_SCK/ETIMER_2_ETC2/SIUL2_REQ6
A7/GPIO7/DSPI1_SOUT/ETIMER_2_ETC3/SIUL2_REQ7
A8/GPIO8/ETIMER_2_ETC4/DSPI1_SIN/SIUL2_REQ8
A9/GPIO9/DSPI2_CS1/ETIMER_2_ETC5/FLEXPWM_0_B3/FLEXPWM_0_FAULT0
A10/GPIO10/DSPI2_CS0/FLEXPWM_0_B0/FLEXPWM_0_X2/SIUL2_REQ9
A11/GPIO11/DSPI2_SCK/FLEXPWM_0_A0/FLEXPWM_0_A2/SIUL2_REQ10
A12/GPIO12/DSPI2_SOUT/FLEXPWM_0_A2/FLEXPWM_0_B2/SIUL2_REQ11
A13/GPIO13/FLEXPWM_0_B2/FLEXPWM_0_FAULT0/DSPI2_SIN/SIUL2_REQ12
A14/GPIO14/CAN1_TXD/ETIMER_1_ETC4/SIUL2_REQ13
A15/GPIO15/ETIMER_1_ETC5/CAN0_RXD/CAN1_RXD/SIUL2_REQ14
TP20
2
4
6
8
10
2
4.7UF
VPP_TEST
5
VSSA
C226
3.3V_DC_LR
JP4
4.7UF
PTB0
PTB1
PTB2
PTB3
PTB4
PTB5
PTB6
PTB7
PTB8
PTB9
PTB10
PTB11
PTB12
PTB13
PTB14
PTB15
Default: 2-3
(pull low)
0.047UF
5V_DC_LR
VDD_HV_ADR0
L5
2
4.7UF
BCTRL
A
C225
1.0 UF
SB_VCCA
DNP
4.7UF
73
74
84
92
108
14
2
10
12
134
118
120
122
136
143
144
BCTRL
C223
50
56
C241
58
C209
VDD_HV_ADV0/1
C222
VDD_HV_AD0_VDDE/VDD_HV_ADRE0/VDD_HV_ADSW0
VDD_HV_AD1_VDDE/VDD_HV_ADRE1/VDD_HV_ADSW1
C215
27
97
C214
72
C236
VDD_HV_OSC0
VDD_HV_FLA0
C216
VDD_HV_PMU/VDD_HV_PMU_AUX
C235
6
21
91
126
C213
36
C211
VDD_HV_IO_1
VDD_HV_IO_2
VDD_HV_IO_3
VDD_HV_IO_4
C221
18
39
70
93
131
135
C234
PTA0
PTA1
PTA2
PTA3
PTA4
PTA5
PTA6
PTA7
PTA8
PTA9
PTA10
PTA11
PTA12
PTA13
PTA14
PTA15
VPP_TEST
5V_MB_LR
Default: 3-4
(Use SR on MB)
VSS_HV_IO_1
VSS_HV_IO_2
VSS_HV_IO_3
VSS_HV_IO_4
pag{5}
pag{5}
PTD[0..14]
VDD_HV_ADV0/1
VSSA
3.3V_MB_SR
HDR_2X5
VDD_LV_CORE
VSS_LV_PLL
pag{5,9}
TP13
7
22
90
127
PTC[0..15]
2
330 OHM
HDR_2X3
TP19
2
4
6
8
10
VSS_PLL
35
pag{5,6,8,9}
B
1
3
5
7
9
VDD_LV_CORE
PTA[0..15]
PTB[0..15]
VDD_HV_ADV0/1
L7
1
VAV
VSS_OSC
J20
C239
0.047UF
VSS_LV_1
VSS_LV_3
VSS_LV_4
VSS_LV_5
VSS_LV_6
VSS_LV_7
VSS_LV_8
pag{5,6,7,9}
0.01UF
5V_DC_LR
VDD_LV_PLL
VDD_LV_EXT
U1
PPC5744PFK0MLQ8 + SKT QFP 144 TH
pag{5,7,8}
C208
0.1UF
SB_VCCA
VDD_LV_PLL
L201
1
330 OHM
J16
C
C210
3.3V_DC_LR
TP12
NJD2873T4
Q201
VIBD 1
3
R237
C243
0.047UF
DNP
HDR_2X3
HDR_2X3
2
4
6
VDD_HV_PMU
BCTRL
2
4
6
0.01UF
VSS_OSC
3.3V_MB_SR
1
3
5
C240
0.1UF
1
3
5
VDD_HV_FLA0
VDD_HV_PMU
2
4
6
HDR_2X3
Default: 3-4
(Use SR on MB)
C237
2
4
6
TP21
J22
VDD_HV_FLA0
1
3
5
VDD_HV_OSC0
330 OHM
HDR_2X3
TP22
J23
1
3
5
VOSC 1
TP1
J3
VDD_HV_OSC0
L204
Default: 3-4
(Use SR on MB)
JP5
D
2
4
6
3.3V_MB_SR
Default: 3-4
(Use SR on MB)
TP6
J19
VDD_HV_IO
1
3
5
SB_VAUX
3.3V_MB_SR
Default: 3-4
(Use SR on MB)
1
1.25V_MB_SR
3.3V_DC_LR
1
1.25V_DC_LR
1
3.3V_DC_LR
JP4
: No Shunt
(Removing Jumper wire between Crystal & EXTAL)
JP1
: Shunt 1-2
(Adding Jumper wire between SMA & EXTAL)
C246
JP6
JP5
: Shunt 1-2
: Shunt 1-2
(Terminating the MCU EXTAL trace to GND via 49.9)
(Terminating the MCU XTAL trace to GND)
0.1UF
To use the OSC is similar to using the SMA connector,
3
but the jumper to the 49.9 ohm resistor is not used (JP6-DNP)
2
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
MPC5744P-144DC
Page Title:
MPC5744 MCU in SKT
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Rev
B
SCH-27513: SPF-27513
Sheet
1
4
of
9
5
4
3
2
1
VDD_HV_IO
VDD_HV_IO
R218
10.0K
U201
13
12
RGM_FAB
J7
D
1
3
5
2
4
6
HDR_2X3
RGM_ABS2
10
9
RGM_ABS1
4
5
4OE
4A
3Y
2OE
2A
2Y
1OE
1A
VDD_HV_PMU
VDD_LV_PLL
VPP_TEST
69
107
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
D
VPP_TEST
VSS_PLL
50
56
58
VDD_HV_ADV0/1
E0/GPI64/ADC1_ADC3_AN5
E2/GPI66/ADC0_AN5
E4/GPI68/ADC0_AN7
E5/GPI69/ADC0_AN8
E6/GPI70/ADC0_AN4
E7/GPI71/ADC0_AN6
E9/GPI73/ADC1_ADC3_AN7
E10/GPI74/ADC1_ADC3_AN8
E11/GPI75/ADC1_ADC3_AN5
E12/GPI76/ADC1_ADC3_AN6
E13/GPIO77/ETIMER_0_ETC5/DSPI2_CS3/DSPI1_CS4/SIUL2_REQ25
E14/GPIO78/ETIMER_1_ETC5/DSPI1_CS5/FLEXPWM_1_B2/SIUL2_REQ26
E15/GPIO79/DSPI0_CS1/SIUL2_REQ27
F0/GPIO80/FLEXPWM_0_A1/ETIMER_0_ETC2/SIUL2_REQ28
F3/GPIO83/DSPI0_CS6
F4/GPIO84/NPC_WRAPPER_MDO3
F5/GPIO85/NPC_WRAPPER_MDO2
F6/GPIO86/NPC_WRAPPER_MDO1
F7/GPIO87/NPC_WRAPPER_MCKO
F8/GPIO88/NPC_WRAPPER_MSEO_B1
F9/GPIO89/NPC_WRAPPER_MSEO_B0
F10/GPIO90/NPC_WRAPPER_EVTO
F11/GPIO91/NPC_WRAPPER_EVTI_IN
F12/GPIO92/ETIMER_1_ETC3/FLEXPWM_1_A1/SIUL2_REQ30
F13/GPIO93/ETIMER_1_ETC4/FLEXPWM_1_B1/SIUL2_REQ31
F14/GPIO94/LIN1_TXD/CAN2_TXD
F15/GPIO95/LIN1_RXD/CAN2_RXD
G2/GPIO98/FLEXPWM_0_X2/DSPI1_CS1
G3/GPIO99/FLEXPWM_0_A2/ETIMER_0_ETC4
G4/GPIO100/FLEXPWM_0_B2/ETIMER_0_ETC5
G5/GPIO101/FLEXPWM_0_X3/DSPI2_CS3
G6/GPIO102/FLEXPWM_0_A3
G7/GPIO103/FLEXPWM_0_B3
G8/GPIO104/FLEXRAY_FR_DBG0/DSPI0_CS1/SIUL2_REQ21/FLEXPWM_0_FAULT0
G9/GPIO105/FLEXRAY_FR_DBG1/DSPI1_CS1/SIUL2_REQ29/FLEXPWM_0_FAULT1
G10/GPIO106/FLEXRAY_FR_DBG2/DSPI2_CS3/FLEXPWM_0_FAULT2
G11/GPIO107/FLEXRAY_FR_DBG3/FLEXPWM_0_FAULT3
D0/GPIO48/FLEXRAY_FR_A_TX/ETIMER_1_ETC1/FLEXPWM_0_B1
D1/GPIO49/ETIMER_1_ETC2/CTU_0_EXT_TGR/FLEXRAY_FR_A_RX
D2/GPIO50/ETIMER_1_ETC3/FLEXPWM_0_X3/FLEXRAY_FR_B_RX
D3/GPIO51/FLEXRAY_FR_B_TX/ETIMER_1_ETC4/FLEXPWM_0_A3
D4/GPIO52/FLEXRAY_FR_B_TXEN/ETIMER_1_ETC5/FLEXPWM_0_B3
D5/GPIO53/DSPI0_CS3/FLEXPWM_0_FAULT2/SENT0_SENT_RX0
D6/GPIO54/DSPI0_CS2/FLEXPWM_0_X3/FLEXPWM_0_FAULT1
D7/GPIO55/SWGOUT_SWG/DSPI1_CS3/DSPI0_CS4/SENT1_SENT_RX0
D8/GPIO56/DSPI1_CS2/ETIMER_1_ETC4/DSPI0_CS5/FLEXPWM_0_FAULT3
D9/GPIO57/FLEXPWM_0_X0/LIN1_TXD
D10/GPIO58/FLEXPWM_0_A0/ETIMER_0_ETC0
D11/GPIO59/FLEXPWM_0_B0/ETIMER_0_ETC1
D12/GPIO60/FLEXPWM_0_X1/DSPI1_CS6/LIN1_RXD
D14/GPIO62/FLEXPWM_0_B1/ETIMER_0_ETC3
BCTRL
VDD_HV_AD0_VDDE/VDD_HV_ADRE0/VDD_HV_ADSW0
VDD_HV_AD1_VDDE/VDD_HV_ADRE1/VDD_HV_ADSW1
27
97
72
6
21
91
126
36
C0/GPI32/ADC1_AN3
C1/GPI33/ADC0_AN2
C2/GPI34/ADC0_AN3
C4/GPIO36/DSPI0_CS0/FLEXPWM_0_X1/SSCM_DEBUG4/SIUL2_REQ22
C5/GPIO37/DSPI0_SCK/SSCM_DEBUG5/FLEXPWM_0_FAULT3/SIUL2_REQ23
C6/GPIO38/DSPI0_SOUT/FLEXPWM_0_B1/SSCM_DEBUG6/SIUL2_REQ24
C7/GPIO39/FLEXPWM_0_A1/SSCM_DEBUG7/DSPI0_SIN
C10/GPIO42/DSPI2_CS2/FLEXPWM_0_A3/FLEXPWM_0_FAULT1
C11/GPIO43/ETIMER_0_ETC4/DSPI2_CS2
C12/GPIO44/ETIMER_0_ETC5/DSPI2_CS3
C13/GPIO45/ETIMER_1_ETC1/FLEXPWM_1_A0/CTU_0_EXT_IN/FLEXPWM_0_EXT_SYNC
C14/GPIO46/ETIMER_1_ETC2/CTU_0_EXT_TGR/DSPI1_CS7/FLEXPWM_1_B0
C15/GPIO47/FLEXRAY_FR_A_TXEN/ETIMER_1_ETC0/FLEXPWM_0_A1/CTU_0_EXT_IN/FLEXPWM_0_EXT_SYNC
VSS_OSC
VSS_HV_AD0_VSSE/VSS_HV_ADRE0/VSS_HV_ADSW0
VSS_HV_AD1_VSSE/VSS_HV_ADRE1/VSS_HV_ADSW1
VPP_TEST
B0/GPIO16/CAN0_TXD/ETIMER_1_ETC2/SSCM_DEBUG0/SIUL2_REQ15
B1/GPIO17/ETIMER_1_ETC3/SSCM_DEBUG1/CAN0_RXD/CAN1_RXD/SIUL2_REQ16
B2/GPIO18/LIN0_TXD/SSCM_DEBUG2/SIUL2_REQ17
B3/GPIO19/SSCM_DEBUG3/LIN0_RXD
B4/GPIO20/TDO
B5/GPIO21/TDI
B6/GPIO22/MC_RGM_CLK_OUT/DSPI2_CS2/SIUL2_REQ18
B7/GPI23/ADC0_AN0/LIN0_RXD
B8/GPI24/ADC0_AN1/ETIMER_0_ETC5
B9/GPI25/ADC0_AN2
B10/GPI26/ADC0_ADC1_AN12
B11/GPI27/ADC0_ADC1_AN13
B12/GPI28/ADC0_ADC1_AN14
B13/GPI29/ADC1_AN0/LIN1_RXD
B14/GPI30/ADC1_AN1/ETIMER_0_ETC4/SIUL2_REQ19
B15/GPI31/ADC1_AN2/SIUL2_REQ20
VSS_HV_ADV0/1
125
3
140
128
129
33
34
37
32
26
76
78
99
105
VDD_HV_OSC0
VDD_HV_FLA0
PTD0
PTD1
PTD2
PTD3
PTD4
PTD5
PTD6
PTD7
PTD8
PTD9
PTD10
PTD11
PTD12
PTD14
VDD_HV_PMU/VDD_HV_PMU_AUX
66
41
45
11
13
142
15
111
80
82
101
103
124
VDD_LV_PLL
PTC0
PTC1
PTC2
PTC4
PTC5
PTC6
PTC7
PTC10
PTC11
PTC12
PTC13
PTC14
PTC15
VDD_HV_IO_1
VDD_HV_IO_2
VDD_HV_IO_3
VDD_HV_IO_4
109
110
114
116
89
86
138
43
47
52
53
54
55
60
64
62
18
39
70
93
131
135
VDD_LV_1
VDD_LV_2
VDD_LV_3
VDD_LV_4
VDD_LV_5
VDD_LV_6
PTB0
PTB1
PTB2
PTB3
PTB4
PTB5
PTB6
PTB7
PTB8
PTB9
PTB10
PTB11
PTB12
PTB13
PTB14
PTB15
A0/GPIO0/ETIMER_0_ETC0/DSPI2_SCK/SIUL2_REQ0
A1/GPIO1/ETIMER_0_ETC1/DSPI2_SOUT/SIUL2_REQ1
A2/GPIO2/ETIMER_0_ETC2/FLEXPWM_0_A3/MC_RGM_ABS1/DSPI2_SIN/SIUL2_REQ2
A3/GPIO3/ETIMER_0_ETC3/DSPI2_CS0/FLEXPWM_0_B3/MC_RGM_ABS2/SIUL2_REQ3
A4/GPIO4/ETIMER_1_ETC0/DSPI2_CS1/ETIMER_0_ETC4/FLEXPWM_1_A2/SIUL2_REQ4/MC_RGM_FAB
A5/GPIO5/DSPI1_CS0/ETIMER_1_ETC5/DSPI0_CS7/SIUL2_REQ5
A6/GPIO6/DSPI1_SCK/ETIMER_2_ETC2/SIUL2_REQ6
A7/GPIO7/DSPI1_SOUT/ETIMER_2_ETC3/SIUL2_REQ7
A8/GPIO8/ETIMER_2_ETC4/DSPI1_SIN/SIUL2_REQ8
A9/GPIO9/DSPI2_CS1/ETIMER_2_ETC5/FLEXPWM_0_B3/FLEXPWM_0_FAULT0
A10/GPIO10/DSPI2_CS0/FLEXPWM_0_B0/FLEXPWM_0_X2/SIUL2_REQ9
A11/GPIO11/DSPI2_SCK/FLEXPWM_0_A0/FLEXPWM_0_A2/SIUL2_REQ10
A12/GPIO12/DSPI2_SOUT/FLEXPWM_0_A2/FLEXPWM_0_B2/SIUL2_REQ11
A13/GPIO13/FLEXPWM_0_B2/FLEXPWM_0_FAULT0/DSPI2_SIN/SIUL2_REQ12
A14/GPIO14/CAN1_TXD/ETIMER_1_ETC4/SIUL2_REQ13
A15/GPIO15/ETIMER_1_ETC5/CAN0_RXD/CAN1_RXD/SIUL2_REQ14
17
40
71
94
96
132
137
pag{4}
73
74
84
92
108
14
2
10
12
134
118
120
122
136
143
144
BCTRL
BCTRL
C205
0.1UF
J8/GPIO152/ETIMER_2_ETC4/ETIMER_2_ETC2/CAN2_RXD
J9/GPIO153/ETIMER_2_ETC5/NPC_NEX_RDY/CTU_1_EXT_IN
RESET
EXT_POR
FCCU_F0
FCCU_F1
TMS
TCK
JCOMP
MDO0
NMI
XTAL
EXTAL
68
49
42
44
46
48
61
63
65
67
117
119
121
PTE0
PTE2
PTE4
PTE5
PTE6
PTE7
PTE9
PTE10
PTE11
PTE12
PTE13
PTE14
PTE15
133
139
4
5
8
19
20
23
24
25
106
112
115
113
PTF0
PTF3
PTF4
PTF5
PTF6
PTF7
PTF8
PTF9
PTF10
PTF11
PTF12
PTF13
PTF14
PTF15
102
104
100
85
98
83
81
79
77
75
PTG2
PTG3
PTG4
PTG5
PTG6
PTG7
PTG8
PTG9
PTG10
PTG11
pag{4,8}
PTF[0..15]
pag{4,7,8,9}
PTG[2..11]
pag{4,8}
C
95
16
LPJ8
LPJ9
LPJ8
LPJ9
31
pag{4}
pag{4}
RESET_B
130
pag{4,6,7,8}
B
LEXT_POR_B
LEXT_POR_B
38
141
FCCU_F0
FCCU_F1
87
88
123
9
pag{4}
pag{4,6}
pag{4,6}
TMS pag{4,7}
TCK pag{4,7}
JCOMP pag{4,7}
MDO0 pag{4,7}
1
29
30
PTE[0..15]
NMI_B
XTAL
EXTAL
pag{4,6}
XTAL pag{4}
EXTAL pag{4}
51
57
pag{4}
PTA0
PTA1
PTA2
PTA3
PTA4
PTA5
PTA6
PTA7
PTA8
PTA9
PTA10
PTA11
PTA12
PTA13
PTA14
PTA15
VSS_HV_OSC0
B
VDD_HV_IO
C254
VDD_HV_ADR1
59
PTD[0..14]
VDD_HV_IO
C200
VDD_HV_ADR0
28
pag{4,9}
VDD_HV_IO
C202
VDD_HV_ADV0/1
VSS_HV_IO_1
VSS_HV_IO_2
VSS_HV_IO_3
VSS_HV_IO_4
PTC[0..15]
VDD_HV_IO
C219
74LVC125
VSS_LV_PLL
pag{4,6,8,9}
VDD_HV_IO
C247
3
7
22
90
127
PTB6
VDD_HV_IO
C218
VDD_HV_FLA0
VDD_HV_IO
1Y
35
DNP
CLK_OUT
VDD_HV_IO
C250
6
VSS_LV_1
VSS_LV_3
VSS_LV_4
VSS_LV_5
VSS_LV_6
VSS_LV_7
VSS_LV_8
TP26
VDD_HV_IO
C242
8
PTA[0..15]
PTB[0..15]
VDD_HV_IO
C207
11
U2
DNP
PPC5744PFK0MLQ8
pag{4,6,7,9}
VDD_HV_IO
C253
VDD_HV_OSC0
4Y
VDD_LV_CORE
C
VDD_HV_IO
C251
0.1UF
3OE
3A
7
1
2
pag{4,7,8}
VDD_HV_IO
C206
14
R220
10.0K
VCC
R219
10.0K
GND
Default: 1-2, 3-4, 5-6
(Boot from Flash or Static)
VDD_HV_IO
VSSA
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
MPC5744P-144DC
Page Title:
MPC5744 MCU
5
4
3
2
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Rev
B
SCH-27513: SPF-27513
Sheet
1
5
of
9
5
4
3
2
1
TP25
C
1
VSUP
2
VSUP12
VSW12
C10
0.1UF
C20
0.1UF
3
MBRS540T3G
C3
C2
0.1UF
0.01UF
1uH
1101M2S3CQE2
C6
330UF
+
C9
4.7UF
C11
4.7UF
2
V_PRE
22uH
D14
MBRS540T3G
SB_VCORE
1
VSW_CORE
C22
C21
47UF
10uF
2
SB_VCORE
2.2uH
D13
MBR230LSFT1G
C19
0.1UF
R16
249K
R17
2.15K
C17
10uF
X
A
A
R12
4.99K
TP17
V_PRE
L8
1
C
2
EXT_PWR
P2
CON_1_PWR
TP18
L4
C
A
EXT_PWR_SW
TP11
L3
2
1
1
2
3
TP10
VSUP
D9
1
TP4
SW3
TP14
C18
0.1UF
C15
56PF
D
D
FB_CORE
BOOT_PRE
SBC_VSENSE
R18
80.6K
1.25V_DC_LR
3.3V_DC_LR
BOOT_CORE
5V_DC_LR
2
R19
82.5K
TP2
C12
1uF
TP16
SB_VAUX_E
COMP_CORE
3
4
E
1
SB_VAUX_B
VCAN
3
S5K
40
R22
4.99K
HDR_2X3
39
38
C8
C7
0.1UF
4.7UF
7
31
SBC_SEL
33
32
36
35
37
VPRE
44
46
48
47
VSENSE
SB_VCORE
FCCU_F0
FCCU_F1
VAUX_E
VCORE_SNS
VAUX_B
VAUX
VCCA_E
CAN_5V
VCCA_B
VCCA
SELECT
VDDIO
12
13
18
19
10
11
SBC_IO0
SBC_IO1
SBC_IO2
SBC_IO3
SBC_IO4
SBC_IO5
MOSI
MISO
SCLK
NCS
IO_0
IO_1
IO_2
IO_3
IO_4
IO_5
MUX_OUT
INT
HDR_2X6
9
C4
C5
47PF
47PF
R11
60.4
R10
60.4
EP
DGND
RXD
TXD
RXD_L
TXD_L
C248
C249
41
22UF
0.1UF
42
43
30
26
25
27
28
SBC_MOSI
SBC_MISO
SBC_SCK
SBC_CS
17
SBC_INT_B
24
SBC_RST_B
1
LIN
DSPI0_SIN
PTC7
8
DSPI0_SCK
PTC5
11
DSPI0_CS0
PTC4
14
ADC0
PTB7
pag{4,5,8,9}
PTB[0..15]
pag{4,5,7,9}
17
C
MB_PTC4
MB_PTC5
MB_PTC7
MB_PTC6
SB_VCORE
pag{8}
pag{8}
pag{8}
pag{8}
VDD_HV_IO
14
SBC_FS0_B
15
SBC_FS1
R21
10.0K
TP9
R247
10.0K
Default: No Shunts
(RESET & NMI don't
go to the SBC)
R246
10.0K
R1
10.0K
J2
21
20
23
22
1
3
5
R20
200K
2
4
6
NMI_B
RESET_B
NMI_B pag{4,5}
RESET_B pag{4,5,7,8}
HDR_2X3
MC33907 [CUT2.1]
1
3
2
4
CANH_T
CAN
TERMINATION
EXT_POR_B
CAN_TERM
Default: 1-2
(Master Mode)
Default: 2-3, 5-6, 8-9, 11-12
(CAN and LIN connect to
the Mother Board)
EXT_POR_B
CAN0_TXD
CAN0_RXD
pag{4,7}
5
2
PTB0
PTB1
J17
1
4
7
10
SBC_CAN_RXD
SBC_CAN_TXD
SBC_LIN_RXD
SBC_LIN_TXD
3
6
9
12
MB_CAN_RXD
MB_CAN_TXD
MB_LIN_RXD
MB_LIN_TXD
MB_CAN_RXD
pag{8}
MB_CAN_TXD pag{8} B
MB_LIN_RXD
pag{9}
MB_LIN_TXD pag{9}
Vsup
R14
8
11
MASTER/SLAVE
1
2
VSUP
5
SBC_MUX_OUT
29
J15
HDR 1X2 TH
1
2
3
4
PTC6
MB_PTC4
MB_PTC5
MB_PTC7
MB_PTC6
C1
4700PF
J14
DSPI0_SOUT
HDR_2X2
D8
NUP2105L
B
2
HDR 3X6
2
3
LIN
34
1
3
4
6
7
9
10
12
13
15
16
18
J9
CANL_T
L1
330 OHM
FS0
CANL
49
5
M1
CANH
FS1
CANH
CANL
Default: 1-3, 2-4
(Terminate CAN)
RST
45
3 DR_CANL
ZJYS51R5-2P
8
AGND
2
DR_CANH
16
5
9
4
8
3
7
2
6
1
4
GND_COM
L2
1
CAN_SHLD
6
CAN
2
4
6
8
10
12
1
J8
DB9
Female
M2
2
pag{4,5}
pag{4,5}
1
3
5
7
9
11
PTC[0..15]
SB_VCCA
J18
J10
C
Default: 2-3, 5-6, 8-9, 11-12
(Connect DSPI to Mother Board.
SBC_MUX_OUT doesn't
connect to ADC0)
TP24
D11
LIN_MS
W
1.0K
C
HDR 3X4
A
PTB2
PTB3
LIN0_TXD
LIN0_RXD
MMSD914T1
LIN
SBC Power Indicators
CON PLUG 4
R212
10.0K
D3
LED_YELLOW
0.1UF
FS1
D2
LED_YELLOW
D12
LED_YELLOW
FS0
D1
LED_YELLOW
VCAN
SB_VAUX
D17
LED_YELLOW
SB_VCCA
A
POR
SB_VCORE
A
RESET
VDD_HV_IO
A
C201
VDD_HV_IO
A
VDD_HV_IO
A
VDD_HV_IO
A
VDD_HV_IO
A
C13
220PF
D10
LED_YELLOW
D15
LED_YELLOW
V_PRE
VSUP
A
R23
49.9K
VSUP3
COMP_CORE
2
4
6
FB_CORE
4
22UF
1
3
5
BOOT_CORE
S50K
VSW_CORE
selection
Mode
Normal
Normal
Debug (Default)
Debug
GATE_LS
voltage
Shunt
4-6
3-5
2-4
1-3
BOOT_PRE
VCAN
J24
Vcca/Vaux
Vaux
3.3V
3.3V
3.3V
3.3V
U3
TP8
C14
VSW1
VSW2
SB_VAUX
1
2
BCP52-16
VSUP1
VSUP2
4
2
C
V_PRE
Vcca
3.3V
5.0V
3.3V
5.0V
TP15
Q2
B
TP23
SB_VAUX
TP7
C16
100pF
3
CON_4_TB
TP3
Y
A
1
A
J4
D16
LED_YELLOW
D18
LED_YELLOW
D7
LED_YELLOW
R4
680
3
R3
680
R15
5.23K
VDD_HV_IO
U200D
AB15AP
9
8
1
VDD_HV_IO
7
SN74LVC06
LED_VCCA_R
LED_VPRE_R
C
C
C
LED_VAUX_R
R248
680
R245
680
R24
2.7K
LED_VSUP_R
R9
6.19K
External (Terminal Block) Power Indicators
GND
SN74LVC06
3.3V_DC_LR
3.3V_DC_LR
A
11
R13
1.8K
U200A
VCC
2
D6
LED_YELLOW
U200E
POR_SW
LED_VCAN_R
R213
10.0K
R214
10.0K
A
R240
680
10
1.25V_DC_LR
5V_DC_LR
A
A
14
R216
10.0K
R2
680
A
2
RST_SW_B
LED_VCORE_R
VDD_HV_IO
SN74LVC06
1
LED_FS0_R
C
LED_FS1_R
C
LED_POR_R
C
LED_RST_R
C
6
VDD_HV_IO
C
5
C
RST_SW
SW2
C
U200C
D5
LED_YELLOW
D4
LED_YELLOW
3 1.25_GND_R
R217
10.0K
R1
R215
10.0K
U200F
R8
680
U200B
AB15AP
13
12
SN74LVC06
4
2
R7
680
LED_3.3_DC_R
R6
680
LED_5V_DC_R
R5
1.8K
ICAP Classification:
Drawing Title:
3
FCP: ___
FIUO: ___
PUBI: X
MPC5744P-144DC
Page Title:
PDTC115T
POR_SW_B
5
LED_1.25_DC_R
1
2
1
C
VDD_HV_IO
SN74LVC06
C
VDD_HV_IO
3
C
Q1
SW1
Power, RST, LIN, CAN
4
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Rev
B
SCH-27513: SPF-27513
SN74LVC06
3
2
Sheet
1
6
of
9
5
4
3
2
1
JTAG & NEXUS PARALLEL TRACE
D
D
pag{4,9}
pag{4,5,8,9}
PTJ[8..9]
PTF[0..15]
pag{4,5}
MDO0
VDD_HV_IO
NEXUS PARALLEL TRACE
pag{4,5,6,8}
RESET_B
pag{4,5,8}
PTA[0..15]
pag{4,5,6,9}
PTB[0..15]
P1
PTA4
PTB4
pag{4,5}
pag{4,5}
pag{4,5}
C
TCK
TMS
PTB5
JCOMP
JCOMP
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
MC_RGM_FAB
RESET_B
TDO
TCK
TMS
TDI
VSUP
39
40
VDD_HV_IO
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
G1
G2
G3
G4
G5
R205
10.0K
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
NEXUS_EVTI_IN
PTF11
NPC_NEX_RDY_B
PTJ9
NPC_WRAPPER_MDO3
NPC_WRAPPER_MDO2
NPC_WRAPPER_MDO1
MDO0
NPC_WRAPPER_EVTO_B
NPC_WRAPPER_MCKO
NPC_WRAPPER_MSEO1_B
NPC_WRAPPER_MSEO0_B
PTF4
PTF5
PTF6
C
PTF10
PTF7
PTF8
PTF9
41
42
43
HDR_2X19_F
JTAG
VDD_HV_IO
J5
PTB5
PTB4
PTF11
PTJ9
B
TDI
TDO
TCK
NPC_WRAPPER_EVTI_IN
RESET_B
NPC_NEX_RDY_B
1
3
5
7
9
11
13
2
4
6
8
10
12
14
EXT_POR_B
TMS
JCOMP
B
CON_2X7
pag{4,6}
EXT_POR_B
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
MPC5744P-144DC
Page Title:
JTAG & NEXUS
5
4
3
2
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Rev
B
SCH-27513: SPF-27513
Sheet
1
7
of
9
5
4
3
2
1
Mother Board connections - 1
pag{4,5,7}
PTA[0..15]
pag{4,5,6,9}
PTC[0..15]
pag{4,5}
PTE[0..15]
pag{4,5}
PTG[2..11]
pag{4,5,7,9}
PTF[0..15]
PTA[0..15]
PTC[0..15]
PTE[0..15]
PTG[2..11]
D
D
3.3V_MB_SR
3.3V_MB_SR
1.25V_MB_SR
5V_MB_LR
1.25V_MB_SR
J201B
3.3V_MB_SR
1.25V_MB_SR
3.3V_MB_SR
J201A
PTA0
PTA2
PTA4
PTA6
PTA8
PTA10
PTA12
C
pag{6}
pag{6}
pag{6}
MB_PTC4
MB_PTC6
MB_CAN_RXD
PTC0
PTC2
MB_PTC4
MB_PTC6
MB_CAN_RXD
PTC10
PTC12
PTC14
PTF15
LIN1_RXD
PTG9
PTG11
FR_DBG_1
FR_DBG_3
PTG2
PTG4
PTG6
PTA15
CAN1_RXD
PTE0
PTE2
PTE4
PTE6
B
PTE10
PTE12
PTE14
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
PTA1
PTA3
PTA5
PTA7
PTA9
PTA11
PTA13
RESET_B
PTC1
MB_PTC5
MB_PTC7
MB_CAN_TXD
MB_PTC5 pag{6}
MB_PTC7 pag{6}
MB_CAN_TXD pag{6}
PTC11
PTC13
CAN1_TXD
PTA14
LIN1_TXD
PTF14
PTG8
PTG10
PTG3
PTG5
PTG7
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
233
235
237
239
SH1
SH2
SH3
SH4
SH5
SH6
SH7
SH8
PTE5
PTE7
PTE9
PTE11
PTE13
PTE15
CON 2X120 SKT
pag{4,5,6,7}
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
233
235
237
239
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
SH1
SH2
SH3
SH4
SH5
SH6
SH7
SH8
SH9
SH10
SH11
SH12
SH13
SH14
SH15
SH16
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
C
B
SH9
SH10
SH11
SH12
SH13
SH14
SH15
SH16
CON 2X120 SKT
RESET_B
3.3V_MB_SR
VDD_HV_IO_MAIN
5V_MB_SR
J13
5V_MB_SR
VDD_HV_IO_MAIN
3.3V_MB_SR
1
2
3
Default: 2-3
(Use 3.3V for MB
transceivers)
HDR TH 1X3
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
MPC5744P-144DC
Page Title:
MB Connections 1
5
4
3
2
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Rev
B
SCH-27513: SPF-27513
Sheet
1
8
of
9
5
4
3
2
1
Mother Board connections - 2
D
D
pag{4,5,6,7}
PTB[0..15]
pag{4,5}
PTD[0..14]
pag{4,5,7,8}
PTF[0..15]
pag{4,7}
pag{4,5,6,8}
PTB[0..15]
PTD[0..14]
PTF[0..15]
PTJ[8..9]
PTJ[8..9]
PTC[0..15]
3.3V_MB_SR
3.3V_MB_SR
1.25V_MB_SR
3.3V_MB_SR
1.25V_MB_SR
3.3V_MB_SR
5V_MB_SR
5V_MB_SR
1.25V_MB_SR
1.25V_MB_SR
5V_MB_LR
J200A
J200B
SH16
SH15
SH14
SH13
SH12
SH11
SH10
SH9
C
120
118
116
114
112
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
68
66
64
62
60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
B
120
118
116
114
112
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
68
66
64
62
60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
119
117
115
113
111
109
107
105
103
101
99
97
95
93
91
89
87
85
83
81
79
77
75
73
71
69
67
65
63
61
59
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
119
117
115
113
111
109
107
105
103
101
99
97
95
93
91
89
87
85
83
81
79
77
75
73
71
69
67
65
63
61
59
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
PTB7
PTB13
PTB9
PTB5
PTB11
PTB15
pag{6}
R207
0
RPTB5
PTD6
PTD8
PTD10
PTD12
MB_LIN_TXD
MB_LIN_TXD
PTF0
PTF4
PTF6
PTF8
PTF10
PTF12
R208
R209
R210
R211
0
0
0
0
PTD14
PTD4
PTC15
PTD2
PTJ8
VDD_HV_IO_MAIN
CON 2X120 SKT
VDD_HV_IO_MAIN
FR_B_TXEN
FR_A_TXEN
FR_B_RX
RPTF4
RPTF6
RPTF8
RPTF10
240
238
236
234
232
230
228
226
224
222
220
218
216
214
212
210
208
206
204
202
200
198
196
194
192
190
188
186
184
182
180
178
176
174
172
170
168
166
164
162
160
158
156
154
152
150
148
146
144
142
140
138
136
134
132
130
128
126
124
122
SH16
SH15
SH14
SH13
SH12
SH11
SH10
SH9
SH8
SH7
SH6
SH5
SH4
SH3
SH2
SH1
240
238
236
234
232
230
228
226
224
222
220
218
216
214
212
210
208
206
204
202
200
198
196
194
192
190
188
186
184
182
180
178
176
174
172
170
168
166
164
162
160
158
156
154
152
150
148
146
144
142
140
138
136
134
132
130
128
126
124
122
239
237
235
233
231
229
227
225
223
221
219
217
215
213
211
209
207
205
203
201
199
197
195
193
191
189
187
185
183
181
179
177
175
173
171
169
167
165
163
161
159
157
155
153
151
149
147
145
143
141
139
137
135
133
131
129
127
125
123
121
SH8
SH7
SH6
SH5
SH4
SH3
SH2
SH1
239
237
235
233
231
229
227
225
223
221
219
217
215
213
211
209
207
205
203
201
199
197
195
193
191
189
187
185
183
181
179
177
175
173
171
169
167
165
163
161
159
157
155
153
151
149
147
145
143
141
139
137
135
133
131
129
127
125
123
121
C
RPTB4
R200
PTB8
PTB14
PTB10
PTB4
PTB6
PTB12
0
PTD5
PTD7
PTD9
PTD11
MB_LIN_RXD
RPTF5
RPTF7
RPTF9
RPTF11
RPTJ9
R201
R202
R203
R204
pag{6}
PTF3
PTF5
PTF7
PTF9
PTF11
PTF13
0
0
0
0
FR_B_TX
PTD3
FR_A_TX
FR_A_RX
PTD0
PTD1
R206
MB_LIN_RXD
0
B
PTJ9
CON 2X120 SKT
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
MPC5744P-144DC
Page Title:
MB Connections 2
5
4
3
2
Size
C
Document Number
Date:
Tuesday, July 02, 2013
Rev
B
SCH-27513: SPF-27513
Sheet
1
9
of
9
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