INTEGRATED CIRCUITS DATA SHEET TDA1543 Dual 16-bit DAC (economy version) (I2S input format) Product specification File under Integrated Circuits, IC01 February 1991 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 FEATURES GENERAL DESCRIPTION • Low distortion The TDA1543 is a monolithic integrated dual 16-bit digital-to-analog converter (DAC) designed as an economy version for use in hi-fi digital audio equipment such as Compact Disc players, digital tape or cassette recorders, digital sound in TV sets and in digital amplifiers. • 16-bit dynamic range • 4 × oversampling possible • Single 5 V power supply • No external components required • No requirement for external deglitcher circuitry due to fast settling output current • Adjustable bias current • Internal timing and control circuits • I2S input format: time multiplexed, two's complement, TTL. ORDERING INFORMATION PACKAGE EXTENDED TYPE NUMBER PINS PIN POSITION MATERIAL CODE TDA1543(1) 8 DIL plastic SOT97 TDA1543T(2) 16 mini-pack plastic SO16L;SOT162A Notes 1. SOT97-1; 1996 August 13. 2. SOT162-1 1996 August 13. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDD supply voltage 3.0 5.0 8.0 V IDD supply current − 50 60 mA IFS full scale output current 1.95 2.30 2.65 mA THD total harmonic distortion including noise − −75 −70 dB at 0 dB − 0.018 0.032 % including noise − −30 −23 dB THD total harmonic distortion − 3.2 7.9 % tcs current settling time to ± 1 LSB − 0.5 − µs BR input bit rate at data input − − 9.2 Mbits/s fBCK clock frequency at clock input − − 9.2 MHz at −60 dB S/N signal-to-noise ratio 90 96 − dB TCFS full scale temperature coefficient at analog outputs (AOL; AOR) − ± 500 × 10−6 − K−1 Tamb operating ambient temperature range −30 − +85 °C Ptot total power dissipation − 250 − mW Ibias bias current (adjustable) −0.6 − 5.0 mA February 1991 at bipolar zero 2 February 1991 3 3 2 LE CONTROL & TIMING LEFT INPUT LATCH ADDRESS POINTER RIGHT INPUT LATCH CURRENT SOURCE CURRENT SOURCE Fig.1 Block diagram. I BR TDA1543 REFERENCE SOURCE I BL 5-BIT PASSIVE DIVIDER RIGHT BIT SWITCHES 11-BIT PASSIVE DIVIDER LE 11-BIT PASSIVE DIVIDER LE RIGHT OUTPUT LATCH I BL 6 AOL 8 AOR Vref Vref 4 ground 5 VDD MEA110 I ref 7 Vref I AOR I BR I AOL (1) 100 nF R bias 5V (2) 1.2 kΩ 3.3 nF (2) 1.2 kΩ 3.3 nF Vout right Vout left Dual 16-bit DAC (economy version) (I2S input format) (1) Optional. (2) 2 × 1/2 NE5532. DATA WS BCK 1 5-BIT PASSIVE DIVIDER LEFT BIT SWITCHES LEFT OUTPUT LATCH handbook, full pagewidth Philips Semiconductors Product specification TDA1543 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 PINNING SYMBOL PIN DESCRIPTION BCK 1 bit clock input WS 2 word select input DATA 3 data input GND 4 ground VDD 5 +5 V supply voltage AOL 6 left channel voltage output Vref 7 reference voltage output AOR 8 right channel output Fig.2 Pin configuration TDA1543. PINNING PIN DESCRIPTION n.c. 1 not connected n.c. 2 not connected BCK 3 bit clock input WS 4 word select input DATA 5 data input GND 6 ground n.c. 7 not connected DATA 5 12 AOL n.c. 8 not connected GND 6 11 VDD n.c. 9 not connected n.c. 7 10 n.c. n.c. 10 not connected VDD 11 +5 V supply voltage n.c. 8 9 n.c. AOL 12 left channel output Vref 13 reference voltage output AOR 14 right channel output n.c. 15 not connected n.c. 16 not connected SYMBOL February 1991 handbook, halfpage n.c. 1 16 n.c. n.c. 15 n.c. 2 BCK 3 14 AOR WS 4 TDA1543T 13 Vref MEA107 Fig.3 Pin configuration TDA1543T. 4 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 VDD BCK WS DATA (a) input pins BCK, WS and DATA. TDA1543 VDD V DD Vref (b) output pin Vref. TDA1543 V DD (c) output pins AOL and AOR. I bias AOL AOR I DAC TDA1543 MEA109 Fig.4 Circuits at the input and output pins. February 1991 5 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 FUNCTIONAL DESCRIPTION The TDA1543 accepts input serial data formats in two's complement with any bit length. Left and right data words are time multiplexed. The most significant bit (bit 1) must always be first. The format of data input is shown in Fig.5 and Fig.6. This flexible input data format (I2S) allows easy interfacing with signal processing chips such as interpolation filters, error correction circuits and audio signal processor circuits (ASP). The high maximum input bit-rate and fast settling current facilitates application in 4 × oversampling systems. An adjustable current is added to the output currents to bias output operational amplifiers (OP1; OP2) for maximum dynamic range (see Fig.1). With a LOW level on the word select (WS) input data is placed in the left input register and with a HIGH level on the WS input data is placed in the right input register. The data in the input registers is simultaneously latched in the output registers which control the bit switches. The output current of the DAC is a sink current. The current Iref at the Vref output is adjusted by a resistor or a current source. The current Iref is amplified with gain AIbias to the bias currents (IBL; IBR) which are added to the output currents. LIMITING VALUES In accordance with the Absolute Maximum System (lEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDD supply voltage range 0 9 V TXTAL crystal temperature − +150 °C Tstg storage temperature range −55 +150 °C Tamb operating ambient temperature range −30 +85 °C Ves electrostatic handling* −2000 +2000 V THERMAL RESISTANCE SYMBOL Rth j-a PARAMETER from junction to ambient 100 * Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor. February 1991 TYP. 6 UNIT K/W Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 CHARACTERISTICS VDD = 5 V; Tamb = + 25 °C; Iref = 0 mA; measured in the circuit of Fig.1; unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD supply voltage range 3.0 5.0 8.0 V IDD supply current note 1 − 50 60 mA RR ripple rejection note 2 − 50 − dB Digital inputs input current pins (1, 2 and 3) IIL digital inputs LOW Vl = 0.8 V − − −0.4 mA IIH digital inputs HIGH Vl = 2.0 V − − 20 µA input frequency/bit rate fBCK clock input pin 1 − − 9.2 MHz BR bit rate data input pin 3 − − 9.2 Mbits/s fWS word select input pin 2 − − 192 kHz − − 16 bits Analog outputs (AOL; AOR) Res resolution output voltage compliance VOC(AC) AC − ±25 − mV VOC(DC) DC 1.8 − VDD−1.2 V IFS full scale current 1.95 2.30 2.65 mA TCFS full scale temperature coefficient − ± 500 × 10−6 − K−1 Ioffset offset current −0.1 0.0 0.1 mA Ibias bias current (adjustable) −0.6 − 5.0 mA AIbias bias current gain 1.9 2.0 2.1 Iref = 0 mA Analog outputs (Vref) Vref reference voltage output 2.10 2.20 2.30 V Iref reference current output −0.3 − 2.5 mA THD total harmonic distortion −75 −70 dB 0.018 0.032 % − −30 −23 dB including noise at 0 dB; note 3, Fig.7 THD total harmonic distortion including noise at −60 dB; − 3.2 7.9 % tcs settling time ±1 LSB − 0.5 − µs α channel separation 85 90 − dB − < 0.2 0.3 dB − < 0.2 − µs 90 96 − dB note 3, Fig.7 |dIO| unbalance between outputs |td| time delay between outputs S/N signal-to-noise ratio February 1991 note 4 at bipolar zero; note 5 7 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) SYMBOL PARAMETER TDA1543 CONDITIONS MIN. TYP. MAX. UNIT Timing (Fig.5) tr rise time − − 32 ns tf fall time − − 32 ns tCY bit clock cycle time 108 − − ns tHB bit clock HIGH time 22 − − ns tLB bit clock LOW time 22 − − ns tSU;DAT data set-up time 32 − − ns tHD;DAT data hold time to bit clock note 6 2 − − ns tHD;WS word select hold time note 6 2 − − ns tSU;WS word select set-up time 32 − − ns Notes to the characteristics 1. Measured at IAOL = 0 mA and IAOR = 0 mA (code 8000H) and Ibias = 0 mA. 2. Vripple = 1% of supply voltage and fripple = 100 Hz. 3. Measured with 1 kHz sinewave generated at a sampling rate of 192 kHz. 4. Measured with 1 kHz full scale sinewave generated at a sampling rate of 192 kHz. 5. At code 0000H. 6. At this point tHD;DAT = 0 ns, this value has been fixed on 2 ns due to tolerances. Fig.5 Format of input signals (I2S format). February 1991 8 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) DATA TDA1543 LSB MSB LSB MSB BCK WS RIGHT LEFT MEA112 pagewidth Fig.6 Format of input signals. MEA111-1 handbook, full pagewidth – 20 10 THD (dB) THD (%) (1) – 30 – 40 1 – 50 – 60 0.1 (2) – 70 (3) 0.01 – 80 – 90 10 10 2 10 3 (1) Measured including all distortion plus noise over a 20 kHz bandwidth at a level of −60 dB. (2) Measured including all distortion plus noise over a 20 kHz bandwidth at a level of −24 dB. (3) Measured including all distortion plus noise over a 20 kHz bandwidth at a level of −0 dB. 10 frequency (Hz) Fig.7 Distortion as a function of frequency (4FS). February 1991 9 4 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 Notes to Fig.7 • The sample frequency 4FS: 176.4 kHz. • The supply voltage at the measurement = + 5 V (DC). • Ref: 0 dB is the output level of a full scale digital sine wave stimulus. • The graphs are constructed from average values of a small amount of engineering samples therefore no guarantee for typical values is implied. • The arrows indicate the specification limits for 0 dB and −60 dB level signals. February 1991 10 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 PACKAGE OUTLINES DIP8: plastic dual in-line package; 8 leads (300 mil) SOT97-1 ME seating plane D A2 A A1 L c Z w M b1 e (e 1) b MH b2 5 8 pin 1 index E 1 4 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.14 0.53 0.38 1.07 0.89 0.36 0.23 9.8 9.2 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 1.15 inches 0.17 0.020 0.13 0.068 0.045 0.021 0.015 0.042 0.035 0.014 0.009 0.39 0.36 0.26 0.24 0.10 0.30 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.045 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT97-1 050G01 MO-001AN February 1991 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-02-04 11 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 D E A X c HE y v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 10.5 10.1 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.41 0.40 0.30 0.29 0.050 0.42 0.39 inches 0.043 0.055 0.016 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT162-1 075E03 MS-013AA February 1991 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-24 12 o 8 0o Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format) TDA1543 The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. February 1991 13