TA84006F/FG TOSHIBA Bipolar Linear IC Silicon Monolithic TA84006F/FG Three-Phase Wave Motor Driver IC The TA84006F/FG is a three-phase wave motor driver IC. Used with a three-phase sensorless controller (TB6548F/FG or TB6537P/PG), the TA84006F/FG can provide PWM sensorless drive for three-phase brushless motors. Features • Built-in voltage detector • Overcurrent detector incorporated • Overheating protector incorporated • Multichip (MCH) structure Uses Pch-MOS for the upper output power transistor • Rated at 25 V/1.0 A • Package: SSOP30-P-375-1.00 Weight: 0.63 g (typ.) Note 1: This product has a multichip (MCP) structure utilizing Pch-MOS technology. The Pch-MOS structure is sensitive to electrostatic discharge and should therefore be handled with care. TA84006FG: The TA84006FG is Pb-free product. The following conditions apply to solderability: *Solderability 1. Use of Sn-37Pb solder bath *solder bath temperature = 230ºC *dipping time = 5 seconds *number of times = once *use of R-type flux 2. Use of Sn-3.0Ag-0.5Cu solder bath *solder bath temperature = 245ºC *dipping time = 5 seconds *number of times = once *use of R-type flux 1 2006-3-6 TA84006F/FG Block Diagram VCC IN_UP COMP N VM VZ Pin voltage detector IN_VP Pch-MOS FET × 3 IN_WP Control circuit IN_UN IN_VN OUT_U OUT_V IN_WN OUT_W Overheating protector Motor RF VISD1 ISD Overcurrent detector S_GND P_GND 2 VISD2 2006-3-6 TA84006F/FG Pin Assignment <TA84006F/FG> <TB6548F/FG> LV 1 30 OUT_V LW 2 29 VM1 OUT_W 3 28 OUT_U VM2 4 27 Lu VZ 5 26 NC LA0 1 24 WAVE LA1 2 23 OC PWM 3 22 OUT_WN RF1 6 25 RF2 CW_CCW 4 21 OUT_WP P_GND1 7 24 P_GND2 NC 5 20 NC NC 8 23 NC FG_OUT 6 19 OUT_VN ISD 9 22 NC NC 7 18 NC IN_WN 10 21 VISD2 SEL_LAP 8 17 OUT_VP IN_WP 11 20 VISD1 NC 9 16 NC IN_VN 12 19 COMP XT 10 15 OUT_UN IN_VP 13 18 N XTin 11 14 OUT_UP IN_UN 14 17 VCC GND 12 13 VDD IN_UP 15 16 S_GND 3 2006-3-6 TA84006F/FG Pin Description Pin No. Pin Symbol 1 LV V-phase output upper Pch gate pin Leave open. 2 LW W-phase output upper Pch gate pin Leave open. 3 OUT_W W-phase output pin Connects motor. 4 VM2 Motor drive power supply pin Externally connects to VM1. 5 VZ Reference voltage pin Used for the VM drop circuit reference voltage when VM (max) > = 22 V. Left open when VM (max) < = 22 V. 6 RF1 Output current detection pin Externally connected to RF2. (Connect a detection resistor between this pin and GND.) 7 P_GND1 Power GND pin Externally connects to P_GND2. 8 NC Not connected Pin Function Remarks ⎯ Overcurrent detection output pin Inputs the inversion of the ISD pin output to the OC pin of the TB6548F/FG (or TB6537P/PG/F/FG). IN_WN W-phase upper drive input pin Connects to the OUT_WN pin of the TB6548F/FG (or TB6537P/PGF/FG); incorporates pull-down resistor. 11 IN_WP W-phase lower drive input pin Connects to the OUT_WP pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-up resistor. 12 IN_VN V-phase upper drive input pin Connects to the OUT_VN pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-down resistor. 13 IN_VP V-phase lower drive input pin Connects to the OUT_VP pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-up resistor. 14 IN_UN U-phase upper drive input pin Connects to the OUT_UN pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-down resistor. 15 IN_UP U-phase lower drive input pin Connects to the OUT_UP pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-up resistor. 16 S_GND Signal GND pin 17 VCC 18 N 19 9 ISD 10 ⎯ Control power supply pin VCC (opr) = 4.5 to 5.5 V Mid-point pin Mid-point potential confirmation pin; left open COMP Location detection signal output pin Connects to the WAVE pin of the TB6548F/FG (or TB6537P/PG/F/FG). 20 VISD1 Overcurrent detection input pin 1 Externally connects to the RF2 pin. 21 VISD2 Overcurrent detection input pin 2 Connect a capacitor between this pin and GND. Internal resistor and capacitor used to reduce noise. 22 NC Not connected ⎯ 23 NC Not connected ⎯ 24 P_GND2 Power GND pin Externally connects to the P_GND1 pin. 25 RF2 Output current detection pin Externally connects to the RF1 pin. Connect a detection resistor between this pin and GND. 26 NC Not connected 27 Lu U-phase upper output Pch gate pin Leave open. 28 OUT_U U-phase output pin Connects motor. 29 VM1 Motor drive power supply pin Externally connects to the VM2 pin. 30 OUT_V V-phase output pin Connects the motor. ⎯ 4 2006-3-6 TA84006F/FG Absolute Maximum Ratings (Ta = 25°C) Characteristic Symbol Rating Unit Motor power supply voltage VM 25 V Control power supply voltage VCC 7 V Output current IO 1.0 A/phase Input voltage VIN GND − 0.3 ~VCC + 0.3 V V Power dissipation Pd 1.1 (Note 2) W 1.4 (Note 3) Operating temperature Topr −30~85 °C Storage temperature Tstg −55~150 °C Note 2: Standalone Note 3: When mounted on a PCB (50 × 50 × 1.6 mm; Cu area, 30%) Recommended Operating Conditions (Ta = −30~85°C) Symbol Test Circuit Test Conditions Min Typ. Max Unit Control power supply voltage VCC ⎯ ⎯ 4.5 5.0 5.5 V Motor power supply voltage VM ⎯ ⎯ 10 20 22 V Output current IO ⎯ ⎯ ⎯ ⎯ 0.5 A Input voltage VIN ⎯ ⎯ GND ⎯ VCC V fchop ⎯ ⎯ 15 20 50 kHz IZ ⎯ ⎯ ⎯ ⎯ 1.0 mA Characteristic Chopping frequency Vz current 5 2006-3-6 TA84006F/FG Electrical Characteristics (Ta = 25°C, VCC = 5 V, VM = 20 V) Characteristic Symbol Test Circuit VIN (H) 1 VIN (L) 1 IIN1 (H) 2 IIN2 (H) 2 Test Conditions Min Typ. Max 2.5 ⎯ 5.0 GND ⎯ 0.8 ⎯ ⎯ 20 300 450 600 IN_UP, IN_VP, IV_WP Input voltage IN_UN, IN_VN, IN_WN ⎯ VIN = 5 V, Unit V IN_UP, IN_VP, IN_WP VIN = 5V, IN_UN, IN_VN, IN_WN Input current VIN = GND, µA ⎯ ⎯ 1 300 450 600 Upper phase 1 ON, lower phase 1 ON, output open ⎯ 8.0 13.0 3 Upper phase 2 ON, synchronous regeneration mode, output open ⎯ 7.0 12.0 ICC3 3 All phases OFF, output open ⎯ 6.0 11.0 IM1 3 Upper phase 1 ON, lower phase 1 ON, output open ⎯ 2.0 3.5 IM2 3 Upper phase 2 ON, synchronous regeneration mode, output open ⎯ 2.0 3.5 IM3 3 All phases OFF, output open ⎯ 1.8 3.2 VSAT 4 IO = 0.5 A ⎯ 1.0 1.5 V Upper output ON-resistance Ron 5 IO = ±0.5 A, bi-directional ⎯ 0.65 1.0 Ω Lower diode forward voltage VF (L) 6 IF = 0.5 A ⎯ 1.2 1.6 V Upper diode forward voltage VF (H) 7 IF = 0.5 A ⎯ 0.9 1.4 V VN 8 9.88 10.4 10.92 V VCMP 9 9.88 10.4 10.92 V VOL (CMP) 9 GND ⎯ 0.5 V ROH (CMP) 9 ⎯ 7 10 13 kΩ VRF 10 ⎯ 0.45 0.5 0.55 V VOH (ISD) 10 IOH = 0.1 mA 4.5 ⎯ 5.0 V VOL (ISD) 10 IOL = 0.1 mA GND ⎯ 0.5 V Reference voltage VZ 11 IZ = 0.5 mA, Tj = 25°C 20.9 22.0 23.1 V TSD temperature TSD ⎯ Tj ⎯ 165 ⎯ °C ∆T ⎯ ⎯ 30 ⎯ °C IL (H) 12 ⎯ 0 100 IL (L) 13 ⎯ 0 50 Power supply current Lower output saturation voltage IIN1 (L) 2 IIN2 (L) 2 ICC1 3 ICC2 IN_UN, IN_VN, IN_WN VIN = GND, IN_UP, IN_VP, IN_WP mA VM = 20 V Mid-point voltage VRF = 0 V VM = 20 V Pin voltage detection level Pin voltage detection output voltage Overcurrent detection level Overcurrent detection output voltage TSD hysteresis width Output leakage current VRF = 0 V IOL = 1 mA ⎯ Pch-MOS ⎯ 6 µA 2006-3-6 TA84006F/FG Functions Input Output IN-P IN-N Upper Power Transistor Lower Power Transistor High High ON OFF High Low High ON ON Prohibit mode High Low OFF OFF High impedance Low Low OFF ON Low (Note 4) Connecting the TB6548F/FG (or TB6537P/PG/F/FG) to the TA84006F/FG allows electric motors to be controlled by PWM. Note 4: In Prohibit Mode, the output power transistor goes into vertical ON mode and through current may damage the circuit. Do not use the TA84006F/FG in this mode. This mode is not actuated when the TA84006F/FG is connected to the TB6548F/FG or TB6537P/PG/F/FG, but can be triggered by input noise during standalone testing. <Schematic> VM OUT-P IN-P Low active OUT TB6548F/FG (TB6537P/ PG/F/FG) <Lower PWM> Connecting the TA84006F/FG to the TB6537P/PG/F/FG controls the lower PWM. At chopping ON, the diagonally output power transistors are ON. At chopping OFF, the lower transistor is OFF, regenerating the motor current via the upper diode (incorporating the Pch-MOS). OUT-N IN-N VM High active ON OFF <Coil current route> Pch-MOS When chopping is ON VOUT When chopping is OFF OFF 7 2006-3-6 TA84006F/FG <Synchronous rectification PWM> Connecting the TA84006F/FG to the TB6548F/FG controls the synchronous rectification PWM. At chopping OFF, power dissipation is reduced by operating the Pch-MOS in reverse and regenerating the motor’s current. VM ON <Coil current route> Pch-MOS When chopping is ON VOUT When chopping is OFF OFF <Timing Chart> When controlling synchronous rectification PWM IN-P IN-N VOUT 8 2006-3-6 TA84006F/FG Equivalent Circuit <Overcurrent detector (RF, VISD, ISD) > • Input to the VISD1 pin the voltage generated at the overcurrent detection resistor RF connected to the RF pin. • At chopping ON, voltage spikes at the RF pin as a result of the Pch-MOS output capacitance. To cancel the spike, externally connect a capacitor to the VISD2 pin. (10 kΩ resistor built-in) • If the VISD2 pin voltage exceeds the internal reference voltage (VRF = 0.5 V), the overcurrent detection output ISD pin goes Low. Inputting the inversion of the ISD pin output to the TB6537P/PG/F/FG or TB6548F/FG OC pin limits the PWM ON time and the current at the ISD output rising edge. VCC VISD1 10 kΩ VISD2 0.5 V (typ.) ISD External capacitor <Pin voltage detector (COMP) > The pin voltage detector outputs the result of OR-ing the output pin voltages and the virtual mid-point N voltage to determine the majority. (If at least two phases of the three-phase output are greater than the mid-point potential, the detector outputs “Low”. Conversely, if at least two phases are smaller than the mid-point potential, the circuit outputs “High”.) 10 kΩ (typ.) • Majority-determining OR data VCC COMP GND • With the virtual mid-point potential VN used as the reference for the pin voltage detection circuit considered as half the voltage applied to the motor, then VN = [ (VM − Ron (upper) *IO) − (Vsat (lower) + VRF) ]/2 + Vsat + VRF = [VM − VRF + Vsat (lower) − Ron (upper) *IO]/2 + VRF. Here, assuming that: Vsat (lower) − Ron (upper) *IO ∼ − VF, we have set the following: VN = [VM − VRF + VF]/2 + VRF <Overheating protector> • Automatic restoration TSD (ON) = 165°C • Temperature hysteresis supported TSD (HYS) = 30°C 9 TSD (OFF) = 135°C 2006-3-6 TA84006F/FG <Example of 24 V support> • Incorporate a Zener diode and make the external connections shown in the diagram below. Design the device so that the voltage applied to the VM is clamped at 22 V below the maximum operating power supply voltage. • A capacitor is needed to control the effect of the counter-electromotive force. Verification is particularly necessary when the motor current is large at startup or at shutdown (output OFF). 24 V Vz pin fluctuation width 20.9 V to 23.1 V Due to the temperature characteristics (3.5 × 3 mV/°C), the following applies at an ambient temperature of 85°C: VZ Vz (max) = 23.1 + (85 − 25) × 3.5 × 3 mV = 23.73 V By taking the measures shown in the diagram on the right to bring the voltage down to 22 V, the following becomes the case: Vz (max) = 23.73 − (0.7 − 2 mV × (85 − 25) ) × 3 = 21.99 V 10 VM 2006-3-6 TA84006F/FG Example of Application Circuit VDD = 5 V VM = 20 V Location detection signal COMP WAVE PWM signal M TB6548F/FG TA84006F/FG RF GND Note 5: Overcurrent detection signal S_GND P_GND VISD2 1Ω ISD OC 0.01 µF VISD1 Utmost care is necessary in the design of the output, VCC, VM, and GND lines since the IC may be destroyed by short-circuiting between outputs, air contamination faults, or faults due to improper grounding, or by short-circuiting between contiguous pins. 11 2006-3-6 TA84006F/FG 5V 20 V Test Circuit 1: VIN (H), VIN (L) 17 1 2 27 4 29 19 10 18 11 500 Ω 28 12 TA84006F/FG 13 30 14 3 V 15 V V 6 0.8 V 2.5 V 25 16 7 24 9 20 21 Input VIN = 0.8 V/2.5 V, measure the output voltage, and test the function. 5V 20 V Test Circuit 2: IIN (H), IIN (L) 17 1 2 27 4 29 19 10 18 11 28 12 TA84006F/FG 13 30 14 3 15 6 25 5V A A 16 7 24 9 12 20 21 2006-3-6 TA84006F/FG Test Circuit 3: ICC1, ICC2, ICC3, IM1, IM2, IM3 ICC IM A 17 1 2 27 20 V 5V A 4 29 19 10 18 11 28 12 TA84006F/FG 13 30 14 3 15 6 0.8 V 2.5 V 25 16 7 24 9 20 21 ICC1, IM1: upper phase 1 ON, lower phase 1 ON (e.g., U-phase: H; V-phase: L; W-phase: Z) ICC2, IM2: upper phase 1 ON, synchronous regeneration mode (e.g., U-phase: H; V-phase: H; W-phase: Z) ICC3, IM3: all phases OFF 5V 20 V Test Circuit 4: Vsat 17 1 2 27 4 29 19 10 18 11 28 12 TA84006F/FG 30 14 3 Vsat V 15 6 0.5 A 13 25 16 7 24 9 13 20 21 2006-3-6 TA84006F/FG 5V 20 V Test Circuit 5: Ron 1 2 27 4 29 19 10 ±0.5 A 17 V1 V 18 11 28 12 TA84006F/FG 13 30 Ron = V1/0.5 14 3 15 6 25 5V 16 7 24 9 20 21 Test Circuit 6: VF (L) 17 1 2 27 4 29 19 10 18 11 28 12 TA84006F/FG 30 14 3 VF V 15 6 0.5 A 13 25 16 7 24 9 14 20 21 2006-3-6 TA84006F/FG Test Circuit 7: VF (H) 1 2 27 4 29 19 10 VF V 18 0.5 A 17 11 28 12 TA84006F/FG 13 30 14 3 15 6 25 16 7 24 9 20 21 5V 20 V Test Circuit 8: VN 17 1 2 27 4 29 19 10 18 11 28 12 VN V TA84006F/FG 13 30 14 3 15 6 25 16 7 24 9 15 20 21 2006-3-6 TA84006F/FG 5V 20 V Test Circuit 9: VCMP, VOL (CMP), ROH (CMP) 17 1 2 27 4 29 10 A SW1 19 18 B 10 kΩ V V2 11 28 12 TA84006F/FG 13 30 14 3 15 6 (1) (2) 7 24 9 20 9.88 V 5V 16 10.92 V 25 21 Where output phase 2 is High (10.92 V) and phase 1 is Low (= 9.88 V), set SW1 = A and measure V2 = VOL (CMP). Where output phase 1 is High (10.92 V) and phase 2 is Low (9.88 V), set SW1 = B and confirm that 5 V × 10 kΩ/(10 kΩ + 13 kΩ) < V2 < 5 V × 10 kΩ/(10 kΩ + 7 kΩ). 5V 20 V Test Circuit 10: VRF, VOH (ISD), VOL (ISD) 17 1 2 27 4 29 19 10 18 11 28 12 TA84006F/FG 13 30 14 6 25 7 24 9 20 21 A SW2 B V V3 (1) (2) 0.1 mA 0.1 mA 5V 16 0.55 V 15 0.45 V 3 Where VISD = 0.55 V, set SW2 = A and measure V3 = VOH (ISD). Where VISD = 0.45 V, set SW2 = B and measure V3 = VOL (ISD). 16 2006-3-6 TA84006F/FG Test Circuit 11: VZ V 17 1 2 27 5 0.5 mA VZ 4 29 19 10 18 11 28 12 TA84006F/FG 13 30 14 3 15 6 25 16 7 24 9 20 21 5V 25 V Test Circuit 12: IL (H) 17 1 2 27 4 29 19 10 Connect N pin to −0.3 V 18 11 28 12 TA84006F/FG 13 30 14 3 A 15 6 5V 25 16 7 24 9 17 20 21 2006-3-6 TA84006F/FG 5V 25 V Test Circuit Test Circuit 13: IL (L) 17 1 2 27 4 29 19 10 18 11 A 28 12 TA84006F/FG 13 30 14 3 15 6 5V 25 16 7 24 9 18 20 21 2006-3-6 TA84006F/FG Package Dimensions Weight: 0.63 g (typ.) 19 2006-3-6 TA84006F/FG Notes on Contents 1. Block Diagrams Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. Equivalent Circuits The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. Timing Charts Timing charts may be simplified for explanatory purposes. 4. Application Circuits The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. Test Circuits Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. IC Usage Considerations Notes on handling of ICs [1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. [4] Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time. 20 2006-3-6 TA84006F/FG Points to remember on handling of ICs (1) Thermal Shutdown Circuit Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation. (2) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (TJ) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (3) Back-EMF When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design. 21 2006-3-6 TA84006F/FG 22 2006-3-6