NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5.0 V Designed for 1.65 V to 5.5 V VCC Operation MARKING DIAGRAM 5.0 V Tolerant Inputs − Interface Capability with 5.0 V TTL Logic LVTTL Compatible LVCMOS Compatible US8 US SUFFIX CASE 493 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current (10 mA) Substantially Reduces System Power Requirements Replacement for NC7SZ74 • • Tiny Ultra Small Package Only 2.1 X 3.0 mm • High ESD Ratings: 2000 V Human Body Model M G MH M G = Date Code = Pb−Free Package High ESD Ratings: 200 V Machine Model • Chip Complexity: FET = 64 • Pb−Free Packages are Available PINOUT DIAGRAM TRUTH TABLE Inputs 8 7 6 5 2 3 4 VCC PR CLR Q Outputs PR CLR CP D Q Q Operating Mode L H L H L L X X X X X X H L H L H H Asynchronous Set Asynchronous Clear Undetermined H H H H ↑ ↑ h l H L L H Load and Read Register H H ↑ X NC NC Hold H h = High Voltage Level = High Voltage Level One Setup Time Prior to the Low−to−High Clock Transition L = Low Voltage Level l = Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition NC = No Change X = High or Low Voltage Level and Transitions are Acceptable ↑ = Low−to−High Transition ↑ = Not a Low−to−High Transition For ICC reasons, DO NOT FLOAT Inputs © Semiconductor Components Industries, LLC, 2006 April, 2006 − Rev. 4 1 CP D Q GND 1 LOGIC DIAGRAM PR 7 D 2 5 Q CP 1 3 Q 6 CLR VCC = 8, GND = 4 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Publication Order Number: NL17SZ74/D NL17SZ74 MAXIMUM RATINGS Symbol Value Unit DC Supply Voltage −0.5 to +7.0 V VI DC Input Voltage −0.5 to +7.0 V VO DC Output Voltage − Output in High or Low State (Note 1) −0.5 to VCC +0.5 V IIK DC Input Diode Current VI < GND −50 mA IOK DC Output Diode Current VO < GND −50 mA IO DC Output Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range −65 to +150 °C °C VCC Parameter TL Lead Temperature, 1 mm from Case for 10 Seconds 260 TJ Junction Temperature Under Bias +150 °C qJA Thermal Resistance (Note 2) 250 °C/W PD Power Dissipation in Still Air at 85°C 250 mW MSL Moisture Sensitivity FR Flammability Rating Oxygen Index: 28 to 34 ESD Withstand Voltage Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model (Note 5) VESD Level 1 UL 94 V−0 @ 0.125 in >2000 >200 N/A V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. IO absolute maximum rating must be observed. 2. Measured with minimum pad spacing on an FR4 board, using 10 mm X 1 inch, 2 ounce copper trace with no air flow. 3. Tested to EIA/JESD22−A114−A. 4. Tested to EIA/JESD22−A115−A. 5. Tested to JESD22−C101−A. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Operating Data Retention Only Min Max Unit 1.65 1.5 5.5 5.5 V VI Input Voltage (Note 6) 0 5.5 V VO Output Voltage (HIGH or LOW State) 0 VCC V TA Operating Free−Air Temperature −40 +85 °C Dt/DV Input Transition Rise or Fall Rate 0 0 0 20 10 5.0 ns/V VCC = 2.5 V ±0.2 V VCC = 3.0 V ±0.3 V VCC = 5.0 V ±0.5 V 6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level. ORDERING INFORMATION Package Shipping† US8 3000 / Tape & Reel NL17SZ74USG US8 (Pb−Free) 3000 / Tape & Reel TNL17SZ74USG US8 (Pb−Free) 3000 / Tape & Reel Device NL17SZ74US †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 NL17SZ74 DETAILED DEVICE ORDERING INFORMATION Device Nomenclature Device Order Number NL17SZ74US Logic Circuit Indicator No. of Gates per Package Temp Range Identifier Technology Device Function Package Suffix Package Type Tape and Reel Size NL 1 7 SZ 74 US US8 178 mm, 3000 Unit DC ELECTRICAL CHARACTERISTICS Symbol Parameter VIH High−Level Input Voltage VIL Low−Level Input Voltage Condition (V) Min 1.65 0.75 VCC 2.3 to 5.5 0.7 VCC Typ Max Min Max 0.7 VCC 0.25 VCC 0.25 VCC 2.3 to 5.5 0.3 VCC 0.3 VCC High−Level Output Voltage VIN = VIL or VIL IOH = 100 mA IOH = −3 mA IOH = −8 mA IOH = −12 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 VOL Low−Level Output Voltage VIN = VIH IOL = 100 mA IOL = 3 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 Input Leakage Current VIN = VCC or GND IOFF Power off Input Leakage Current ICC Quiescent Supply Current VCC − 0.1 1.29 1.9 2.2 2.4 2.3 3.8 Unit V 0.75 VCC 1.65 VOH IIN *40_C v TA v 85_C TA = 25_C VCC VCC 1.52 2.1 2.4 2.7 2.5 4.0 V 0.1 0.24 0.3 0.4 0.4 0.55 0.55 0.1 0.24 0.3 0.4 0.4 0.55 0.55 V 5.5 $0.1 $1.0 mA 5.5V or VIN = GND 0 1.0 10 mA VIN = VCC or GND 5.5 1.0 10 mA http://onsemi.com 3 0.008 0.10 0.12 0.15 0.19 0.30 0.30 VCC − 0.1 1.29 1.9 2.2 2.4 2.3 3.8 V NL17SZ74 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Î ÎÎÎ ÎÎ Î ÎÎÎ ÎÎ ÎÎÎ Î ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ Î ÎÎÎ ÎÎ Î ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ Î ÎÎÎ ÎÎ Î ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ Î ÎÎÎ ÎÎ Î ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 25°C Symbol fMAX tPLH, tPHL tPLH, tPHL tS tH tW tREC Parameter Maximum Clock Frequency (50% Duty Cycle) (Waveform 1) Propagation Delay, CP to Q or Q (Waveform 1) Propagation Delay, PR or CLR to Q or Q (Waveform 2) Setup Time, D to CP (Waveform 1) Hold Time, D to CP (Waveform 1) Pulse Width, CP, CLR, PR (Waveform 3) Recover Time PR; CLR to CP (Waveform 3) VCC (V) 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 Test Conditions CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W, S1 = Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W, S1 = Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W, S1 = Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W, S1 = Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W, S1 = Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W, S1 = Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W, S1 = Open Min 75 150 200 250 175 200 2.5 1.5 1.0 0.8 1.0 1.0 2.5 1.5 1.0 0.8 1.0 1.0 6.5 3.5 2.0 1.5 2.0 1.5 0.5 0.5 0.5 0.5 0.5 0.5 6.0 4.0 3.0 2.0 3.0 2.0 8.0 4.5 3.0 3.0 3.0 3.0 Typ 6.5 3.8 2.8 2.2 3.4 2.6 6.5 3.8 2.8 2.2 3.4 2.6 TA = −40 to 85°C Max 12.5 7.5 6.5 4.5 7.0 5.0 14 9.0 6.5 5.0 7.0 5.0 Min 75 150 200 250 175 200 2.5 1.5 1.0 0.8 1.0 1.0 2.5 1.5 1.0 0.8 1.0 1.0 6.5 3.5 2.0 1.5 2.0 1.5 0.5 0.5 0.5 0.5 0.5 0.5 6.0 4.0 3.0 2.0 3.0 2.0 8.0 4.5 3.0 3.0 3.0 3.0 Max Unit MHz 13 8.0 7.0 5.0 7.5 5.5 14.5 9.5 7.0 5.5 7.5 5.5 ns ns ns ns ns MHz 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 2 (per flip−flop). CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. CAPACITANCE (Note 8) Symbol Condition Typical Unit Input Capacitance VCC = 5.5 V 7.0 pF COUT Output Capacitance VCC = 5.5 V 7.0 pF CPD Power Dissipation Capacitance (Note 9) Frequency = 10 MHz VCC = 3.3 V VCC = 5.0 V 16 21 pF CIN Parameter 8. TA = +25°C, f = 1 MHz 9. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 1) CPD is related to ICCD dynamic operating current by the expression: ICCD = CPD VCC fin + ICC(static). http://onsemi.com 4 NL17SZ74 Vcc D 50% 0V th ts Vcc tw CP 50% 0V fmax tPLH, tPHL VOH Q, Q 50% VOL WAVEFORM 1 − PROPAGATION DELAYS, SETUP AND HOLD TIMES tR = tF = 3.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Vcc PR 50% 0V Vcc CLR 50% 0V tPLH tPHL Q 50% 50% VOL VOH tPLH Q 50% 50% tPHL WAVEFORM 2 − PROPAGATION DELAYS tR = tF = 3.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Vcc tw PR, CLR 50% 0V trec Vcc 50% CP tw 0V WAVEFORM 3 − RECOVERY TIME tR = tF = 3.0 ns from 10% to 90%; f = 1 MHz; tw = 500 ns Output Reg: VOL ≤ 0.8 V, VOH ≥ 2.0 V Figure 1. AC Waveforms VCC PULSE GENERATOR DUT RT CL Figure 2. Test Circuit http://onsemi.com 5 RL NL17SZ74 PACKAGE DIMENSIONS US8 US SUFFIX CASE 493−02 ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION “A” DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055”) PER SIDE. 4. DIMENSION “B” DOES NOT INCLUDE INTER−LEAD FLASH OR PROTRUSION. INTER−LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055”) PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076−0.0203 MM. (300−800 “). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED ±0.0508 (0.0002 “). −X− A 8 J −Y− 5 DETAIL E B L 1 4 R S G P U C −T− SEATING PLANE D H 0.10 (0.004) T K N 0.10 (0.004) M T X Y R 0.10 TYP V M F DETAIL E DIM A B C D F G H J K L M N P R S U V MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0_ 6_ 5_ 10 _ 0.23 0.34 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0_ 6_ 5_ 10 _ 0.010 0.013 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC SOLDERING FOOTPRINT* 3.8 0.015 0.50 0.0197 1.8 0.07 0.30 0.012 1.0 0.0394 SCALE 8:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 6 For additional information, please contact your local Sales Representative. NL17SZ74/D