VISHAY SI6862DQ

AN606
Vishay Siliconix
Current-Sensing Power MOSFETs
Kandarp Pandya
INTRODUCTION
Vishay Siliconix current-sensing power MOSFETs offer a
simple means of incorporating a protection feature into an
electronic control circuit and avoiding catastrophic failures
resulting from overcurrent (overload) and/or short-circuit
conditions. The device package is a modified D2PAK with five
pins. The MOSFET termination retains the standard D2PAK
footprint for a three-pin device. The additional two pins provide
termination for a current-sense output and an internal Kelvin
connection to the source. For current sensing, the MOSFET
design employs a small number of the total number of
MOSFET cells in a known ratio. The latter define the
current-sense parameters. A typical control interface uses a
simple circuit with an op-amp or a comparator. This approach
offers the freedom of control-level setting and facilitates its
incorporation into the main control system.
between gate and drain-stub and between drain-stub and source,
respectively. See Application Note 826, Recommended Minimum
Pad Patterns With Outline Access for Vishay Siliconix
MOSFETs
(http://www.vishay.com/doc?72286),
for
the
recommended PCB layout dimensional details of the pad pattern.
Modified-part library symbols for schematic symbol and PCB
layout are available on the “Protel” (PCB design software)
platform. For soft copy, please contact Vishay Siliconix in Santa
Clara, Calif., in the United States, by phoning 1-408-567-8927.
DEVICE DESCRIPTION AND PRINCIPLE OF
OPERATION
The cell density, a favored term within the power MOSFET
industry, conveys that the power MOSFET structure consists
of many cells connected in parallel. In principle, these cells
constitute a resistive path for drain-source current. Electrically,
these cells are parallel connected resistors, rDS(on) s. Each cell
- being identical in structure and electrical characteristics shares the current equally when the device is on. This property
enables design of a MOSFET with a current-sensing feature.
D (Tab, 3)
D2PAK-5
G
1 2 3 4 5
SENSE
(1)
(4)
KELVIN
(2)
S (5)
G
D
N-Channel MOSFET
S
SENSE
KELVIN
FIGURE 1. Package Information and Schematic Symbol
Package Information and Schematic Symbol, Figure 1, shows a
partial reproduction of a datasheet for a current-sensing
MOSFET, SUM50N03-13C. Gate, drain-stub/tab, and source
(pins 1, 2, and 3) are in the same position as in a standard D2PAK
(TO-263) MOSFET. However, pin-out modification is required to
incorporate current-sense (pin 2) and Kelvin-to-source (pin 4)
The Principle Behind the Current-Sensing Feature
The most efficient way to sense the drain-source current is to
use the ratio-metric measurement. In a power MOSFET, it is
possible to implement this method easily.
Dividing the MOSFET cells in a known ratio creates two paths
that share the drain-source current. The path with the smaller
number of cells constitutes the sense current, which is much
smaller than the current conducting through the rest of the
cells. A very simple, low-power, external circuit can measure
this current. Multiplying this value with the cell ratio gives the
total drain-source current.
The classic Kelvin termination for the return of sense current
to the main source connection insures the measurement
accuracy. This terminal not only eliminates the ground loop,
but also minimizes the imbalance of internal structures with
two current paths.
The Current-Sensing Parameters, Table 1, and the
Current-Sense Die Characteristics and Schematic, Figure 2,
help to demonstrate the current-sensing operation and circuit
implementation.
TABLE 1: Current Sense Characteristics
Current Sensing Ratio
Mirror Active Resistance
Document Number: 71991
17-Dec-03
r
ID = 1 A, VGSS = 10 V, RSENSE = 1.1 W
rm(on)
VGS = 10 V, ID = 10 mA
420
520
3.5
620
W
www.vishay.com
1
AN606
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
On-Resistance vs. Sense Current
10
On-Resistance vs. Gate-Source Voltage
10
8
6
rm(on) − On-Resistance (W)
8
rm(on) − On-Resistance (W)
SENSE DIE
VGS = 4.5 V
VGS = 10 V
4
2
0
0.00
ID = 10 mA
6
4
2
0
0.02
0.04
0.06
0.08
0.10
0
2
ISENSE (A)
4
6
8
10
VGS − Gate-to-Source Voltage (V)
Current Ratio (I(MAIN)/IS)
vs. Gate-Source Voltage (Figure 1)
1200
RS = 6.6 W
1000
RS = 4.7 W
G
Ratio
800
RS = 2.2 W
600
VG
RS = 1.1 W
400
SENSE
S
KELVIN
RS
RS = 0.5 W
200
0
0
4
8
12
16
20
VGS − Gate-to-Source Voltage (V)
FIGURE 2. Current-Sensing Die Characteristics and Schematic
Definition of Current-Sensing Parameters
ISENSE is the current flowing out of the sense terminal and into
the sense resistor, RSENSE
The current-sense ratio, r, is the quotient of the number of cells
terminated on the sense terminal to the total number of cells on
the MOSFET die.
Mirror active resistance, rm(on), is the resistance of parallel
connected cells used in the sense chain when the device is on.
Being rDS(on) as in any other MOSFET, the value depends on
the gate drive, drain current, and junction temperature.
Accordingly, rm(on) is defined at given values of VGS, IDRAIN,
and TJ junction.
To derive the value of r using the above definition requires
detailed die design. However, the quotient of drain current to
the sense current provides the same value because these
current values are the sum of cell current in each path.
Mathematically:
r = ID/ISENSE
ID is drain current
www.vishay.com
2
By definition, for the sense die, refer to Figure 2. Mirror active
resistance rm(on) is specified at the gate-source voltages, VGS
at 4.5 V and 10 V, corresponding drain-source current ISENSE
up to 0.1 A, and junction temperature TJ at 25 _C. The
temperature coefficient of rm(on) is the same as that of rDS(on).
Refer to the on-resistance vs. junction temperature curve in
Figure 3.
Document Number: 71991
17-Dec-03
AN606
Vishay Siliconix
2.0
rm(on) − On-Resistance (W)
Normalized
1.8
2. use a minimum value of the ISENSE signal at the maximum
value of ID; and
On-Resistance vs. Junction Temperature
VGS = 10 V
ID = 25 A
3. use a fast comparator with hysterisis to control and protect
the MOSFET.
1.6
Typical schematic configurations for implementing the current
sense are shown in Figure 4 and Figure 5.
1.4
1.2
The Virtual Earth Sensing Scheme, Figure 4, is suitable for
applications aiming at higher noise immunity and speed. This
approach also improves measurement accuracy by
eliminating the sense resistor. However, a dual power supply
and inverted (negative) output signal are the price designers
pay for deriving these benefits.
1.0
0.8
0.6
−50
−25
0
25
50
75
100
125
150
175
TJ − Junction Temperature (_C)
FIGURE 3. Normalized rm(on) for the Sense Die
The Resistor Sensing Scheme shown in Figure 5 is a quite
simple and economical approach. The accuracy of current
measurement is affected by the introduction of an external
sense resistor RS. However, the latter aids in lowering the
temperature sensitivity of the current-sense signal.
DESIGN EQUATIONS
VDD
The following three equations enable circuit design and
analysis.
Load
IL
D
ISENSE = x ID/r
Kelvin
VDS = ISENSE x [rm(on) + RSENSE] or
VDS = ID x rDS(on)/(rm(on) + RSENSE)
G
+V
Sense
VSENSE = ISENSE x RSENSE or
VSENSE = VDS x RSENSE/(rm(on) + RSENSE)
Where ISENSE
r
ID
VDS
rm(on)
RSENSE
−
+
Current flowing out of sense terminal
Current-sensing ratio
Drain-source current
Drain-source voltage
Mirror active resistance
External current-sense resistor
−V
S
FIGURE 4. Virtual Earth Sensing Scheme
VDD
Load
Application Aspects and Design Examples
The current-sense ratio r, even though fixed by design, is
dependent
on
manufacturing
process
variations.
Furthermore, mirror active resistance rm(on) depends on circuit
parameters VGS and ID and junction temperature TJ. As a
result, a practical design can realize an accuracy of 15% —
20% for current sensing. Accordingly, the current-sensing
MOSFET is most suitable for supervisory functions such as
overcurrent and/or short-circuit protection.
Three keys to a successful design are to:
1. have an adequate margin between the normal
operating-current value and the trip-current value;
Document Number: 71991
17-Dec-03
V1
IL
D
R3
Kelvin
R2
G
R1
Sense
−
+
V1
S
Stray
Resistance
FIGURE 5. Resistor Sensing Scheme
www.vishay.com
3
AN606
Vishay Siliconix
TABLE 2: Current Product Range
Part #
Channel Type
VDS (VDC)
rDS (W)
IDS (A)
PD (W)
Package
Si6862DQ
N
20
0.026/4.5 V
6.6
1.8
TSSOP-8*
Si4730EY
N
30
0.015/10 V
11.7
3.6
SO-8*
SUM50N03-13LC
N
30
0.013/10 V
50
83
SUM60N08-07C
N
75
0.007/10 V
60
300
D2PAK-5
Recommended minimum pads for current-sensing MOSFETs in TSSOP-8 and SOIC-8 packages see application note AN826
(http://www.vishay.com/doc?72286).
CONCLUSION
Vishay Siliconix current-sensing power MOSFETs enable
implementation of a simple solution for incorporating
supervisory protection features such as overcurrent and/or
short circuit. This approach offers the freedom and flexibility of
control-circuit design, though the accuracy of measurement is
not suitable for current-control applications. Virtually any
power MOSFET from the Vishay Siliconix product range can
be supplied with a current-sensing feature.
www.vishay.com
4
Document Number: 71991
17-Dec-03