ONSEMI BCP53T1

Order this document
by BCP53T1/D
SEMICONDUCTOR TECHNICAL DATA
Motorola Preferred Device
This PNP Silicon Epitaxial transistor is designed for use in audio amplifier
applications. The device is housed in the SOT-223 package which is designed for
medium power surface mount applications.
MEDIUM POWER
PNP SILICON
HIGH CURRENT
TRANSISTOR
SURFACE MOUNT
• High Current: 1.5 Amps
• NPN Complement is BCP56
• The SOT-223 Package can be soldered using wave or reflow. The formed leads
absorb thermal stress during soldering, eliminating the possibility of damage to
the die
• Available in 12 mm Tape and Reel
Use BCP53T1 to order the 7 inch/1000 unit reel.
Use BCP53T3 to order the 13 inch/4000 unit reel.
4
COLLECTOR 2,4
1
BASE
1
2
3
EMITTER 3
CASE 318E-04, STYLE 1
TO-261AA
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Emitter Voltage
VCEO
– 80
Vdc
Collector-Base Voltage
VCBO
–100
Vdc
Emitter-Base Voltage
VEBO
– 5.0
Vdc
Collector Current
IC
1.5
Adc
Total Power Dissipation @ TA = 25°C(1)
Derate above 25°C
PD
1.5
12
Watts
mW/°C
TJ, Tstg
– 65 to 150
°C
Symbol
Max
Unit
RθJA
83.3
°C/W
TL
260
10
°C
Sec
Operating and Storage Temperature Range
DEVICE MARKING
AH
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance — Junction-to-Ambient (surface mounted)
Lead Temperature for Soldering, 0.0625″ from case
Time in Solder Bath
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.059 in.; mounting pad for the collector lead min. 0.93 sq. in.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
Small–Signal
Motorola
Motorola, Inc.
1996
Transistors, FETs and Diodes Device Data
1
BCP53T1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristics
Symbol
Min
Typ
Max
Unit
Collector-Base Breakdown Voltage (IC = –100 µAdc, IE = 0)
V(BR)CBO
–100
—
—
Vdc
Collector-Emitter Breakdown Voltage (IC = –1.0 mAdc, IB = 0)
V(BR)CEO
– 80
—
—
Vdc
Collector-Emitter Breakdown Voltage (IC = –100 µAdc, RBE = 1.0 kohm)
V(BR)CER
–100
—
—
Vdc
Emitter-Base Breakdown Voltage (IE = –10 µAdc, IC = 0)
V(BR)EBO
– 5.0
—
—
Vdc
Collector-Base Cutoff Current (VCB = – 30 Vdc, IE = 0)
ICBO
—
—
–100
nAdc
Emitter-Base Cutoff Current (VEB = – 5.0 Vdc, IC = 0)
IEBO
—
—
–10
µAdc
25
40
25
—
—
—
—
250
—
OFF CHARACTERISTICS
ON CHARACTERISTICS
DC Current Gain
(IC = – 5.0 mAdc, VCE = – 2.0 Vdc)
(IC = –150 mAdc, VCE = – 2.0 Vdc)
(IC = – 500 mAdc, VCE = – 2.0 Vdc)
hFE
—
Collector-Emitter Saturation Voltage (IC = – 500 mAdc, IB = – 50 mAdc)
VCE(sat)
—
—
– 0.5
Vdc
Base-Emitter On Voltage (IC = – 500 mAdc, VCE = – 2.0 Vdc)
VBE(on)
—
—
–1.0
Vdc
fT
—
50
—
MHz
DYNAMIC CHARACTERISTICS
Current-Gain — Bandwidth Product
(IC = –10 mAdc, VCE = – 5.0 Vdc, f = 35 MHz)
500
hFE , DC CURRENT GAIN
VCE = 2 V
200
100
50
20
1
3
5
10
30 50 100
IC, COLLECTOR CURRENT (mA)
300 500
1000
f T, CURRENT GAIN BANDWIDTH PRODUCT (MHz)
TYPICAL ELECTRICAL CHARACTERISTICS
500
300
VCE = 2 V
100
50
20
1
Figure 1. DC Current Gain
Figure 2. Current Gain Bandwidth Product
1
V(BE)sat @ IC/IB = 10
C, CAPACITANCE (pF)
V, VOLTAGE (VOLTS)
0.8
V(BE)on @ VCE = 2 V
0.6
0.4
0.2
V(CE)sat @ IC/IB = 10
0
2
1
10
100
1000
10
100
IC, COLLECTOR CURRENT (mA)
1000
120
110
100
90
80
70
60
Cib
50
40
30
20
10
0
Cob
0
2
4
6
8
10
12
14
IC, COLLECTOR CURRENT (mA)
V, VOLTAGE (VOLTS)
Figure 3. Saturation and “ON” Voltages
Figure 4. Capacitances
16
18
20
Motorola Small–Signal Transistors, FETs and Diodes Device Data
BCP53T1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
POWER DISSIPATION
The power dissipation of the SOT-223 is a function of the
input pad size. These can vary from the minimum pad size
for soldering to the pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device
junction to ambient; and the operating temperature, TA.
Using the values provided on the data sheet for the SOT-223
package, PD can be calculated as follows.
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
PD =
150°C – 25°C
83.3°C/W
= 1.5 watts
The 83.3°C/W for the SOT-223 package assumes the
recommended collector pad area of 965 sq. mils on a glass
epoxy printed circuit board to achieve a power dissipation of
1.5 watts. If space is at a premium, a more realistic
approach is to use the device at a PD of 833 mW using the
footprint shown. Using a board material such as Thermal
Clad, a power dissipation of 1.6 watts can be achieved using
the same footprint.
MOUNTING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10°C.
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied during
cooling
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.15
3.8
0.079
2.0
0.248
6.3
0.091
2.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
inches
mm
SOT–223
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
BCP53T1
PACKAGE DIMENSIONS
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
S
B
1
2
3
D
L
G
J
C
0.08 (0003)
M
H
INCHES
DIM MIN
MAX
A
0.249
0.263
B
0.130
0.145
C
0.060
0.068
D
0.024
0.035
F
0.115
0.126
G
0.087
0.094
H 0.0008 0.0040
J
0.009
0.014
K
0.060
0.078
L
0.033
0.041
M
0_
10 _
S
0.264
0.287
MILLIMETERS
MIN
MAX
6.30
6.70
3.30
3.70
1.50
1.75
0.60
0.89
2.90
3.20
2.20
2.40
0.020
0.100
0.24
0.35
1.50
2.00
0.85
1.05
0_
10 _
6.70
7.30
K
STYLE 1:
PIN 1.
2.
3.
4.
BASE
COLLECTOR
EMITTER
COLLECTOR
CASE 318E–04
ISSUE H
TO-261AA
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4
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BCP53T1/D
Motorola Small–Signal Transistors, FETs and Diodes Device
Data