Order this document by BC856AWT1/D SEMICONDUCTOR TECHNICAL DATA PNP Silicon These transistors are designed for general purpose amplifier applications. They are housed in the SOT–323/SC–70 which is designed for low power surface mount applications. COLLECTOR 3 1 BASE Motorola Preferred Devices 2 EMITTER MAXIMUM RATINGS Rating Symbol BC856 BC857 BC858 Unit Collector – Emitter Voltage VCEO –65 –45 –30 V Collector – Base Voltage VCBO –80 –50 –30 V Emitter – Base Voltage VEBO –5.0 –5.0 –5.0 V IC –100 –100 –100 mAdc Collector Current — Continuous 3 1 2 CASE 419–02, STYLE 3 SOT–323/SC–70 THERMAL CHARACTERISTICS Symbol Max Unit Total Device Dissipation FR– 5 Board, (1) TA = 25°C Characteristic PD 150 mW Thermal Resistance, Junction to Ambient RqJA 833 °C/W TJ, Tstg – 55 to +150 °C Junction and Storage Temperature DEVICE MARKING BC856AWT1 = 3A; BC856BWT1 = 3B; BC857AWT1 = 3E; BC857BWT1 = 3F; BC858AWT1 = 3J; BC858BWT1 = 3K; BC858CWT1 = 3L ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Collector – Emitter Breakdown Voltage (IC = –10 mA) BC856 Series BC857 Series BC858 Series V(BR)CEO –65 –45 –30 — — — — — — V Collector – Emitter Breakdown Voltage (IC = –10 µA, VEB = 0) BC856 Series BC857 Series BC858 Series V(BR)CES –80 –50 –30 — — — — — — V Collector – Base Breakdown Voltage (IC = –10 mA) BC856 Series BC857 Series BC858 Series V(BR)CBO –80 –50 –30 — — — — — — V Emitter – Base Breakdown Voltage (IE = –1.0 mA) BC856 Series BC857 Series BC858 Series V(BR)EBO –5.0 –5.0 –5.0 — — — — — — V ICBO — — — — –15 –4.0 nA µA Collector Cutoff Current (VCB = –30 V) Collector Cutoff Current (VCB = –30 V, TA = 150°C) 1. FR–5 = 1.0 x 0.75 x 0.062 in Thermal Clad is a registered trademark of the Bergquist Company. Preferred devices are Motorola recommended choices for future use and best overall value. Motorola Small–Signal Transistors, FETs and Diodes Device Data Motorola, Inc. 1996 1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Symbol Min Typ Max Unit hFE — — — 90 150 270 — — — — 125 220 420 180 290 520 250 475 800 — — — — –0.3 –0.65 — — –0.7 –0.9 — — –0.6 — — — –0.75 –0.82 fT 100 — — MHz Output Capacitance (VCB = –10 V, f = 1.0 MHz) Cob — — 4.5 pF Noise Figure (IC = –0.2 mA, VCE = –5.0 Vdc, RS = 2.0 kΩ, f = 1.0 kHz, BW = 200 Hz) NF — — 10 dB ON CHARACTERISTICS DC Current Gain (IC = –10 µA, VCE = –5.0 V) (IC = –2.0 mA, VCE = –5.0 V) BC856A, BC857A, BC585A BC856A, BC857A, BC858A BC858C BC856A, BC857A, BC858A BC856B, BC857B, BC858B BC858C Collector – Emitter Saturation Voltage (IC = –10 mA, IB = –0.5 mA) (IC = –100 mA, IB = –5.0 mA) VCE(sat) Base – Emitter Saturation Voltage (IC = –10 mA, IB = –0.5 mA) (IC = –100 mA, IB = –5.0 mA) VBE(sat) Base – Emitter On Voltage (IC = –2.0 mA, VCE = –5.0 V) (IC = –10 mA, VCE = –5.0 V) VBE(on) V V V SMALL– SIGNAL CHARACTERISTICS Current – Gain — Bandwidth Product (IC = –10 mA, VCE = –5.0 Vdc, f = 100 MHz) 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data BC857/BC858 1.5 –1.0 TA = 25°C –0.9 VCE = –10 V TA = 25°C VBE(sat) @ IC/IB = 10 –0.8 V, VOLTAGE (VOLTS) hFE , NORMALIZED DC CURRENT GAIN 2.0 1.0 0.7 0.5 –0.7 VBE(on) @ VCE = –10 V –0.6 –0.5 –0.4 –0.3 –0.2 0.3 VCE(sat) @ IC/IB = 10 –0.1 0.2 –0.2 –0.5 –1.0 –2.0 –5.0 –10 –20 –50 IC, COLLECTOR CURRENT (mAdc) 0 –0.1 –0.2 –100 –200 Figure 1. Normalized DC Current Gain –1.2 IC = –10 mA IC = –50 mA IC = –200 mA IC = –100 mA IC = –20 mA –0.4 –0.02 θVB , TEMPERATURE COEFFICIENT (mV/ °C) VCE , COLLECTOR–EMITTER VOLTAGE (V) TA = 25°C –55°C to +125°C 1.2 1.6 2.0 2.4 2.8 –10 –20 –0.1 –1.0 IB, BASE CURRENT (mA) –0.2 10 Cib 7.0 TA = 25°C 5.0 Cob 3.0 2.0 1.0 –0.4 –0.6 –1.0 –2.0 –4.0 –6.0 –10 –20 –30 –40 –10 –1.0 IC, COLLECTOR CURRENT (mA) –100 Figure 4. Base–Emitter Temperature Coefficient f T, CURRENT–GAIN – BANDWIDTH PRODUCT (MHz) Figure 3. Collector Saturation Region C, CAPACITANCE (pF) –100 1.0 –1.6 0 –50 Figure 2. “Saturation” and “On” Voltages –2.0 –0.8 –0.5 –1.0 –2.0 –5.0 –10 –20 IC, COLLECTOR CURRENT (mAdc) 400 300 200 150 VCE = –10 V TA = 25°C 100 80 60 40 30 20 –0.5 –1.0 –2.0 –3.0 –5.0 –10 –20 –30 –50 VR, REVERSE VOLTAGE (VOLTS) IC, COLLECTOR CURRENT (mAdc) Figure 5. Capacitances Figure 6. Current–Gain – Bandwidth Product Motorola Small–Signal Transistors, FETs and Diodes Device Data 3 BC856 TJ = 25°C VCE = –5.0 V TA = 25°C –0.8 V, VOLTAGE (VOLTS) hFE , DC CURRENT GAIN (NORMALIZED) –1.0 2.0 1.0 0.5 VBE(sat) @ IC/IB = 10 –0.6 VBE @ VCE = –5.0 V –0.4 –0.2 0.2 VCE(sat) @ IC/IB = 10 0 –0.2 –1.0 –2.0 –5.0 –10 –20 –50 –100 –200 IC, COLLECTOR CURRENT (AMP) –0.1 –0.2 –0.5 –50 –100 –200 –1.0 –2.0 –5.0 –10 –20 IC, COLLECTOR CURRENT (mA) Figure 8. “On” Voltage –2.0 –1.0 θVB, TEMPERATURE COEFFICIENT (mV/ °C) VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS) Figure 7. DC Current Gain –1.6 –1.2 IC = –10 mA –20 mA –50 mA –100 mA –200 mA –0.8 –0.4 TJ = 25°C 0 –0.02 –0.05 –0.1 –0.2 –0.5 –1.0 –2.0 IB, BASE CURRENT (mA) –5.0 –10 –20 –1.4 –1.8 –2.6 –3.0 –0.2 f T, CURRENT–GAIN – BANDWIDTH PRODUCT C, CAPACITANCE (pF) TJ = 25°C Cib 10 8.0 Cob 4.0 2.0 –0.1 –0.2 –0.5 –1.0 –2.0 –5.0 –10 –20 VR, REVERSE VOLTAGE (VOLTS) Figure 11. Capacitance 4 –0.5 –1.0 –50 –2.0 –5.0 –10 –20 IC, COLLECTOR CURRENT (mA) –100 –200 Figure 10. Base–Emitter Temperature Coefficient 40 6.0 –55°C to 125°C –2.2 Figure 9. Collector Saturation Region 20 θVB for VBE –50 –100 500 VCE = –5.0 V 200 100 50 20 –100 –1.0 –10 IC, COLLECTOR CURRENT (mA) Figure 12. Current–Gain – Bandwidth Product Motorola Small–Signal Transistors, FETs and Diodes Device Data r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1.0 0.7 0.5 D = 0.5 0.2 0.3 0.2 0.1 0.05 SINGLE PULSE 0.1 0.07 0.05 SINGLE PULSE t1 t2 DUTY CYCLE, D = t1/t2 0.03 0.02 0.01 0.1 ZθJC(t) = r(t) RθJC RθJC = 83.3°C/W MAX ZθJA(t) = r(t) RθJA RθJA = 200°C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) – TC = P(pk) RθJC(t) P(pk) 0.2 0.5 1.0 2.0 5.0 10 20 50 t, TIME (ms) 100 200 500 1.0 k 2.0 k 5.0 k 10 k Figure 13. Thermal Response –200 IC, COLLECTOR CURRENT (mA) 1s 3 ms –100 –50 –10 –5.0 –2.0 –1.0 TA = 25°C TJ = 25°C BC558 BC557 BC556 BONDING WIRE LIMIT THERMAL LIMIT SECOND BREAKDOWN LIMIT The safe operating area curves indicate IC–VCE limits of the transistor that must be observed for reliable operation. Collector load lines for specific circuits must fall below the limits indicated by the applicable curve. The data of Figure 14 is based upon TJ(pk) = 150°C; TC or TA is variable depending upon conditions. Pulse curves are valid for duty cycles to 10% provided TJ(pk) ≤ 150°C. TJ(pk) may be calculated from the data in Figure 13. At high case or ambient temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by the secondary breakdown. –5.0 –10 –30 –45 –65 –100 VCE, COLLECTOR–EMITTER VOLTAGE (V) Figure 14. Active Region Safe Operating Area Motorola Small–Signal Transistors, FETs and Diodes Device Data 5 INFORMATION FOR USING THE SOT–323/SC–70 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.025 0.65 0.025 0.65 0.075 1.9 0.035 0.9 0.028 0.7 inches mm SOT–323/SC–70 SOT–323/SC–70 POWER DISSIPATION The power dissipation of the SOT–323/SC–70 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT–323/SC–70 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 150 milliwatts. PD = 150°C – 25°C 833°C/W = 150 milliwatts The 833°C/W for the SOT–323/SC–70 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 150 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–323/SC–70 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. 6 SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. Motorola Small–Signal Transistors, FETs and Diodes Device Data PACKAGE DIMENSIONS A L NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3 B S 1 2 D V G C 0.05 (0.002) R N J DIM A B C D G H J K L N R S V INCHES MIN MAX 0.071 0.087 0.045 0.053 0.035 0.049 0.012 0.016 0.047 0.055 0.000 0.004 0.004 0.010 0.017 REF 0.026 BSC 0.028 REF 0.031 0.039 0.079 0.087 0.012 0.016 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.90 1.25 0.30 0.40 1.20 1.40 0.00 0.10 0.10 0.25 0.425 REF 0.650 BSC 0.700 REF 0.80 1.00 2.00 2.20 0.30 0.40 K H CASE 419–02 ISSUE G SOT–323/SC–70 Motorola Small–Signal Transistors, FETs and Diodes Device Data STYLE 3: PIN 1. BASE 2. EMITTER 3. COLLECTOR 7 Motorola reserves the right to make changes without further notice to any products herein. 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