NCP3520/NCP3521 LDO Regulator Controller The NCP3520 / NCP3521 parts are Low Drop Out (LDO) regulator controllers for applications requiring high−currents and ultra low dropout voltages. The use of an external NMOS driver allows the user to adapt the device to a multitude of applications depending on system requirements for current and dropout voltage. http://onsemi.com Features MARKING DIAGRAM • Fixed Voltage Options NCP3520 (1.2 V) NCP3521 (1.5 V) Low Operating Current Low Standby Current (sleep mode < 1 mA) Non Rush Current on Startup Short Circuit Protection 1% Output Voltage Tolerance Drop−In Replacement for Rohm BD3520FVM and BD3521FVM Functionally Equivalent to the Rohm BD3501FVM and BD3502FVM These are Pb−Free Devices ♦ • • • • • • • • ♦ 8 Micro8 DM SUFFIX CASE 846A STYLE 2 1 XXXX A Y W G XXXX AYW G G 1 = 3520 for Fixed 1.2 V or = 3521 for Fixed 1.5 V = Assembly Location = Year = Work Week = Pb−Free Package Typical Applications • Computer based gaming consoles (Note: Microdot may be in either location) NCP3520 NCP3521 EN PIN CONNECTIONS VD VD NRCS 10 mF 0.01 mF VCC 5.0 A 1.0 mF G VS 8 VD GND 2 7 G EN 3 6 VS VCC 4 5 VFB 3.0 A 220 mF VO GND NOTE: 1 Micro8 (Top View) NTMS4107N or equivalent VFB NRCS ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. For best performance VFB should utilize a Kelvin connection at the load. Figure 1. Application Diagram © Semiconductor Components Industries, LLC, 2007 March, 2007 − Rev. 0 1 Publication Order Number: NCP3520/D NCP3520/NCP3521 VCC VCC_UVLO EN 50ms Timer + − Voltage Reference VD_UVLO − + 50ms Timer VD + − 0.65V + + − Latch Clear Latch Set Output Off Latch G 1.2mA VS Thermal Shutdown 220mA GND VREF 20mA Non Rush Current on Startup (NRCS) − + Short Circuit Protection with 50 ms Startup Short Detect VFB + − NRCS Figure 2. Block Diagram http://onsemi.com 2 35% of VOUT NCP3520/NCP3521 PACKAGE PIN DESCRIPTION Micro8 Pin # Symbol 1 NRCS Description 2 GND 3 EN 4 VCC Power Supply Voltage Input. 5 VFB Voltage Feedback pin into the error amplifier for maintaining the output voltage. 6 VS Source input. Provides pulldown capability (1.2 mA operating & 220 mA turnoff) for fast output voltage response time. 7 G Gate Drive for the external NFET. 8 VD NFET Drain input for voltage sensing. Non Rush current on Startup. Capacitor to ground controls output voltage slew rate and short circuit delay time. Ground. Enable input control. MAXIMUM RATINGS Rating Value Unit −0.3 to 7 V IG (DC) IG (AC) IVS (DC) 10 10 300 mA Electrostatic Discharge, Human Body Model 1.5 kV Electrostatic Discharge, Machine Model 100 V Package Thermal Resistance Micro8 238 °C/W Operating Junction Temperature −10 to 150 °C Storage Temperature Range −55 to 150 °C All Pins Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ELECTRICAL CHARACTERISTICS (TJ = 25°C, VCC = 5 V, VD = 2.0 V, EN = 3 V, External FET = NTMS4107N (Note 3), unless otherwise specified) Characteristic Conditions Min Typ Max Unit REGULATOR OUTPUT Feedback Voltage (NCP3520) IO (NTMS4107N) = 50 mA 4.5 V < VCC < 5.5 V, 0°C < TJ < 100°C (Note 1) 1.188 1.176 1.200 1.200 1.212 1.224 V V Feedback Voltage (NCP3521) IO (NTMS4107N) = 50 mA 4.5 V < VCC < 5.5V, 0°C < TJ < 100°C (Note 1) 1.485 1.470 1.500 1.500 1.515 1.530 V V EN = 0 V EN = 3 V EN = 3 V − − − 0 1.25 0.5 10 1.7 1.7 mA mA mA Line Regulation (NCP3520) 4.5 V < VCC < 5.5 V, IOUT = 0 4.5 V < VCC < 5.5 V, IOUT = 3 A (Note 1) − 1.2 1.2 6.0 6.0 mV mV Line Regulation (NCP3521) 4.5 V < VCC < 5.5 V, IOUT = 0 4.5 V < VCC < 5.5 V, IOUT = 3 A (Note 1) − 1.5 1.5 7.5 7.5 mV mV Load Regulation (Note 2) IO = 0 A to 3 A − 0.50 10 mV Supply Current Sleep Mode Run Mode Short Circuit Latch Condition 1. Guaranteed by Design 2. Load regulation may vary with the selection of an external FET other than the NTMS4107N. 3. See “External Components” section on Page 8. http://onsemi.com 3 NCP3520/NCP3521 ELECTRICAL CHARACTERISTICS (TJ = 25°C, VCC = 5 V, VD = 2.0 V, EN = 3 V, External FET = NTMS4107N (Note 3), unless otherwise specified) Characteristic Conditions Min Typ Max Unit OUTPUT DRIVER Source Current VFB = VOUT − 0.1 V, VGATE = 2.5 V −4 −3 −2 mA Sink Current VFB = VOUT + 0.1 V, VGATE = 2.5 V 2 3 4 mA VFB Input Impedance NCP3520 (1.2 V) NCP3521 (1.5 V) − − 21 26 − − VS Input Bias Current − 1.2 2.4 mA GENERAL kW VS Standby Current VS = 1 V, EN = 0 V 150 220 − mA VCC Undervoltage Lockout VCC Rising 4.20 4.35 4.50 V VCC Undervoltage Lockout Hysteresis 100 160 250 mV VD Undervoltage Lockout (NCP3520) 0.72 0.84 0.96 V VD Undervoltage Lockout (NCP3521) 0.90 1.05 1.20 V VD Input Impedance NCP3520 (1.2 V) NCP3521 (1.5 V) − − 228 284 − − Thermal Shutdown (Note 1) 150 180 210 °C Thermal Hysteresis (Note 1) − 15 − °C kW NON RUSH CURRENT ON STARTUP (NRCS) SHORT CIRCUIT PROTECTION (SCP) NRCS Charge Current NRCS = 0.5 V 14 20 26 mA SCP Charge Current NRCS = 0.5 V 14 20 26 mA SCP Discharge Current NRCS = 0.5 V 300 400 − mA 1.15 1.3 1.4 V SCP Threshold Voltage Short Detect Voltage VFB Decreasing VFB * 0.30 VFB * 0.35 VFB * 0.40 V Power On Reset VCC − 50 − mS EN to G Turn on Delay − 50 − mS Short Circuit Powerup Decision Timer − 50 − mS NRCS Standby Voltage − 25 50 mV Input Threshold Low High − 2.0 1.34 1.40 0.8 − V V Input Hysteresis − 60 − mV − 7 10 mA ENABLE Input Current EN = 3 V 1. Guaranteed by Design 2. Load regulation may vary with the selection of an external FET other than the NTMS4107N. 3. See “External Components” section on Page 8. http://onsemi.com 4 NCP3520/NCP3521 1.204 1.507 1.2035 1.506 1.203 1.505 1.2025 1.504 1.2015 VO VO 1.202 1.201 1.5 1.2 1.1995 1.199 −10 1.499 IOUT = 50 mA 25 60 IOUT = 50 mA 1.498 85 −10 25 60 TEMPERATURE (°C) TEMPERATURE (°C) Figure 3. 1.2 V Output Voltage versus Temperature (NCP3520) Figure 4. 1.5 V Output Voltage versus Temperature (NCP3521) 1.400 1.11 1.200 1.1 1.000 95 1.09 0.800 mA VOUT, OUTPUT VOLTAGE (V) 1.502 1.501 1.2005 0.600 1.08 1.07 0.400 0.200 1.06 0.000 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 1.05 −10 25 60 VIN, INPUT VOLTAGE (V) TEMPERATURE (°C) Figure 5. Output Voltage versus Input Voltage (NCP3520) Figure 6. Run Mode Supply Current versus Temperature 95 1.10 1.400 1.200 ICC, INPUT CURRENT (mA) ICC, INPUT CURRENT (mA) 1.503 1.000 0.800 0.600 0.400 0.200 0.000 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 VIN, INPUT VOLTAGE (V) T = 0°C T = 25°C 1.05 T = 100°C 1.0 0 Figure 7. ICC versus Input Voltage (NCP3520) 1000 2000 ILOAD, (mA) Figure 8. ICC versus ILOAD (05C, 255C, 1005C) http://onsemi.com 5 30 NCP3520/NCP3521 600 70.00 500 RISETIME (∝s) MAG (dB) 60.00 50.00 40.00 30.00 400 300 200 20.00 100 10.00 0.00 10 0 100 1k 10 k 100 k 8.0 9.0 10 11 12 13 14 15 16 17 18 19 20 NRCS CAPACITOR (nF) Figure 9. Ripple Rejection versus Frequency (VCC = 5.0 V, ILOAD = 3.0 A) Figure 10. NRCS Time versus NRCS Capacitor (NCP3520) Control Signal Control Signal VO VO Figure 11. Load Transient Response (10 mA to 1.3 A) Channel 1 (VO), Channel 2 (Switch Control) Figure 12. Load Transient Response (1.3 A to 10 mA) Channel 1 (VO), Channel 2 (Switch Control) http://onsemi.com 6 NCP3520/NCP3521 DETAILED OPERATING DESCRIPTION General 3. Device startup into a short circuit. Further details are available on this subject under the heading “Starting Up Into A Short Circuit”. The NCP3520/NCP3521 are LDO Regulator Controllers. An external NFET device sets the current capability allowing for designer selection. Features include an undervoltage lockout for both the integrated circuit supply Pin VCC, and the supply pin for the external FET connection to the drain of the FET. The NRCS (Non Rush Current on Startup) feature prevents high currents through the external FET (drain−source). The external capacitor setting component used in NRCS is also used for short circuit protection (SCP). The device also has an enable feature allowing it to go into a low supply current sleep mode demanded by most modern day feature rich systems when not in use. Thermal shutdown functionality protects the IC from damage caused from excessively high temperatures appearing on the IC. Normal Powerup/Down The NRCS (Non Rush Current on Startup) timer controls the output driver during powerup. The output driver voltage (VG) is controlled during powerup. The voltage on NRCS is mimicked to provide a duplicate voltage on VFB. When 1.2 V is reached normal operation of the error amplifier and feedback network take over. Regulation is maintained in the loop around 1.2 V. The NRCS pin rises up to 1 V. At 1 V, the NRCS capacitor is discharged fully at a 300 mA (min) rate. The IC enters a standby mode capable of short circuit detection. A 20 mA pullup current source is used to charge the external NRCS capacitor linearly and maintain a predictable powerup. A recommended 0.01 mF will provide a 325 ms powerup time. Alternative times can be programmed with this equation: Output Driver Output current drive capability is determined by the designer’s choice of external MOSFET (NFET). Power dissipated in the driver can be controlled by the voltage applied to VD. VD should be kept low to minimize power dissipation and high enough to support regulated operation at the desired output current. It should also be noted the output capacitor (VO to GND) value supports regulation during high speed transient events until the system loop can respond to any voltage dips to drive the external FET. T + C(NRCS) * V FB ń INRCS (eq. 1) Rush current during startup can be calculated by I = COUT * VO / T. The NRCS circuit is not active during powerdown. Normal circuit operation will be maintained unless VCC_UVLO or VD_UVLO cause the gate drive output to turn off. High Speed Control 3V Unlike most linear regulators whose reaction to overvoltage events is to turn off the upper driver and let the external load and resistor feedback network quench the incident, the NCP3520/21 include a 1.2 mA pulldown through the VS Pin. This keeps overshoot to a minimum during powerup. During turn−off and thermal overload, the pulldown current is increased from 1.2 mA to 220 mA to provide an even faster turn−off time. EN 1.2 V VS / VFB Power On Reset A 50 ms power on reset circuit is built into the IC acting as a digital filter and performing housekeeping activity during a short circuit event. The timer effects three areas of operation. 1. EN turn on delay. Upon detection of an EN high, there is a 50 ms delay to when the internal circuitry turns on and the gate pin (G) goes high. A low on EN resets the timer. 2. VCC startup delay. If VCC drops out below the undervoltage lockout voltage and restored above its hysteresis value, a 50 ms time is also observed from reinitiation of VCC and G going high. This is recognized to be different from the EN turn on delay by the active circuitry of the voltage reference, NRCS circuitry, and VS high current pulldown. 1.0 V 0.65 V NRCS 50 ms Error amplifier takes control here. A standby mode for short circuit is entered here. Figure 13. Powerup (NCP3520 (1.2 V) Version Shown) http://onsemi.com 7 NCP3520/NCP3521 3V Short Circuit Protection (SCP) The IC enters normal mode after the NRCS has gone through powerup. The NRCS capacitor has reached a 1 V (typ) threshold and fully discharged (50 mV (max)). When a short circuit event occurs it is detected when the voltage on VFB goes below (35% of VOUT). This triggers the NRCS current source to start charging the NRCS capacitor at the same 20 mA rate as during powerup. When the voltage on the capacitor reaches 1.3 V a short circuit event is confirmed, VG goes low turning off the external FET. VS Standby Current pulldown is enabled. EN 1.2 V VS / VFB 1.3 V Clearing a Short Circuit Latch Condition 1.0 V A short circuit latch condition can be cleared by toggling the EN from its high condition to a low condition, and then back to a high condition. NRCS 3V EN 0V 50 ms 1.2 V 50 ms Shirt Circuit Decision Timer Figure 15. Starting Up Into a Short Circuit (NCP3520 (1.2 V) Version Shown) VS / VFB Undervoltage Lockout VCC and VD detection is provided in conjunction with the EN input pin. When all three conditions are met (VCC is up, VD is up, and EN is high), the Non Rush Current on Startup (NRCS) circuitry is allowed to start. Any one of the three conditions failing will not allow the device to turn on. The VCC undervoltage threshold is 4.35 V and the VD threshold is VO * 0.7. VO * 0.35 Shirt Circuit is Detected 1.3 V Enable NRCS Output Falls Out of Regulation The Enable function is controlled by the logic pin EN. The threshold of this pin is set to TTL logic levels. TTL logic levels are 0.8 V (low) and 2.0 V (high). A low on the EN pin puts the device is a low current sleep mode consuming less than 10 mA (IVCC). A device going from normal operation to sleep will 1st go through a discharge mode maintaining a discharge current of 220 mA on VS (measured @ VS = 1 V). This pin has 60 mV (typ) of hysteresis to guarantee a clean switching threshold. Output Turns Off Figure 14. Short Circuit (NCP3520 (1.2 V) Version Shown) External Components A capacitor between VO and ground is required for stability. A 220 mF value capacitor such as the SANYO 2R5TPE220MF is recommended. The SANYO 2R5TPE220MF capacitor has a 15 mW maximum specification. Contact resistance and board trace resistance are the significant contributors to output capacitor ESR below 10 mW. As ON Semiconductor’s NCP352X family of LDO controllers may be considered as an alternative to Rohm’s family of LDO controllers, alternative FETs such as industry compatible parts like the Si4866DY may also be used in conjunction with ON Semiconductor’s controller. Starting Up Into a Short Circuit If the NCP3520/NCP3521 turns on and has not gone into a normal mode of operation, additional time has been added to the NRCS to ignore potential false short circuit confirmation during in−rush current events. This time is independent of the external capacitor value and is typically 50 ms. The voltage on NRCS operates as a normal condition until it reaches 1 V. The current source charging NRCS turns off for 50 ms disallowing the voltage to rise on NRCS. After 50 ms the current source turns back on and continues to charge the NRCS capacitor. Once 1.3 V is reached, the circuit operates as during a typical short circuit event. http://onsemi.com 8 NCP3520/NCP3521 Thermal Shutdown temperature moves below the shutdown threshold (180°C typical) minus the hysteresis factor (15°C typical). The output will then go through a soft startup using the NRCS circuitry. When the die temperature exceeds the Thermal Shutdown threshold, a Thermal Shutdown (TSD) event is detected and VG is turned off. The IC will remain in this state until the die ORDERING INFORMATION Package Shipping † NCP3520DMR2G Micro8 (Pb−Free) 4000 / Tape & Reel NCP3521DMR2G Micro8 (Pb−Free) 4000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 9 NCP3520/NCP3521 PACKAGE DIMENSIONS Micro8t CASE 846A−02 ISSUE G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A−01 OBSOLETE, NEW STANDARD 846A−02. D HE PIN 1 ID E e b 8 PL 0.08 (0.003) M T B S A S SEATING −T− PLANE 0.038 (0.0015) A A1 MIN −− 0.05 0.25 0.13 2.90 2.90 STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. L c MILLIMETERS NOM MAX −− 1.10 0.08 0.15 0.33 0.40 0.18 0.23 3.00 3.10 3.00 3.10 0.65 BSC 0.40 0.55 0.70 4.75 4.90 5.05 DIM A A1 b c D E e L HE INCHES NOM −− 0.003 0.013 0.007 0.118 0.118 0.026 BSC 0.016 0.021 0.187 0.193 MIN −− 0.002 0.010 0.005 0.114 0.114 MAX 0.043 0.006 0.016 0.009 0.122 0.122 0.028 0.199 SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 SOLDERING FOOTPRINT* 8X 1.04 0.041 0.38 0.015 3.20 0.126 6X 8X 4.24 0.167 0.65 0.0256 5.28 0.208 SCALE 8:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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