INFINEON TDA5931

Video IF Amplifier and Demodulator
with Full-SCART
TDA 5931-65
Bipolar IC
Features
●
●
●
●
Multistandard video IF
Interference suppression circuitry
Mean/peak value control
Area of application: TV set with Full-SCART
P-DIP-18
Type
Ordering Code
Package
TDA 5931-65
Q67000-A5136
P-DIP-18
Functional Description
Video IF for all European standards for positive and negative modulation. The video section
contains a Full-SCART interface. An output for the demodulated video signal (pin 9) allows the
insertion of a sound trap into the signal path to the input or the SCART switch and the SCART output
buffer amplifier (pin 7). The analog setting function (delayed AGC threshold) is controlled via a
potentiometer, all other switch functions are controlled via open-collector transistors.
Circuit Description
The component includes a four-stage, capacitively coupled, symmetrically designed and controlled
amplifier, a limiter with selection, and a mixer for quasi-synchronous demodulation of positive and
negative modulated IF signals. In addition a video output amplifier and noise suppression circuitry
are included. This output is used for generating the AGC voltage. The AGC for both modulation
types has been realized as integral AGC with noise free peak and mean value detector (only for
positive modulation). For SCART applications this output is switched a video source switch with two
inputs (for the demodulator signal or SCART socket) and two outputs (SCART- and TV output). The
demodulator output (pin 9) provides a video signal output level 3 dB higher than the level required
for the operation of the TV set or to drive the SCART connector. Therefore it is possible to insert a
sound trap in between this output and the input of the SCART switch (pin 7). The insertion loss of
the sound trap has to attenuate the signal level at pin 9 by a factor 2/3 or 3 dB (AC and DC) to avoid
distortions in the SCART switch.
The delayed tuner AGC is generated by a threshold amplifier driven by the control voltage. The
amplifier response can be controlled by means of an external potentiometer. (The increase of the
tuner AGC voltage shall create a higher tuner gain = positive control).
Semiconductor Group
31
06.94
TDA 5931-65
Pin Functions
Pin No.
Function
1
Video IF input
2
SCART switch A/W
3
SCART input
4
SCART input/output
5
+ VS supply voltage
6
Positive video output
7
Video output of the sound trap (2 Vpp)
8
Ground
9
Video input of the sound trap (3 Vpp)
10
Demodulator tank circuit
11
Demodulator tank circuit
12
TV-standard switch-over (B/G) – (L)
13
Low-pass filter (averaging)
14
Tuner AGC threshold
15
Tuner AGC output
16
AGC-time constant
17
Ground
18
Video IF input
Semiconductor Group
32
TDA 5931-65
Block Diagram
Semiconductor Group
33
TDA 5931-65
Absolute Maximum Ratings
TA = 0 to 70 °C
Parameter
Symbol
Limit Values
min.
max.
Unit
Sound trap input
V7
3.3
8.5
V
Demodulator output
V9
0
V5
V
Demodulator output
I9
–3
10
mA
Supply voltage
V5
0
13.2
V
SCART A/W
V2
0
6
V
Pos. video output
I6
–3
5
mA
Pos. video output
V6
0
8.5
V
Demodulator tank circuit
V10/V11
0
V5
V
SCART OUT
I4
–3
5
mA
SCART OUT
V4
0
V5
V
Tuner AGC threshold
V14
0
6
V
Tuner AGC output
V15
0
10
V
IF input
V1/V18
0
6
V
IF control
V16
0
8.5
V
Norm switch-over
V12
0
6
V
Norm switch-over
V13
0
6
V
SCART IN
V3
0
6
V
Junction temperature
Tj
150
˚C
Storage temperature
Tstg
125
˚C
Thermal resistance (system-air)
Tth SA
70
K/W
– 40
Operating Range
Supply voltage
V5
10.8
13.2
V
Supply voltage delayed tuner AGC
V15
1.5
13.2
V
Ambient temperature during operation
TA
0
70
˚C
Input frequency range – 3 dB
fIF
10
100
MHz
Input frequency range – 0.3 dB
fIF
30
75
MHz
All voltage values are referenced to ground, if not stated otherwise.
The current are identified according to the source/sink principle. If the IC considered a sink (the
current flows from the respective pin to ground), it is identified by a negative algebraic sign.
However, if the IC is the source (the current flows from VB via the respective pin to ground), it is
identified by a positive algebraic sign.
Semiconductor Group
34
TDA 5931-65
Characteristics
TA = 25 ˚C; VS = 12 V
Parameter
Symbol
Limit Values
Unit
Test Condition
min.
typ.
max.
– I5
38.5
56
71.5
mA
V1/16 = 10 mVrms
V16
V16
0
2.6
0.1
2.85
0.5
6.0
V
V
V1/16 = 45 µVrms
V1/16 = 175 mVrms
0.7
17
82
0.95
23
140
mA
µA
V16 = 2 V; V6 < 2.2 V
V16 = 2 V; V6 > 2.8 V
Static Characteristics
Total current consumption
AGC Voltage
Min. AGC
Max. AGC
AGC-Time Constant (by neg. modulation)
Charge current (Imax:2)
Discharge current
Charge/discharge ratio
I16
– I16
V16
0.55
13
55
AGC-Time Constant (by pos. modulation)
Charge current
Discharge current
I16
– I16
1.1
0.15
1.4
0.25
1.7
0.35
mA
µA
Discharge current
Charge/discharge ratio
– I16
70
4000
90
5600
110
9000
µA
V16 = 2 V; V6 ≥ 4.1 V
V16 = 2 V;
3.1 V < V6 < 4.1 V
V16 = 2 V; V6 < 2.3 V
V16
Averaging by Pos. Modulation
White level
V13
4.9
5.7
6.5
V
V1/18 = 10 mVrms
Zero carrier level
V13
3.3
3.7
4.1
V
V1/18 = 0 V; V16 = 3 V
Tuner AGC threshold
V14
I14
V16
V16
4.2
650
2.8
0.33
4.5
850
3.1
0.38
4.8
1050
3.4
0.43
V
µA
V
V
R14/17 = ∞
V14 = 0 V
R14/17 = 10 kΩ
R14/17 = 10 Ω
I5 = Imax:2
The characteristics data apply to the supply voltage range VS stated or in case of alignment to the
alignment instructions (see page 40). All static voltages are referenced to ground if not stated
otherwise.
The input levels are given as rms values referenced to synchronous peak fPC = 38.9 MHz.
Semiconductor Group
35
TDA 5931-65
Characteristics (cont’d)
Parameter
Symbol
Limit Values
Unit
Test Condition
V15 = 0.5 V5
V1/18 = 100 mVrms
V14 = 0.75 V
V15 = 0.5 V5
V1/18 = 10 mVrms
V14 = 4.0 V
min.
typ.
max.
– I15
10
18
30
mA
– I15
0
–
10
µA
IF input
V1, V18
5.7
6.0
6.3
V
Demodulator tank
V10, V11
V5 –
V5 –
V5 –
V
3.5
3.8
4.1
2.6
3.3
mA
V9 = 6 V, V1, 18 =
6.2
mA
V
carrier no-demod.
to ground
V1/18 = 10 mVrms
3.7
5.7
6.0
V
V
Signal ratio V9/7 = 3/2
Signal ratio V9/7 = 3/2
V1/18 = 0 V; V16 = 3 V
0 V > V2 > 2.4 V
2.7
mA
mA
V6 = 6 V
Tuner AGC current
max. 1 ms
Video Output (Demodulator)
Output current
– I9
1.9
Output current
Sychron level
I9
V9
4
5.2
V7
V7
3.3
– I6
I6
1.7
4
2.2
V6
V6
3.9
1.9
4.2
2.2
4.9
2.7
V
V
to ground via
R = 500 Ω
see Sound Trap
Input
V1/18 = 10 mVrms
V1/18 = 0 V; V16 = 3 V
V6
V6
1.9
4.1
2.2
4.4
2.7
5.1
V
V
V1/18 = 10 mVrms
V1/18 = 0 V; V16 = 3 V
5.6
Sound Trap Input
Sychron pulse level
White level
Pos. Video Output
Output current
Pos. modulation
(L standard)
White level
Zero carrier (sync.)
Neg. modulation
(BG standard)
Synchron pulse level
Zero carrier
Semiconductor Group
36
TDA 5931-65
Characteristics (cont’d)
Parameter
Symbol
Limit Values
min.
typ.
max.
1.6
2
2.6
Unit
Test Condition
mA
RL = ∞; see Sound
Neg. SCART Output
Output current
Pos. modulation
(L standard)
White level
Zero carrier (sync.)
Neg. modulation
(BG standard)
Synchron pulse level
Zero carrier
– I4
I4
4
V4
V4
V5 – 5.3 V5 – 5.0 V5 – 4.3 V
V5 – 3.2 V5 – 2.9 V5 – 2.5 V
Trap Input
V4 = V5
to ground via
R = 500 Ω
V1/18 = 10 mVrms
V1/18 = 0 V; V16 = 3 V
V4
V4
V5 – 3.2 V5 – 2.9 V5 – 2.5 V
V5 – 5.5 V5 – 5.2 V5 – 4.6 V
V1/18 = 10 mVrms
V1/18 = 0 V; V16 = 3 V
V3
I3
1.8
3
via R = 270 kΩ at
ground V3 = 1.2 V
V12
V12
V2
V2
V2
mA
Pos. SCART Input 4
Clamp level
Output current
1.9
2
V
mA
0
2.4
1.9
6
V
V
2.4
0
6
1.9
V
V
60
µV
6 Vpp – 1 dB
6 Vpp – 1 dB
Switching Voltage
L = L/E standard
H = B/G standard
o. open
Switching Voltage
Open = SCART operat.
H = SCART operation
L = HF operation
Dynamic Characteristics
Min. IF-input voltage
start of internal
AGC operation
f PC rms
V1/18
Max. IF-input voltage
(end of internal
AGC-control range)
f PC rms
V1/18
105
140
mV
IF-control range
∆v
65
70
dB
Semiconductor Group
45
37
TDA 5931-65
Characteristics (cont’d)
Parameter
Symbol
Limit Values
min.
typ.
Unit
Test Condition
max.
Video output voltages (peak to peak) f PC = 10 mVrms with neg. modulation and
residual carrier = 10%; with neg. modulation and residual carrier < 6%
Pos. video output
changes related to
V6
∆V6
1.8
2.0
2
2.2
5
Vpp
%
0 V < V2 < 1.9 V
0 V < V12 < 1.9 V;
0 < V2 < 1.9 V
2.4 V < V12 < 6 V
1.5
3
%
∆V6/∆V5
10.8 V < V5 < 13.2 V
2.1
2.3
Vpp
RL = ∞
0.2
0.5
dB
2.1
TV-standard switch over
Change due to operating
voltage
Neg. SCART output
V4
Changes of the video output
voltage over the control
range of 55 dB
∆V6
Video gain
V6/V3
1.9
2.0
Video bandwidth
P6/3-3dB
8
9
MHz
2.4 < V2 < 6 V;
V3 = 1 Vpp sinus
Cross talk attenuation
A
40
50
dB
0 < V2 < 1.9 V;
V1/18 = 0 V; V16 = 3 V;
V3 = 1 Vpp sinus
50 Hz … 10 MHz
1.5
2
2.5
kΩ
1.9
RG < 500 Ω;
2.4 < V2 < 6 V;
V3 = 1 Vpp (2 MHz)
Design Notes (no 100% final test)
Input resistance
(symmetrical)
R1/18
Input capacitance
(symmetrical)
C1/18
2
5
pF
Low pass cut-off
f– 3 dB (13) 70
100
130
Hz
Pos. video output
white level
V6
3.9
4.2
4.9
V
Synchron pulse level
frequency
V6
1.9
2.2
2.7
V
Video input voltage
± 3 dB at RG < 500 Ω
V3
Semiconductor Group
1
38
Vpp
C13/17 = 100 nF ± 10%
2.4 < V2 = 6 V;
(SCART operation)
V3 = 1 Vpp norm
video signal
V3 = 1 Vpp norm
video signal
TDA 5931-65
Characteristics (cont’d)
Parameter
Symbol
Limit Values
min.
typ.
Unit
Test Condition
max.
Intercarrier noise voltages ratio (weighted according CCIR 468) with parallel tank circuit 38.9 MHz,
SAW 361 D, fTT = 5.5 MHz (– 13 dB), demod.: TBA 120
S/N
48
dB
S/N
17
dB
FuBk – test picture
– ∆S/N
FuBk – test picture
– ∆S/N
2
dB
11
dB
Dyn. Output Resistance
Pos. video output
Neg. video output
R6
R4
Noise figure
V1/18 = – 57 dBm =
+ 50 dB µV
RG = 800 Ω
F
80
100
115
150
150
200
Ω
Ω
5
7
dB
Video noise voltage ratio at
BT = 10 mVrms
0 dB = 700 mVrms BA
unweighted
weighted according to
CCIR Rec. 567-1
S/N
50
55
dB
S/N
55
60
dB
B3 dB
B– 12 dB
8
15
10
17
13
20
MHz
MHz
V6
3.0
6.0
mV
V6
0.3
0.6
mV
Video Frequency Response
– 3 dB
– 12 dB
Residual Carrier Voltage at Video Output
fPC = 10 mVr ms 38.9 MHz
Fundamental wave
1. harmonic wave
f = 77.8 MHz
Semiconductor Group
39
V1/18 = 10 mVpp
FuBk mod.
V1/18 = 10 mVpp
2.753 MHZ mod.
with detuning
∆f = – 400 kHz
with detuning
∆f = + 400 kHz
TDA 5931-65
Characteristics (cont’d)
Parameter
Symbol
Limit Values
min.
typ.
Unit
Test Condition
max.
Differential Gain with fPC = 10 mV (staircase signal)
Peak to Peak According to CCIR Rec. 567-1
Staircase signal
Changes via AGC
Changes via detuning
fPC = 38.9 MHz;
∆ f ± 400 kHz
DG
∆ DG / ∆ v
∆ DG / ∆ f
4.5
6
±1
± 1.5
%
%
%
Differential Phase with fPC = 10 mVrms (staircase signal)
Peak to Peak According to CCIR Rec. 567-1
Staircase signal
Changes via AGC
Changes via detuning
fPC = 38.9 MHz;
∆ f ± 400 kHz
DP
∆ DP / ∆ v
∆ DP / ∆ f
2
2.5
1
±1
degree
degree
degree
32
54
51
38
60
57
–
–
–
dB
dB
dB
300
450
600
mVpp
5
%
Interdemodulation Ratio
With fIM = 1.07 MHz = fTT – fFT
With BT = 10 mVeff
With sound porch – 13 dB
aIM
With sound porch – 13 dB
aIM
With sound porch – 13 dB
aIM
Demodulator Tank Circuit Voltage
fPC = 38.9 MHz; C = 47 pF
L = 350 nH
100 ≤ Q0 ≤ 120; Q8 ≈ 60;
B ≈ 0.8 … 1.0 MHz
Synchron pulse
Semiconductor Group
V10/11
∆VSync/V6
40
OFW G 3950
OFW 361D
OFW G 1956
TDA 5931-65
Alignment Instructions
At a video carrier input level of V1/18 = 4 mVrms, fPC = 38.9 MHz and a superimposed AGC voltage
of V16 = 1.5 V the tank circuit is aligned that way, that at the positive video output the demodulated
video signal 6 Vpp is at its maximum.
As a modulation every sufficient video test pattern can be used. Then the superimposed AGCcontrol voltage at pin 16 is reduced until the video signal has an amplitude of approx. 2 Vpp. The
video signal is then fine tuned for its maximum.
The adjustment is not critical due to the wide maximum.
The adjustment can also be performed regarding intercarrier signal to noise ratio, differential gain or
2T-pulse response.
Semiconductor Group
41
TDA 5931-65
Test Circuit
Semiconductor Group
42
TDA 5931-65
Application Circuit
Semiconductor Group
43