ONSEMI MC1121DMR2

MC1121
100mA Charge Pump Voltage
Converter with Shutdown
The MC1121 is a charge pump converter with 100mA output
current capability. It converts a 2.4V to 5.5V input to a corresponding
negative output voltage. As with all charge pump converters, the
MC1121 uses no inductors saving cost, size, and reducing EMI.
An on–board oscillator operates at a typical frequency of 10kHz (at
VDD = 5V) when the frequency control input (FC) is connected to
ground. The oscillator frequency increases to 200kHz when FC is
connected to VDD, allowing the use of smaller capacitors. Operation at
sub–10kHz frequencies results in lower quiescent current and is
accomplished with the addition of an external capacitor from OSC (pin
7) to ground. The MC1121 can be driven from an external clock
connected OSC. Typical supply current at 10kHz is 50µA, and falls to
less than 1µA when the shutdown input is brought low, whether the
internal or an external clock is used. The MC1121 is available in a
Micro–8 package.
Features
• Converts a 2.4V to 5.5V Input Voltage to a Corresponding Negative
Output Voltage (Inverter Mode)
• Uses Only 2 Capacitors; No Inductors Required!
• High Output Current: 100mA
• Selectable Oscillator Frequency: 10kHz to 200kHz
• Power–Saving Shutdown Input
• Optional High–Frequency Operation Allows Use of Small Capacitors
• Low Operating Current (FC = GND): 50µA
• Tested Operating Temperature Range: –40°C to +85°C
Typical Applications
• Laptop Computers
• Medical Instruments
• Disk Drives
• µP–Based Controllers
• Process Instrumentation
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Micro8
DM SUFFIX
CASE TBD
PRELIMINARY INFORMATION
PIN CONFIGURATION
(Top View)
FC 1
CAP+ 2
GND 3
8 VDD
MC1121
7 OSC
6 SHDN
5 VOUT
CAP– 4
ORDERING INFORMATION
Device
MC1121DMR2
Package
Shipping
Micro–8
2500 Tape/Reel
FUNCTIONAL BLOCK DIAGRAM
+
CAP+
SHDN
FC
–
C1
CAP–
OSC
CONTROL
RC
OSCILLATOR
OSC
Vout
SWITCH
MATRIX
+
C2
VDD
GND
MC1121
LOGIC
CIRCUITS
 Semiconductor Components Industries, LLC, 1999
February, 2000 – Rev. 0
1
Publication Order Number:
MC1121/D
MC1121
PIN DESCRIPTION
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Pin No.
Symbol
Description
1
FC
Frequency control for internal oscillator, FC = open, FOSC = 10kHz typ; FC = VDD, FOSC = 200kHz
typ, FC has no effect when OSC pin is driven externally
2
CAP+
Charge–pump capacitor, positive terminal
3
GND
Power–supply ground input
4
CAP–
Charge–pump capacitor, negative terminal
5
VOUT
Output, negative voltage
6
SHDN
Shutdown
7
OSC
Oscillator control input. An external capacitor can be added to slow the oscillator. Take care to
minimize stray capacitance. An external oscillator also may be connected to overdrive OSC
8
VDD
Power–supply positive voltage input
ABSOLUTE MAXIMUM RATINGS*
Parameter
Value
Unit
6.0
V
Operating Temperature Range
–40 to +85
°C
OSC, FC, SHDN Input Voltage
–0.3 to (VDD + 0.3)
V
Output Short Circuit Duration
10
Sec
Storage Temperature Range
–65 to +150
°C
VDD Supply Voltage
Package Power Dissipation (TA ≤ 70°C) Micro8
Derate by 4mW/°C for TA > 70°C
333
Lead Temperature (Soldering, 10 Seconds)
+300
mW
°C
* Maximum Ratings are those values beyond which damage to the device may occur.
ELECTRICAL CHARACTERISTICS (TA = –40°C to +85°C, VDD = 5V ±10% COSC = OPEN, C1, C2 = 10µF, FC = VDD,
SHDN = VIH, unless otherwise noted. Typical values are at TA = 25°C.)
Symbol
Min
Typ
Max
Unit
Active Supply Current
RL = Open, FC = Open or GND
RL = Open, FC = VDD
—
—
50
0.6
100
1.0
µA
mA
IDD(SHDN)
Shutdown Supply Current (SHDN = 0V)
—
0.2
1.0
µA
VDD
Supply Voltage
2.4
—
5.5
V
VIH
SHDN Logic High Input Voltage
VDD x 0.8
—
—
V
VIL
SHDN Logic Low Input Voltage
—
—
0.4
V
IIN
Input Leakage Current
SHDN, OSC
FC Pin
–1.0
–4.0
—
—
1.0
4.0
IDD
Characteristic
µA
ROUT
Output Source Resistance (IOUT = 60 mA)
—
12
20
W
IOUT
Output Current (VOUT more negative than –3.75V)
60
100
—
mA
FOSC
Oscillator Frequency
OSC Open, FC = Open or GND
SHDN = VIH, FC = VDD
5.0
100
10
200
—
—
Power Efficiency (FC = GND)
RL = 2kW between VDD and VOUT
RL = 1 kW between VOUT and GND
IL = 60 mA to GND
93
94
—
97
97
92
—
—
—
Voltage Conversion Efficiency (RL = OPEN)
99
99.9
—
PEFF
VEFF
kHz
%
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2
%
MC1121
APPLICATIONS INFORMATION
Negative Voltage Converter
The oscillator runs at 10kHz (typical) when FC and OSC
are not connected. The oscillator frequency is lowered by
connecting a capacitor between OSC and GND, but FC can
still multiply the frequency by 20 times in this mode.
An external clock source that swings within 100mV of
VDD and GND may overdrive OSC in the inverter mode.
OSC can be driven by any CMOS logic output. When OSC
is overdriven, FC has no effect.
Note that the frequency of the signal appearing at CAP+
and CAP- is half that of the oscillator. In addition, by
lowering the oscillator frequency, the effective output
resistance of the charge–pump increases. To compensate for
this, the value of the charge–pump capacitors may be
increased.
Because the 5kHz output ripple frequency may be low
enough to interfere with other circuitry, the oscillator
frequency can be increased with the use of the FC pin or an
external oscillator. The output ripple frequency is half the
selected oscillator frequency. Although the MC1121’s
quiescent current will increase if the clock frequency is
increased, it allows smaller capacitance values to be used for
C1 and C2.
The MC1121 is typically used as a charge–pump voltage
inverter. C1 and C2 are the only two external capacitors used
in the operating circuit (see Figure 1).
2.4 V to 5.5 V
VDD
8
MC1121
CAP+
OSC
2
7
1
FC
+
C2
–
3
4
GND
CAP–
SHDN
6
Vout
5
SHDN*
Vout
–
C2
+
NOTES: *SHDN should be tied to VDD if not used.
Figure 1. Charge Pump Inverter
The MC1121 is not actively regulated. A typical output
source resistance of 11.8W means that an input of +5V
results in - 5V output voltage under light load, and only
decreases to - 3.8V (typ) with a 100mA load.
The supplied output current is from capacitor C2 during
one–half the charge–pump cycle. This results in a
peak–to–peak ripple of:
VRIPPLE = IOUT/2(fPUMP) (C2) + IOUT (ESRC2)
Where fPUMP is 5kHz (one half the nominal 10kHz
oscillator frequency), and C2 = 150µF with an ESR of 0.2W
ripple is about 90mV with a 100mA load current. If C2 is
raised to 390µF, the ripple drops to 45mV.
Capacitor Selection
In addition to load current, the following factors affect the
MC1121 output voltage drop from its ideal value 1) output
resistance, 2) pump (C1) and reservoir (C2) capacitor ESRs,
and 3) C1 and C2 capacitance.
The voltage drop is the load current times the output
resistance. The loss in C2 is the load current times C2’s ESR;
C1’s loss is larger because it handles currents greater than
the load current during charge–pump operation. Therefore,
the voltage drop due to C1 is about four times C1’s ESR
multiplied by the load current, and a low (or high) ESR
capacitor has a greater impact on performance for C1 than
for C2.
In general, as the MC1121’s pump frequency increases,
capacitance values needed to maintain comparable ripple
and output resistance diminish proportionately.
Changing Oscillator Frequency
The MC1121’s clock frequency is controlled by four
modes:
FC
OSC
Oscillator Frequency
Cascading Devices
Open
Open
10kHz
FC = VDD
Open
200kHz
Open or
FC = VDD
External
Capacitor
Reduced from 10kHz or
200kHz depending on FC state
Open
External Clock
External Clock Frequency
To produce greater negative magnitudes of the initial
supply voltage, the MC1121 may be cascaded (see Figure 2).
The resulting output resistance is approximately equal to the
sum of individual MC1121 ROUT values. The output voltage
(where n is an integer representing the number of devices
cascaded) is defined by
VOUT = - n (VIN).
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3
MC1121
Vin+
MC1121
“1”
1
2
FC
VDD
8
CAP+
OSC
MC1121
“n”
1
2
7
+
FC
VDD
8
CAP+
OSC
7
+
C1
SHDN
GND
3
CAP–
4
C1n
SHDN*
6
Vout
5
SHDN
GND
3
CAP–
4
SHDN*
6
Vout
5
Vout
C2
+
C2
+
NOTES: *SHDN should be tied to it’s respective VDD if not used.
Figure 2. Cascading MC1121s to Increase Output Voltage
Paralleling Devices
capacitor C1, but the reservoir capacitor C2 serves all
devices. The value of C2 should be increased by a factor of
n (the number of devices).
To reduce output resistance, multiple MC1121s may be
paralleled (see Figure 3). Each device needs a pump
MC1121
“1”
1
2
Vin+
FC
VDD
8
CAP+
OSC
7
MC1121
“n”
1
OSC
2
+
C1
FC
VDD
8
CAP+
OSC
7
+
3
4
GND
CAP–
SHDN
6
*SHDN
C1n
3
Vout
5
4
GND
CAP–
SHDN
SHDN*
6
Vout
5
Rout = Rout (of MC1121)/n(number of devices)
C2
+
NOTES: *SHDN should be tied to VDD if not used.
Figure 3. Paralleling MC1121s to Reduce Output Resistance
Vin+
Combined Positive Supply Multiplication and Negative
Voltage Conversion
D1, D2 = 1N4148
Figure 4 shows this dual function circuit, in which
capacitors C1 and C2 perform pump and reservoir functions
to generate the negative voltage. Capacitors C2 and C4 are
the respective capacitors for the multiplied positive voltage.
This particular configuration leads to higher source
impedances of the generated supplies due to the finite
impedance of the common charge–pump driver.
VDD
1
8
MC1121
CAP+
OSC
2
7
FC
+
D1
Vout = Vin–
C1
3
4
GND
Vout
5
CAP–
SHDN
6
SHDN*
+
D2
NOTES: *SHDN should be
tied to VDD if not used.
Figure 4. Combined Positive
Multiplier and Negative Converter
4
C2
Vout = (2Vin) –
(VFD1) – (VFD2)
C3
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+
+
C4
MC1121
TAPE AND REEL INFORMATION
Component Taping Orientation for Micro–8 Devices
USER DIRECTION OF FEED
PIN 1
Standard Reel Component Orientation
for R2 Suffix Device
(Mark Right Side Up)
Tape & Reel Specifications Table
Package
Tape Width (W)
Pitch (P)
Part Per Full Reel
Diameter
Micro–8
12 mm
4 mm
2500
13 inches
MARKING
MC1121DMR2
1121
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5
MC1121
PACKAGE DIMENSIONS
Micro8
PLASTIC PACKAGE
CASE TBD
ISSUE TBD
PIN 1
.122 (3.10) .197 (5.00)
.114 (2.90) .187 (4.80)
.026 (0.65) TYP.
.122 (3.10)
.114 (2.90)
.043 (1.10)
MAX.
.008 (0.20)
.005 (0.13)
6 ° MAX.
.006 (0.15)
.016 (0.40) .002 (0.05)
.010 (0.25)
.028 (0.70)
.016 (0.40)
Dimensions: inches (mm)
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6
MC1121
Notes
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7
MC1121
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are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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8
MC1121/D