SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995 • • Bidirectional Bus Transceivers in High-Density 20-Pin Packages Inverting Logic Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs SN54ALS640B, SN54AS640 . . . J PACKAGE SN74ALS640B, SN74AS640 . . . DW OR N PACKAGE (TOP VIEW) DIR A1 A2 A3 A4 A5 A6 A7 A8 GND description These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 A2 A1 DIR VCC SN54ALS640B, SN54AS640 . . . FK PACKAGE (TOP VIEW) The -1 version of the SN74ALS640B is identical to the standard version, except that the recommended maximum IOL for the -1 version is increased to 48 mA. There is no -1 version of the SN54ALS640B. A3 A4 A5 A6 A7 The SN54ALS640B and SN54AS640 are characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS640B and SN74AS640 are characterized for operation from 0°C to 70°C. OE • 4 3 2 1 20 19 18 5 17 6 16 7 15 14 8 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 9 10 11 12 13 FUNCTION TABLE INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995 logic symbol† OE DIR A1 19 1 logic diagram (positive logic) OE G3 19 3 EN1 [BA] 3 EN2 [AB] 2 18 1 DIR B1 1 2 A2 A3 A4 A5 A6 A7 A8 3 17 4 16 5 15 6 14 7 13 8 12 9 11 B2 B3 A1 2 18 B1 B4 B5 B6 B7 To Seven Other Transceivers B8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN54ALS640B . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74ALS640B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54ALS640B VCC VIH Supply voltage VIL IOH Low-level input voltage IOL High-level input voltage NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 High-level output current Low level output current Low-level TA Operating free-air temperature § Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V 2 SN74ALS640B MIN POST OFFICE BOX 655303 – 55 • DALLAS, TEXAS 75265 2 UNIT V V 0.7 0.8 V – 12 – 15 mA 12 24 48§ mA 70 °C 125 0 SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54ALS640B TYP† MAX TEST CONDITIONS MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA VCC = 4.5 V IOH = – 3 mA IOH = – 12 mA – 1.5 VCC – 2 2.4 II VCC = 4.5 V Control inputs A or B ports VCC = 5 5.5 5V VI = 7 V VI = 5.5 V Control inputs A or B ports§ VCC = 5 5.5 5V V, VI = 2 2.7 7V IIL Control inputs A or B ports§ 5V VCC = 5 5.5 V, 4V VI = 0 0.4 VCC = 5.5 V, VO = 2.25 V Outputs high ICC 3.2 3.2 VCC = 5.5 V UNIT V V 2 0.25 0.4 IOL = 24 mA IOL = 48 mA‡ IIH IO¶ – 1.5 VCC – 2 2.4 2 IOH = – 15 mA IOL = 12 mA VOL SN74ALS640B TYP† MAX MIN – 20 Outputs low 0.25 0.4 0.35 0.5 0.35 0.5 0.1 0.1 0.1 0.1 20 20 20 20 – 0.1 – 0.1 – 0.1 – 0.1 – 112 – 30 – 112 19 50 19 45 27 60 27 55 V mA µA mA mA mA Outputs disabled 28 55 28 50 † All typical values are at VCC = 5 V, TA = 25°C. ‡ Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V § For I/O ports, the parameters IIH and IIL include the off-state output current. ¶ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX# SN54ALS640B tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B UNIT SN74ALS640B MIN MAX MIN 2 14 2 MAX 11 2 13 2 10 4 25 4 21 5 27 5 24 2 12 2 10 3 20 3 15 ns ns ns # For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN54AS640 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74AS640 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54AS640 SN74AS640 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current – 12 – 15 mA IOL TA Low-level output current 48 64 mA 70 °C High-level input voltage 2 Operating free-air temperature 2 – 55 125 V V 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK II Control inputs A or B ports II = – 18 mA IOH = – 2 mA VCC = 4.5 V to 5.5 V, IOH = – 2 mA IOH = – 3 mA VCC = 4.5 V IOH = – 12 mA IOH = – 15 mA VCC = 4 4.5 5V IOL = 48 mA IOL = 64 mA VCC = 5 5.5 5V VI = 7 V VI = 5.5 V IIH Control inputs A or B ports§ VCC = 5 5.5 5V V, VI = 2 2.7 7V IIL Control inputs A or B ports§ VCC = 5 5.5 5V V, VI = 0 0.4 4V VCC = 5.5 V, VO = 2.25 V Outputs high IO¶ ICC MIN VCC = 4.5 V, VCC = 4.5 V, VOH VOL SN54AS640 TYP‡ MAX TEST CONDITIONS VCC = 5.5 V SN74AS640 TYP‡ MAX MIN – 1.2 – 1.2 UNIT V VCC – 2 2.4 VCC – 2 2.4 3.2 V 3.2 2.4 2.4 0.3 0.55 0.35 – 50 Outputs low 0.55 0.1 0.1 0.1 0.1 20 20 70 70 – 0.5 – 0.5 – 0.75 – 0.75 – 150 – 50 – 150 37 58 37 58 78 123 78 123 V mA µA mA mA mA Outputs disabled 51 80 51 80 ‡ All typical values are at VCC = 5 V, TA = 25°C. § For I/O ports, the parameters IIH and IIL include the off-state output current. ¶ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† SN54AS640 tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B UNIT SN74AS640 MIN MAX MIN MAX 1 8 2 7 1 7 2 6 2 10 2 8 2 12 2 10 2 9 2 8 2 16 2 13 ns ns ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V Data Input tw th tsu 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 23-Apr-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 5962-88727012A OBSOLETE LCCC FK 20 TBD Call TI 5962-8872701RA ACTIVE CDIP J 20 1 TBD A42 SNPB Call TI N / A for Pkg Type 5962-8872701SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type 5962-89553012A ACTIVE LCCC FK 20 1 TBD 5962-8955301RA ACTIVE CDIP J 20 1 TBD 5962-8955301SA OBSOLETE CFP W 20 TBD Call TI SN54ALS640BJ ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SN54AS640J ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SN74ALS640B-1DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640B-1DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640B-1DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640B-1DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640B-1DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640B-1DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640B-1N ACTIVE PDIP N 20 CU NIPDAU N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type Call TI 20 Pb-Free (RoHS) TBD Call TI 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS640B-1N3 OBSOLETE PDIP N 20 SN74ALS640B-1NE4 ACTIVE PDIP N 20 SN74ALS640B-1NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640B-1NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640B-1NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640BDW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640BDWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640BDWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640BDWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640BDWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640BDWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640BN ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS640BNE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS640BNSR ACTIVE SO NS 20 CU NIPDAU Level-1-260C-UNLIM 2000 Green (RoHS & Addendum-Page 1 Call TI PACKAGE OPTION ADDENDUM www.ti.com 23-Apr-2008 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74ALS640BNSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS640BNSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AS640NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AS640NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS640NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54ALS640BFK OBSOLETE LCCC FK 20 TBD Call TI SNJ54ALS640BJ ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SNJ54ALS640BW ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type SNJ54AS640FK ACTIVE LCCC FK 20 1 TBD SNJ54AS640J ACTIVE CDIP J 20 1 TBD Lead/Ball Finish MSL Peak Temp (3) no Sb/Br) Call TI POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 23-Apr-2008 temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ALS640B-1DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74ALS640BDWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74AS640DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ALS640B-1DWR SOIC DW 20 2000 346.0 346.0 41.0 SN74ALS640BDWR SOIC DW 20 2000 346.0 346.0 41.0 SN74AS640DWR SOIC DW 20 2000 346.0 346.0 41.0 Pack Materials-Page 2 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. 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