SANYO STK621-017

STK621-017
TENTATIVE
01.Nov.2002
*Notes
Lower side →It outputs FAULT signal with gate signal OFF.
However, it different from the protection operation of upper side, it is automatically reset
about 9 ms later and becomes an operation beginning condition when recovering to the normal
voltage. (The protection operation doesn't latch by the input signal.)
3.When assembling the hybrid IC on the heat sink, tightening torque range is 0.8N・m to 1.0N・m.
Circuit Block Diagram
V B1( 8)
CB
U ( 9)
V B2( 5)
V ( 6)
CB
V B3( 2)
CB
W ( 3)
U .V .
U .V .
U .V .
+ (11)
− (13)
Shunt R esistor
Level
Shifter
Level
Shifter
Level
Shifter
H IN 1(14)
H IN 2(15)
H IN 3(16)
Logic
Logic
Logic
LIN 1(17)
LIN 2(18)
LIN 3(19)
Fault(20)
Iso( 21)
V D D (22)
V ss(23)
Latch
Latch T im e A bout 9m s
( A utom atic R eset )
O ver-C urrent
V D D -U nder V oltage
────────────────────────────────────────────
SANYO Electric Co.,Ltd. Semiconductor Company
No.3/8
STK621-017
01.Nov.2002
TENTATIVE
Test Circuit
Fig1:ICE
ICE
2
M
A
VD3=15V
U+
V+
W+
U-
V-
W-
M
11
11
11
9
6
3
N
9
6
3
13
13
13
3
5
VD2=15V
6
VCE
8
VD1=15V
9
22
VD4=15V
23
N
2
M
Fig2:VCE(SAT)
VD1=15V
3
U+
V+
W+
U-
V-
W-
M
11
11
11
9
6
3
N
9
6
3
13
13
13
6
m
14
15
16
17
18
19
8
5
VD2=15V
V
VD3=15V
Io
VCE(SAT)
9
22
VD4=15V
m
23
N
Fig3:VF
U+
V+
W+
U-
V-
W-
M
11
11
11
9
6
3
N
9
6
3
13
13
13
M
V
VF
Io
N
Fig4:ID
VD1
VD2
VD3
VD4
m
8
5
2
22
n
9
6
3
23
ID
A
m
VD*
n
SANYO Electric Co.,Ltd. Semiconductor Company
4/8
STK621-017
01.Nov.2002
TENTATIVE
Test Circuit
Fig5:ISD(Ex. Lower U phase)
2
9
VD3=15V
Input signal
3
5
VD2=15V
6
Io
8
Io
ISD
VD1=15V
9
22
VD4=15V
100μS
Input
17
23
13
Fig6:Switching time(Ex. Lower U phase)
2
11
VD3=15V
Input signal
3
(0~5V)
5
VD2=15V
6
90%
8
Vcc
CS
VD1=15V
Io
10%
9
22
VD4=15V
Input
tON
9
tOFF
Io
17
23
13
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5/8
STK621-017
────────────────────────────────────────────
TENTATIVE
Application Circuit
01.Nov.2002
+
−
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
Fault
Iso
VDD
Vss
VB1
U
VB2
V
VB3
W
STK621-017
2 3 ・ 5 6 ・ 8 9 ・ 11 ・ 1314151617181920212223
CB
D
CB
D
D
+
−
CB
Vcc
CS
RB
CI
VDD=15
Control Logic
CD
Recommended Operating Conditions
Item
Symbol
Conditions
Min.
Typ.
Max.
Unit
0
280
400
V
Supply Voltage
Vcc
Between + & -
Pre-Driver
VD1,2,3
Between VB & VS
12.5
15
17.5
Supply Voltage
VD4
Between VDD & Vss
13.5
15
16.5
ON-state Input Voltage
VIN(ON)
HIN1,HIN2,HIN3,
0
-
0.3
OFF-state Input voltage
VIN(OFF) LIN1,LIN2,LIN3 Terminal
3.5
-
5
PWM Frequency
fPWM
1
-
20
KHZ
Deadtime
DT
turn-off to turn-on
2
-
-
μs
Tightening Torque
MT
‘M3’Type Screw
0.8
-
1.0
N・m
SANYO Electric Co.,Ltd.
Semiconductor Company
V
V
No.6/8
STK621-017
TENTATIVE
01.Nov.2002
Usage Precautions
1. By the addition of the diode for the bootstrap (DB : high speed type, withstand voltage equa
l to or more than 600V) and of the capacitor (CB : about 1 to 47μF), a single power supply
drive is enabled. In this case, it makes a lower side IGBT ON (input signal of lower side
makes LOW). Then it charges in CB. Incidentally, in case of start-up and so on, when the
voltage of CB is low, the big charging electric current flows and sometimes becomes the
cause which exerts the bad influence of the noise and so on. Put limitation resistance RB
(Several Ω to about tens of Ω). (When not using bootstrap circuit, each upper side
pre-drive power supply needs an independent power supply. Externally set.) Also, the upper
side power supply
voltage sometimes declines by the way of controlling. Confirm it
2. Because the jump voltage which is accompanied by the vibration in case of switching
operation occurs by the influence of the floating inductance of the wiring of the outer
power supply which is connected with of the + terminal and the – terminal, restrains and
spares serge voltage being as the connection of the snubber circuit (Capacitor / CS / about
0.1 - 10 μF) for the voltage absorption with the neighborhood as possible between + and the
- terminal, and so on, with making a wiring length (among the terminals each from CI) short
and making a wiring inductance small.
3. Iso terminal (20pin) is for the electric current monitor. Be careful, because the
overcurrent protection does not operate when short-circuiting in the Iso terminal and the
Vss terminal.
4. Output form of the FAULT terminal is open DRAIN (it is operating as FAULT when becoming LOW).
When the pull up with the resistance, use above 5.6KΩ.
5. The overcurrent protection feature operates only when it is possible to do a circuit control
normally. For the safety, put a fuse, and so on in the Vcc line.
6. Because the IC sometimes destroys and bursts when motor connection terminal (3pin,6pin,9pin)
becomes open while the motor turns, especially, be careful of the connection ( the soldering
condition ) of this terminal.
This data shows the example of the application circuit, does not guarantee a design as the mass.
SANYO Electric Co.,Ltd.
Semiconductor Company
No.7/8