FAIRCHILD KA3843AC

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KA3843AC
SMPS Controller
Features
Description
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The KA3843AC are fixed PWM controller for Off-Line and
DC to DC converter applications. The internal circuits
include UVLO, low start up current circuit, temperature
compensated reference, high gain error amplifier, current
sensing comparator, and high current totem-pole output for
driving a POWER MOSFET. Also KA3843AC provide low
start up current below 0.3mA and short shutdown delay
time typ. 100ns. The KA3843AC is 8.4V(on) and 7.6V(off).
The KA3843AC can operate within 100% duty cycle.
Low start current 0.2mA (typ)
Operating range up to 500kHz
Cycle by cycle current limiting
Under voltage lock out with hysteresis
Short shutdown delay time: typ.100ns
High current totem-pole output
Output swing limiting: 22V
8-DIP
1
8-SOP
1
Internal Block Diagram
7 VCC
29V
5V
VREF
VREF 8
SET/
RESET
5 GND
UVLO
Internal
Bias
Good LOGIC
7
1/2VREF
VFB 2
Error Amp
+
-
PWR
VC
C.S
PWM
Comp. LATCH
1/3
R
22V
1V
6 OUTPUT
S
COMP 1
5 PWR
T
C.S 3
RT/CT 4
GND
OSCILLATOR
Rev. 1.0.1
©2005 Fairchild Semiconductor Corporation
KA3843AC
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Supply voltage
VCC
30
V
Output current
IO
+1
A
VI(ANA)
-0.3 to 6.3
V
ISINK(EA)
10
mA
PD
1
W
Analog inputs (pin2, 3)
Error amp. output sink current
Power dissipation
Electrical Characteristics
(VCC = 15V, RT = 10KW, CT = 3.3nF, TA = 0°C to +70°C ,Unless otherwise specified)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
REFERENCE SECTION
Output voltage
VREF
TJ = 25°C, IO = 1mA
4.9
5.0
5.1
V
Line regulation
RLine
VCC = 12V to 25V
-
6
20
mV
RLOAD
ISC
IO = 1mA to 20mA
Ta = 25°C
-
6
-100
25
-180
mV
mA
47
52
57
kHz
-
0.2
1.7
1
-
%
V
TJ = 25°C
7.8
8.3
8.8
mA
(Note2, 3)
VPIN1 = 5V(Note2)
2.85
0.9
3
1.0
3.15
1.1
V/V
V
Load regulation
Output short circuit
OSILLATOR SECTION
Initial accuracy
FOSC
TJ = 25°C
Voltage stability
Amplitude
STV
VOSC
VCC = 12V to 25V
VPIN4, peak to peak
Discharge current
IDISCHG
CURRENT SENSE SECTION
Gain
Maximum input signal
GV
VI(MAX)
PSRR
PSRR
VCC = 12V to 25V (Note1, 2)
-
70
-
dB
Input bias current
IBIAS
VSENSE=0V
-
-2
-10
uA
VPIN3 = 0 V to 2V (Note1)
-
100
200
ns
Delay to output
TD
Notes:
1. These parameters, although guaranteed, are not 100% tested in production.
2. Parameter measured at trip point of latch with VFB = 0V.
∆V COMP
3. Gain defined as: G V = ------------------------- ;O ≤ V SENSE ≤ 0.8V
∆V SENSE
2
KA3843AC
Electrical Characteristics (Continued)
(VCC = 15V, RT = 10KW, CT = 3.3nF, TA = 0°C to +70°C, Unless otherwise specified)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
2.42
2.50
2.58
V
ERROR AMPLIFIER SECTION
Input voltage
VI
VPIN1 = 2.5V
Input bias current
IBIAS
VFB=0V
-
-0.3
-2
uA
Open loop gain
GVO
VO = 2V to 4V (Note1)
65
90
-
dB
Unity gain bandwidth
GBW
TJ= 25°C (Note1)
0.7
1
-
MHz
PSRR
PSRR
VCC = 12V to 25V (Note1)
60
70
-
dB
Output sink current
ISINK
VPIN2 = 2.7V, VPIN1 = 1.1V
2
6
-
mA
ISOURCE
VPIN2 = 2.3V, VPIN1 = 5.0V
Output source current
-0.5
-0.8
-
mA
5
6
-
V
Output high voltage
VOH
VPIN2 = 2.3V
R1 = 15KΩ to GND
Output low voltage
VOL
VPIN2 = 2.7V
R1 = 15kΩ to Vref
-
0.7
1.1
V
ISINK = 20mA
-
0.1
0.4
V
ISINK = 200mA
-
1.5
2.2
V
ISOURCE = 20mA
13
13.5
-
V
ISOURCE = 200mA
12
13.5
-
V
OUTPUT SECTION
Output Low Level
VOL
Output high level
VOH
Rise time
tR
TJ = 25°C, C1 = 1nF (Note1)
-
40
100
ns
Fall time
tF
TJ = 25°C, C1 = 1nF (Note1)
-
40
100
ns
VCC = 27V, C1 = 1nF
-
22
-
V
KA3882E
15
16
17
V
KA3883E
7.8
8.4
9.0
V
KA3882E
9
10
11
V
KA3883E
7.0
7.6
8.2
V
KA3882E/KA3883E
94
96
100
%
Output voltage swing limit
VOLIM
UNDER VOLTAGE LOCKOUT SECTION
Start threshold
Min. operating voltage
( after turn on )
VTH
VTL
PWM SECTION
Maximum duty cycle
DMAX
Minimum duty cycle
DMIN
-
-
-
0
%
Start-up current
IST
-
-
0.2
0.4
mA
Operating supply current
ICC
VPIN2 = VPIN3 = 0V
-
11
17
mA
VCC zener voltage
VZ
ICC = 25mA
-
29
-
V
TOTAL STANDBY CURRENT
* Adjust VCC above the start threshold before setting at 15V
Notes :
1. These parameters, although guaranteed, are not 100% tested in production.
2. Parameter measured at trip point of latch with VFB = 0V.
∆V COMP
3. Gain defined as: G V = ------------------------- ;O ≤ V SENSE ≤ 0.8V
∆V SENSE
3
KA3843AC
Mechanical Dimensions
Package
Dimensions in millimeters
1.524 ±0.10
#5
2.54
0.100
5.08
MAX
0.200
7.62
0.300
3.40 ±0.20
0.134 ±0.008
+0.10
0.25 –0.05
+0.004
0~15°
4
0.010 –0.002
3.30 ±0.30
0.130 ±0.012
0.33
MIN
0.013
0.060 ±0.004
#4
0.018 ±0.004
#8
9.60
MAX
0.378
#1
9.20 ±0.20
0.362 ±0.008
(
6.40 ±0.20
0.252 ±0.008
0.46 ±0.10
0.79
)
0.031
8-DIP
KA3843AC
Mechanical Dimensions (Continued)
Package
Dimensions in millimeters
8-SOP
5
KA3843AC
Ordering Information
Product Number
Package
KA3843AC
8-DIP
KA3843ACD
8-SOP
Operating Temperature
0 ~ +70°C
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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” 2005 Fairchild Semiconductor Corporation