STY34NB50 N - CHANNEL 500V - 0.11Ω - 34 A - Max247 PowerMESH MOSFET TYPE ST Y34NB50 ■ ■ ■ ■ ■ ■ ■ V DSS R DS(on) ID 500 V < 0.13 Ω 34 A TYPICAL RDS(on) = 0.11 Ω EXTREMELY HIGH dv/dt CAPABILITY ± 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED LOW INTRINSIC CAPACITANCE GATE CHARGE MINIMIZED REDUCED VOLTAGE SPREAD DESCRIPTION Using the latest high voltage MESH OVERLAY process, SGS-Thomson has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 1 2 3 Max247 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITCH MODE POWER SUPPLY (SMPS) ■ DC-AC CONVERTER FOR WELDING EQUIPMENT AND UNINTERRUPTABLE POWER SUPPLY AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS Symbol Value Uni t V DS Drain-source Voltage (V GS = 0) Parameter 500 V VDGR Drain- gate Voltage (R GS = 20 kΩ) 500 V V GS Gate-source Voltage ± 30 V o ID Drain Current (continuous) at T c = 25 C 34 A ID Drain Current (continuous) at T c = 100 o C 21.4 A Drain Current (pulsed) 136 A Total Dissipation at T c = 25 C 450 W Derating Factor 3.61 W/ o C Peak Diode Recovery voltage slope 4.5 V/ ns I DM (•) P t ot dv/dt (1) T stg Tj o St orage Temperature Max. Operating Junction T emperature (•) Pulse width limited by safe operating area June 1998 -65 to 150 o C 150 o C ( 1) ISD ≤34 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 STY34NB50 THERMAL DATA R t hj-ca se R t hj- amb R thc- si nk Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead Temperature For Soldering Purpose Max Max Typ o 0.277 30 0.1 300 C/W C/W o C/W o C o AVALANCHE CHARACTERISTICS Symb ol Parameter I AR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j max) E AS Single Pulse Avalanche Energy (starting Tj = 25 oC, I D = I AR , V DD = 50 V) Max Valu e Unit 34 A 1000 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symb ol V (BR)DSS I DSS I GSS Parameter Drain-source Breakdown Voltage Test Cond ition s I D = 250 µA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating o C Gate-body Leakage Current (V DS = 0) Min. Typ . Max. 500 VGS = 0 Un it V Tc = 125 V GS = ± 30 V 10 100 µA µA ± 100 nA ON (∗) Symb ol Parameter Test Cond ition s ID = 250 µA V GS(th) Gate T hreshold Voltage V DS = VGS R DS( on) Static Drain-source O n Resistance V GS = 10 V ID(o n) On State Drain Current V DS > I D(on) x R DS(on) max V GS = 10 V Min. Typ . Max. Un it 3 4 5 V 0.11 0.13 Ω ID = 17 A 34 A DYNAMIC Symb ol g fs (∗) C iss C oss C rss 2/8 Parameter Test Cond ition s Forward Transconductance V DS > I D(on) x R DS(on) max Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D = 17 A VGS = 0 Min. Typ . 18 20 7000 950 80 Max. Un it S 9100 1235 104 pF pF pF STY34NB50 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symb ol Typ . Max. Un it t d(on) tr Turn-on T ime Rise Time Parameter V DD = 250 V I D = 17 A V GS = 10 V R G = 4.7 Ω (see test circuit, figure 3) Test Cond ition s Min. 46 32 64 45 ns ns Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 400 V ID = 34 A V GS = 10 V 159 35 67 223 nC nC nC Typ . Max. Un it 56 53 120 78 74 168 ns ns ns Typ . Max. Un it 34 136 A A 1.6 V SWITCHING OFF Symb ol t r(Vof f) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over T ime Test Cond ition s Min. V DD = 400 V ID = 34 A VGS = 10 V R G = 4.7 Ω (see test circuit, figure 5) SOURCE DRAIN DIODE Symb ol Parameter Test Cond ition s I SD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward O n Voltage I SD = 34 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100 A/µs I SD = 34 A o T j = 150 C V DD = 100 V (see test circuit, figure 5) t rr Q rr I RRM Min. V GS = 0 950 ns 12 µC 25 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STY34NB50 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STY34NB50 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STY34NB50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STY34NB50 Max247 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. A 4.70 5.30 A1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 D 19.70 20.30 e 5.35 5.55 E 15.30 15.90 L 14.20 15.20 L1 3.70 4.30 MIN. TYP. MAX. P025Q 7/8 STY34NB50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical compone nts in life support devices or systems without express written approval of STMicroelectronics. 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