STB9NB50 N - CHANNEL ENHANCEMENT MODE Power MESH MOSFET TYPE ST B9NB50 ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ V DSS R DS(on) ID 500 V < 0.85 Ω 8.6 A TYPICAL RDS(on) = 0.75 Ω EXTREMELY HIGH dv/dt CAPABILITY AVALANCHE RUGGED TECHNOLOGY 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA AT 100oC VERY LOW INTRINSIC CAPACITANCE GATE CHARGE MINIMIZED LOW LEAKAGE CURRENT APPLICATION ORIENTED CHARACTERIZATION FOR SMD D2PAK VERSION CONTACT SALES OFFICE 3 12 I2PAK TO-262 (suffix ”-1”) APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITCH MODE POWER SUPPLY (SMPS) ■ DC-AC CONVERTER FOR WELDING EQUIPMENT AND UNINTERRUPTABLE POWER SUPPLY (UPS) INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DS Parameter Value Uni t Drain-source Voltage (V GS = 0) 500 V VDGR Drain- gate Voltage (R GS = 20 kΩ) 500 V V GS Gate-source Voltage ± 30 V 8.6 A Drain Current (continuous) at T c = 100 C 5.4 A Drain Current (pulsed) 34.4 A Total Dissipation at Tc = 25 C 125 W Derating Factor 1.0 W/ o C 4.5 V/ ns o ID Drain Current (continuous) at T c = 25 C ID o I DM (•) P t ot dv/dt (1) T stg Tj o Peak Diode Recovery voltage slope St orage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area March 1998 -65 to 150 o C 150 o C (1) ISD ≤ 9A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 STB9NB50 THERMAL DATA R t hj-ca se R t hj- amb R t hj- amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead Temperature For Soldering Purpose Max Max T yp o 1 62.5 0.5 300 C/W C/W o C/W o C o AVALANCHE CHARACTERISTICS Symb ol Parameter Max Valu e Unit I AR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ < 1%) 8.6 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, I D = IAR , VDD = 50 V) 520 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symb ol V (BR)DSS I DSS I GSS Parameter Drain-source Breakdown Voltage Test Cond ition s I D = 250 µA V GS = 0 Zero G ate Voltage V DS = Max Rating Drain Current (VGS = 0) V DS = Max Rating o C Gate-body Leakage Current (V DS = 0) Min. Typ . Max. 500 Un it V T c = 125 V GS = ± 30 V 1 50 µA µA ±100 nA ON (∗) Symb ol Parameter Test Cond ition s ID = 250 µA V GS(th) Gate Threshold Voltage R DS( on) Static Drain-source On V GS = 10 V Resistance ID(o n) V DS = VGS Min. Typ . Max. Un it 3 4 5 V 0.75 0.85 Ω Ω I D = 4.3 A On State Drain Current V DS > I D(on) x R DS(on) max V GS = 10 V 8.6 A DYNAMIC Symb ol g fs (∗) C iss C oss C rss 2/8 Parameter Test Cond ition s Forward Transconductance V DS > I D(on) x R DS(on) max I D = 4.3 A Input Capacitance Output Capacitance Reverse T ransfer Capacitance V DS = 25 V V GS = 0 f = 1 MHz Min. Typ . 4.5 5.7 1250 175 20 Max. Un it S 1625 236 27 pF pF pF STB9NB50 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symb ol Parameter Test Cond ition s Min. t d(on) tr Turn-on Time Rise Time V DD = 250 V I D = 4.3 A V GS = 10 V R G = 4.7 Ω (see test circuit, figure 3) Qg Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 400 V I D = 8.6 A V GS = 10 V Typ . Max. Un it 19 11 30 15 ns ns 32 10.6 13.7 45 nC nC nC Typ . Max. Un it 11.5 11 20 17 16 28 ns ns ns Typ . Max. Un it 8.6 34.4 A A 1.6 V SWITCHING OFF Symb ol t r(Vof f) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Cond ition s Min. V DD = 400 V I D = 8.6 A V GS = 10 V R G = 4.7 Ω (see test circuit, figure 5) SOURCE DRAIN DIODE Symb ol Parameter Test Cond ition s Min. I SD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 8.6 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100 A/µs I SD = 8.6 A o Tj = 150 C V R = 100 V (see test circuit, figure 5) t rr Q rr I RRM VGS = 0 420 ns 3.5 µC 16.5 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STB9NB50 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STB9NB50 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STB9NB50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STB9NB50 TO-262 (I2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. 4.3 4.6 0.169 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B1 1.2 1.38 0.047 0.054 B2 1.25 1.4 0.049 0.055 C 0.45 0.6 0.017 0.023 C2 1.21 1.36 0.047 0.053 D 8.95 9.35 0.352 0.368 e 2.44 2.64 0.096 0.104 E 10 10.28 0.393 0.404 L 13.2 13.5 0.519 0.531 L1 3.48 3.78 0.137 0.149 L2 1.27 1.4 0.050 0.055 E e B B2 C2 A1 A C A L1 L2 D L P011P5/C 7/8 STB9NB50 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1998 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A . .. 8/8