TDA7463D LOW VOLTAGE TONE CONTROL DIGITALLY CONTROLLED AUDIO PROCESSOR 1 ■ ■ ■ ■ ■ ■ ■ ■ ■ 2 FEATURES Figure 1. Package 1 STEREO INPUT 1 STEREO OUTPUT TREBLE BOOST BASS CONTROL BASS AUTOMATIC LEVEL CONTROL VOLUME CONTROL IN 1dB STEPS MUTE STAND-BY FUNCTION SOFTWARE CONTROLLED ALL FUNCTION ARE PROGRAMMABLE VIA SERIAL BUS SO16 Table 1. Order Codes Part Number Package TDA7463D SO16 TDA7463D013TR Tape & Reel the functions is accomplished by serial bus. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers. Thanks to the used BIPOLAR/CMOS Technology, DESCRIPTION The TDA7463 is a volume tone (bass and treble) processor for quality audio applications in Low voltage supply portable systems. Low Distortion, Low Noise and DC stepping are obtained.obtained. Bass ALC (Automatic Level Control) function can be adjusted by a dedicated pin. The control of all Figure 2. Block Diagram R5 5.6K C12 3.3nF TREBLE-R 100nF BASSI-R 100nF C11 C10 BASSO-R RB -63dB CONTROL C1 0.47µF 0/-10dB x1 IN-R TREBLE BASS OUT-R x5 50K VS BASS_ALC CONTROL C2 0.47µF SCL ALC HALF_WAVE RECTIFIER R4 1KΩ I2C BUS DECODER + LATCHES + SDA C3 0.47µF TREBLE 50K BASS SCL SDA 0/-10dB RB VREF VS SUPPLY VS C8 100nF TREBLE-L C4 3.3nF DGND x1 -63dB CONTROL D96AU482B VS 2 3 OUT-L x5 IN-L 1 4 R1 1MΩ June 2004 I2C VS R3 1KΩ BASSI-L C5 100nF R2 5.6K BASSO-L C6 100nF GND C9 100µF CREF C7 22µF REV. 4 1/12 TDA7463D Table 2. Absolute Maximum Ratings Symbol VS Tamb Tstg Parameter Operating Supply Voltage Operating Ambient Temperature Storage Temperature Range Value Unit 5 V 0 to 70 °C -55 to 150 °C Value Unit 85 °C/W Figure 3. Pin Connection VS 1 16 ALC IN-L 2 15 IN-R TREBLE-L 3 14 TREBLE-R BASSI-L 4 13 BASSI-R BASSO-L 5 12 BASSO-R OUT-L 6 11 OUT-R SDA 7 10 CREF SCL 8 9 GND D96AU484 Table 3. Thermal Data Symbol Rth j-pin Parameter Thermal Resistance Junction-pins Table 4. Quick Reference Data Symbol Parameter Test Condition Min. Typ. Max. Unit 2.4 3 V VS Supply voltage 1.8 VCL Max. input signal handling 0.2 THD Total Harmonic Distortion V = 0.1Vrms ; f = 1KHz S/N Signal to Noise Ratio Vout = 0.1Vrms (mode = OFF 80 dB Sc Channel Separation f = 1KHz 80 dB Volume control (1dB step) -63 0 dB -10dB damping -10 0 dB -14dB 0 14 dB Treble Control 0 8 dB Bass Control 0 14 dB 8 dB mute attenuation 2/12 Vrms 0.1 100 % TDA7463D Table 5. Electrical Characteristcs (refer to the test circuit Tamb = 25°C, VS =2.4V, R L= 10KΩ, RG = 600Ω, all controls flat, unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. 1.8 2.4 3 Unit SUPPLY VS Supply Voltage IS Supply Current 4 mA IST-BY Stand-By Current 50 µA SVR Ripple Rejection 70 dB V INPUT STAGE RIN Input Resistance VCL Clipping Level 35 THD = 0.3% 50 65 0.2 KΩ Vrms VOLUME CONTROL CRANGE Control Range 63 AV MIN Min Attenuation -1 0 1 AVMAX Max. Attenuation 62 63 64 ASTEP Step Resolution Amute Mute Attenuation 80 dB dB dB 1 dB 100 dB A-10dB -10dB damping 10 dB G14dB 14dB gain 14 dB 14 dB BASS CONTROL (1) Gb Control Range RB Internal Feedback Resistance Max. Boost/on 33.75 45 56.25 KΩ TREBLE CONTROL (1) Gt Control Range Max. Boost on 8 dB AUDIO OUTPUTS VCLIP RL VDC Clipping Level d = 0.3% Output Load Resistance 0.2 VRMS 10 KΩ DC Voltage Level 0.8 V 5 8 µV µV GENERAL NO Output Noise E Total Tracking Error E t S/N Signal to Noise Ratio SC Channel Separation Left/Right d Distortion Outout Muted All gains = 0dB; BW = 20Hz to 20KHz flat 0 All gains 0dB; VO = 0.1VRMS; 1 80 dB 80 AV = 0; VI = 0.1VRMS ; dB dB 0.1 % 0.5 V BUS INPUT VIL Input Low Voltage VIH Input High Voltage IIN Input Current VIN = 0.4V VO Output Voltage SDA Acknowledge IO = 1.6mA 1.9 -5 V 5 µA 0.4 V Note: 1. BASS and TREBLE response: The center frequency and the response quality can be chosen by the external circuitry. 3/12 TDA7463D 3 DATA BYTES Address = (HEX) 10001000 Table 6. FUNCTION SELECTION: The first byte (subaddress)58 MSB LSB SUBADDRESS D7 D6 D5 D4 D3 D2 D1 D0 X X B 0 0 0 0 STAND-BY & TREBLE & OTHERS X X B 0 0 0 1 BASS X X B 0 0 1 0 VOLUME B = 1 incremental bus; active B = 0 no incremental bus; X = indifferent 0,1 Table 7. STAND_BY & TREBLE & OTHERS MSB D7 LSB D6 D5 D4 D3 D2 D1 D0 STAND-BY 1 ALL CIRCUITS STOP TREBLE 1 STAND-BY (Treble block stops) 1 0 BOOST OFF 0 0 BOOST ON 1 0 0 High Boost (+8dB) 0 0 0 Low Boost (+4dB) MUTE 1 Input Mute ON 0 Input Mute OFF 1 Output Mute ON 0 Output Mute OFF BASS 1 Release Current Circuit ON 0 Release Current Circuit OFF INPUT Select 4/12 1 INPUT 1 0 INPUT 2 TDA7463D Table 8. BASS MSB D7 LSB D6 D5 D4 D3 D2 D1 D0 1 1 BASS STAND-BY (Bass block stops) BASS (boost OFF) 0 BASS (boost ON) 1 0 High boost (Ex. + 14dB) 0 0 Low boost (Ex. + 6dB) 1 0 ALC mode OFF (ALC block stops) ALC mode ON 0 0 Attack time resistor (12.5KΩ) Release current (0.4µA) 0 1 Attack time resistor (25KΩ) Release current (0.2µA) 1 0 Attack time resistor (50KΩ) Release current (0.1µA) 1 1 Attack time resistor (100KΩ) Release current (0.05µA) 0 0 Threshold1 (0.2Vrms) 0 1 Threshold2 (0.14Vrms) 1 0 Threshold3 (0.1Vrms) 1 1 Threshold4 (0.07Vrms) Table 9. VOLUME MSB D7 D6 1 0 1 0 D5 D4 D3 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 LSB D0 0 1 0 1 0 1 0 1 VOLUME 1 dB STEPS 0 -1 -2 -3 -4 -5 -6 -7 8 dB STEPS 0 -8 -16 -24 -32 -40 -48 -56 OUTPUT GAIN 0dB +14dB OUTPUT ATTENUATION 0dB -10dB VOLUME : 0 ~ -63dB 5/12 TDA7463D 3.1 ALC IN general: Table 10. VOLUME setting with ALC Target Volume [dB] Volume [dB] Output Gain 0/+14dB0/-10dB [dB] Output Attenuation 0/-10dB [dB] 0 -14 +14 0 -1 -15 -2 -16 -3 -17 -4 -18 -5 -19 -6 -20 -7 -21 -8 -22 -9 -23 -10 -24 -11 -25 -12 -26 -13 -27 -14 -14 0 0 -15 -15 -16 -16 -17 -17 -18 -18 -19 -19 -20 -20 -21 -21 -22 -22 -23 -23 -24 -14 0 -10 -25 -15 -26 -16 -27 -17 : : : : -70 -60 -71 -61 -72 -62 -73 -63 6/12 TDA7463D Figure 7. OUT-L, OUT-R Figure 4. PIN: IN-L, IN-R VS VS 20µA 20µA 10Ω 50K GND GND Vref D99AU1107 D99AU1106 Figure 5. PIN: TREBLE-L, TREBLE-R Figure 8. SCL, SDA VS 20µA 25K GND D99AU1109 GND D99AU1108 Figure 9. BASSO-L, BASSO-R Figure 6. PIN: BASSI-L, BASSI-R VS VS 20µA 20µA GND 45K 45K BASSO-L,BASSO-R GND D99AU1110 BASSI-L,BASSI-R D99AU1111 7/12 TDA7463D Figure 10. PIN: ALC Figure 12. BASS ALC: Threshold curve VO (Vrms) VS D99AU1115 Bass boost without ALC VS=1.8V; f=100Hz; Volume=-14dB; Output gain=+14dB Intern. release circuit=ON Bass boost with ALC 20µA Threshold: 8dB 11dB 14dB 0.1 17dB 100K Bass= +14dB boost flat GND D99AU1112 Figure 11. PIN CREF 0.01 0.01 0.1 VI(Vrms) Figure 13. BASS ALC: THD D99AU1114 THD V =1.8V; f=100Hz; S (%) Volume=-14dB; 10 Output gain=+14dB Intern. release circuit=ON Bass boost with ALC Threshold 14d 0.1 17dB 8dB B 1 1K B 20µA 11d VS Bass boost without ALC 0.01 flat GND D99AU1113 0.001 0.01 8/12 0.1 VI(Vrms) TDA7463D Figure 14. board and Components Layout of the Application & Test Circuit. 9/12 TDA7463D Figure 15. SO16 Wide Mechanical Data & Package Dimensions mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.10 0.30 0.004 0.012 B 0.33 0.51 0.013 0.200 C 0.23 0.32 0.009 0.013 D (1) 10.10 10.50 0.398 0.413 E 7.40 7.60 0.291 0.299 e 1.27 0.050 H 10.0 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.40 1.27 0.016 0.050 k ddd OUTLINE AND MECHANICAL DATA 0˚ (min.), 8˚ (max.) 0.10 0.004 (1) “D” dimension does not include mold flash, protusions or gate burrs. Mold flash, protusions or gate burrs shall not exceed 0.15mm per side. SO16 (Wide) 0016021 C 10/12 TDA7463D Table 11. Revision History Date Revision Description of Changes May 2002 3 Third issue June 2004 3 Changed the Style-sheet in compliance to the new “Corporate Technical Pubblications Design Guide” 11/12 TDA7463D Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com 12/12