TDA7314 DIGITAL CONTROLLED AUDIO PROCESSOR WITH LOUDNESS 1 STEREO INPUT SELECTABLE INPUT GAIN FOR OPTIMAL ADAPTION TO DIFFERENT SOURCES INPUT AND OUTPUT FOR EXTERNAL EQUALIZER OR NOISE REDUCTION SYSTEM LOUDNESS FUNCTION VOLUME CONTROL IN 1.25dB STEPS TREBLE AND BASS CONTROL FOUR SPEAKER ATTENUATORS: - 4 INDEPENDENT SPEAKERS CONTROL IN 1.25dB STEPS FOR BALANCE AND FADER FACILITIES - INDEPENDENT MUTE FUNCTION ALL FUNCTIONS PROGRAMMABLE VIA SERIAL BUS DESCRIPTION The TDA7314 is a volume, tone (bass and treble) balance (Left/Right) and fader (front/rear) processor for quality audio applications in car radio and Hi-Fi systems. SDIP24 ORDERING NUMBER: TDA7314 Selectable input gain and internal loudness function are provided. Control is accomplished by serial bus microprocessor interface. The AC signal setting is obtained by resistor networks andswitches combined with operationalamplifiers. Thanks to the used BIPOLAR/CMOS Tecnology, Low Distortion, Low Noise and DC stepping are obtained. PIN CONNECTION (Top view) November 1999 1/12 TDA7314 TEST CIRCUIT THERMAL DATA Symbol R th j-pins Description Thermal Resistance Junction-pins Value Unit 65 °C/W Ma x. ABSOLUTE MAXIMUM RATINGS Symbol VS Parameter Operating Supply Voltage T amb Operating Ambient Temperature Tstg Storage Temperature Range Value Unit 10.2 V -40 to 85 °C -55 to +150 °C QUICK REFERENCE DATA Symbol Min. Typ. Max. VS Supply Voltage Parameter 6 9 10 VCL Max. input signal handling 2 THD Total Harmonic Distortion V = 1Vrms f = 1KHz 0.01 S/N Signal to Noise Ratio 106 SC Channel Separation f = 1KHz 103 Volume Control 1.25dB step Bass and Treble Control 2db step Fader and Balance Control Input Gain 6.25dB step Mute Attenuation 2/12 1.25dB step Unit V Vrms 0.1 % dB dB -78.75 0 dB -14 +14 dB -38.75 0 dB 0 18.75 dB 100 dB TDA7314 BLOCK DIAGRAM 3/12 TDA7314 ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25°C, VS = 9V, RL = 10KΩ, RG = 600Ω, all controls flat (G = 0), f = 1KHz unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit SUPPLY VS Supply Voltage IS Supply Current SVR 6 Ripple Rejection 60 9 10 V 8 11 mA 80 dB INPUT STAGE R II Input Resistance V CL Clipping Level RL Output Load resistance Pin 9, 11 pin 7, 17 35 50 2 2.5 70 2 -1 KΩ Vrms KΩ GINmin Min. Input Gain GINmax Max. Input Gain 18.75 0 dB GSTEP Step Resolution 6.25 dB eIN Input Noise G = 18.75dB 2 VDC DC Steps adjacent gain steps 4 G = 18.75 to Mute 4 1 dB µV 20 mV mV VOLUME CONTROL R IV Input Resistance 20 33 50 Control Range 70 75 80 dB AVMIN Min. Attenuation -1 0 1 dB AVMAX Max. Attenuation 70 75 80 dB ASTEP Step Resolution 0.5 1.25 1.75 dB -1.25 -3 0 1.25 2 dB dB C RANGE EA Attenuation Set Error ET Tracking Error VDC DC Steps Av = 0 to -20dB Av = -20 to -60dB adjacent attenuation steps From 0dB to Av max kΩ 2 dB 0 0.5 3 7.5 mV mV SPEAKER ATTENUATORS Crange Control Range 35 37.5 40 dB SSTEP Step Resolution 0.5 1.25 1.75 dB 1.5 dB 0 1 3 10 mV mV +14 +16 dB EA AMUTE VDC Attenuation set error Output Mute Attenuation DC Steps 80 adjacent att. steps from 0 to mute 100 dB BASS CONTROL (1) Gb BSTEP RB Control Range Max. Boost/cut +12 Step Resolution 1 2 3 dB Internal Feedback Resistance 34 44 58 KΩ +13 +14 +15 dB 1 2 3 dB TREBLE CONTROL (1) Gt TSTEP 4/12 Control Range Step Resolution Max. Boost/cut TDA7314 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. 2 2.5 Max. Unit AUDIO OUTPUTS VOCL Clipping Level RL Output Load Resistance CL Output Load Capacitance d = 0.3% Vrms 2 KΩ 10 nF ROUT Output resistance 30 75 120 Ω VOUT DC Voltage Level 4.2 4.5 4.8 V 2.5 5 15 µV µV GENERAL e NO Output Noise BW = 20-20KHz, flat output muted all gains = 0dB 3 µV Signal to Noise Ratio all gains = 0dB; VO = 1Vrms 106 dB Distortion AV = 0, VIN = 1Vrms AV = -20dB VIN = 1Vrms V IN = 0.3Vrms 0.01 0.09 0.04 A curve all gains = 0dB S/N d Sc Channel Separation left/right Total Tracking error 80 AV = 0 to -20dB -20 to -60 dB 0.1 0.3 % % % 1 2 dB dB 1 V 103 0 0 dB BUS INPUTS V IL Input Low Voltage VIH Input High Voltage 3 IIN Input Current -5 VO Output Voltage SDA Acknowledge IO = 1.6mA V +5 µA 0.4 V Note: (1) Bass and Treble response see attached diagram (fig.19). The center frequency and quality of the resonance behaviour can be choosen by the external circuitry. A standard first order bass response can be realized by a standard feedback network. Figure 1: Loudness versus Volume Attenuation Figure 2: Loudnessversus Frequency (CLOUD = 100nF) 5/12 TDA7314 Figure 3: Loudness versus External Capacitors LOUDNESS VS = 9V Volume = -40dB All other control flat C in = 2.2µF C loud = 220nF, 100nF, 33nF, 10nF, Open, Shorter to Vref Figure 4: Noise vs. Volume/Gain Settings Figure 6: Distortion & Noise vs. Frequency Figure 5: Signal to Noise Ratio vs. Volume Setting Figure 7: Distortion & Noise vs. Frequency 6/12 Figure 8: Distortion vs. Load Resistance TDA7314 Figure 9: Channel Separation (L → R) vs. Frequency Figure 10: Supply Voltage Rejection vs. Frequency Figure 11: Output Clipping Level vs. Supply Voltage Figure 12: Quiescent Current vs. Supply Voltage Figure 13: Supply Current vs. Temperature Figure 14: Bass Resistance vs. Temperature 7/12 TDA7314 Figure 15: Typical Tone Response (with the ext. components indicated in the test circuit) SOFTWARE SPECIFICATION Interface Protocol The interface protocol comprises: A start condition (S) A chip address byte, containing the TDA7314 address (the 8th bit of the byte must be 0). The TDA7314 must always acknowledge at the end of each transmitted byte. A sequence of data (N-bytes + acknowledge) A stop condition (P) TDA7314 ADDRESS S MSB first byte 1 0 0 0 LSB 1 0 0 MSB LSB DATA 0 ACK MSB LSB DATA ACK ACK P Data Transferred (N-bytes + Acknowledge) ACK = Acknowledge S = Start P = Stop MAX CLOCK SPEED 100kbits/s SOFTWARE SPECIFICATION Chip address 1 MSB 0 0 0 1 0 0 0 LSB DATA BYTES MSB 0 1 1 1 1 0 0 0 LSB 0 1 1 0 0 1 1 1 B2 0 1 0 1 0 1 1 B1 B1 B1 B1 B1 G1 0 1 B0 B0 B0 B0 B0 G0 C3 C3 A2 A2 A2 A2 A2 S2 C2 C2 Ax = 1.25dB steps; Bx = 10dB steps; Cx = 2dB steps; Gx = 6.25dB steps 8/12 A1 A1 A1 A1 A1 S1 C1 C1 A0 A0 A0 A0 A0 S0 C0 C0 FUNCTION Volume control Speaker ATT LR Speaker ATT RR Speaker ATT LF Speaker ATT RF Audio switch Bass control Treble control TDA7314 SOFTWARE SPECIFICATION (continued) DATA BYTES (detailed description) Volume MSB 0 0 LSB 0 0 B2 B1 B0 B2 B1 B0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 A2 A1 A0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 A2 A1 A0 FUNCTION Volume 1.25dB steps 0 -1.25 -2.5 -3.75 -5 -6.25 -7.5 -8.75 Volume 10dB steps 0 -10 -20 -30 -40 -50 -60 -70 For example a volume of -45dB is given by: 0 0 1 0 0 1 0 0 Speaker Attenuators MSB 1 1 1 1 LSB 0 0 1 1 0 1 0 1 B1 B1 B1 B1 B0 B0 B0 B0 0 0 1 1 0 1 0 1 1 1 A2 A2 A2 A2 A1 A1 A1 A1 A0 A0 A0 A0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 FUNCTION Speaker LF Speaker RF Speaker LR Speaker RR 0 -1.25 -2.5 -3.75 -5 -6.25 -7.5 -8.75 0 -10 -20 -30 1 1 1 Mute For example attenuation of 25dB on speaker RF is given by: 1 0 1 1 0 1 0 0 9/12 TDA7314 Audio Switch MSB 0 LSB 1 0 G1 G0 S2 S1 S0 0 0 1 1 0 1 0 1 0 1 Stereo 1 Stereo 2 (MUTE) (*) Stereo 3 (MUTE) (*) Stereo 4 (MUTE) (*) LOUDNESS ON LOUDNESS OFF +18.75dB +12.5dB +6.25dB 0dB 0 1 0 1 0 0 1 1 FUNCTION Audio Switch For example to select the stereo 1 input with a gain of +12.5dB, loudness on, the 8 bit string is: 0 1 0 0 1 0 0 0 (*) Stereo 2, 3, 4 are connected internally but not available on pins. Bass and Treble 0 0 1 1 1 1 0 1 C3 C3 C2 C2 0 0 0 0 1 1 1 1 C1 C1 0 0 1 1 0 0 1 1 C0 C0 0 1 0 1 0 1 0 1 Bass Treble -14 -12 -10 -8 -6 -4 -2 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 0 2 4 6 8 10 12 14 C3 = Sign For example Bass at -10dB is obtained by the following 8 bit string: 0 1 1 0 0 0 1 0 10/12 TDA7314 mm DIM. MIN. TYP. A inch MAX. MIN. TYP. 5.08 0.20 A1 0.51 A2 3.05 3.30 4.57 0.120 B 0.36 0.46 0.56 0.0142 0.0181 0.0220 B1 0.76 1.02 1.14 0.030 0.040 c 0.23 0.25 0.38 0.009 0.0098 0.0150 D 22.61 22.86 23.11 0.890 E 7.62 8.64 0.30 E1 6.10 6.86 0.240 0.020 6.40 0.130 0.90 0.180 0.045 0.910 0.340 0.252 e 1.778 0.070 e1 7.62 0.30 0.270 e2 10.92 0.430 e3 1.52 0.060 2.54 3.30 3.81 0.10 0.130 SDIP24 (0.300”) 0.150 E A2 A L A1 E1 Stand-off B B1 e e1 e2 c E D 24 13 .015 F L OUTLINE AND MECHANICAL DATA MAX. 0,38 Gage Plane 1 12 e3 SDIP24 e2 11/12 TDA7314 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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