STMICROELECTRONICS WS57C128FB

WS57C128FB
HIGH SPEED 16K x 8 CMOS EPROM
KEY FEATURES
• Very Fast Access Time
• Standard EPROM Pinout
• DIP and Surface Mount Packaging
— 35 ns
• Low Power Consumption
• EPI Processing
Available
— Latch-up Immunity Up to 200 mA
GENERAL DESCRIPTION
The WS57C128FB is a High Performance 128K UV Erasable Electrically Programmable Read Only Memory. It is
manufactured with an advanced CMOS technology which enables it to operate at Bipolar speeds while consuming
only 90 mA.
Two major features of the WS57C128FB are its Low Power and High Speed. These features make it an ideal
solution for applications which require fast access times, low power, and non-volatility. Typical applications include
systems which do not utilize mass storage devices and/or are board space limited.
The WS57C128FB is configured in the standard EPROM pinout which provides an easy upgrade path for systems
which are currently using standard EPROMs. The EPROMs are available in both 600 Mil DIP packages, and both
J-leaded and leadless surface mount packages.
MODE SELECTION
PINS
PGM
CE
OE
VPP
TOP VIEW
VCC OUTPUTS
Chip Carrier
Read
X
VIL
VIL
VCC
VCC
DOUT
Output
Disable
X
X
VIH
VCC
VCC
High Z
CERDIP
A7
A12
VPP
NC
VCC
PGM
A13
MODE
PIN CONFIGURATION
Standby
X
VIH
X
VCC
VCC
High Z
Program
VIL
VIL
VIH
VPP
VCC
DIN
Program
Verify
VIH
VIL
VIL
VPP
VCC
DOUT
Program
Inhibit
X
VIH
X
VPP
VCC
High Z
X can be VIL or VIH.
A6
A5
A4
A3
A2
A1
A0
NC
O0
32 31 30
1
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
O1 O2
GND
4 3 2
A8
A9
A11
NC
OE
A10
CE
O7
O6
NC O3 O4 O5
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
PGM
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
PRODUCT SELECTION GUIDE
PARAMETER
WS57C128FB-35
WS57C128FB-45
WS57C128FB-55
WS57C128FB-70
Address Access Time (Max)
35 ns
45 ns
55 ns
70 ns
Chip Select Time (Max)
35 ns
45 ns
55 ns
70 ns
Output Enable Time (Max)
20 ns
25 ns
25 ns
25 ns
Return to Main Menu
3-7
WS57C128FB
ABSOLUTE MAXIMUM RATINGS*
*NOTICE:
Storage Temperature............................–65° to + 150°C
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of
time may affect device reliability.
Voltage on any Pin with
Respect to Ground ....................................–0.6V to +7V
VPP with Respect to Ground...................–0.6V to + 13V
ESD Protection ..................................................> 2000V
OPERATING RANGE
RANGE
TEMPERATURE
VCC
0°C to +70°C
+5V ± 10%
Industrial
–40°C to +85°C
+5V ± 10%
Military
–55°C to +125°C
+5V ± 10%
Commercial
DC READ CHARACTERISTICS Over Operating Range with VPP = VCC
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
MAX
UNITS
VIL
Input Low Voltage
(Note 5)
– 0.1
0.8
V
VIH
Input High Voltage
(Note 5)
2.0
VCC + 0.3
V
VOL
Output Low Voltage
IOL = 16 mA
0.4
V
VOH
Output High Voltage
IOH = – 4 mA
ISB1
VCC Standby Current (CMOS)
(Notes 1 and 3)
500
µA
ISB2
VCC Standby Current (TTL)
(Notes 2 and 3)
15
mA
VCC Active Current (CMOS)
(Notes 1 and 4)
Outputs Not Loaded
Comm'l
Industrial
Military
30
40
40
mA
mA
mA
ICC2
VCC Active Current (TTL)
(Notes 2 and 4)
Outputs Not Loaded
Comm'l
Industrial
Military
50
60
60
mA
mA
mA
IPP
VPP Supply Current
VPP = VCC
100
µA
VPP
VPP Read Voltage
VCC – 0.4
VCC
V
ILI
Input Leakage Current
VIN = 5.5V or Gnd
–10
10
µA
ILO
Output Leakage Current
VOUT = 5.5 V or Gnd
–10
10
µA
ICC1
NOTES:
1. CMOS inputs: GND ± 0.3V or VCC ± 0.3V.
2. TTL inputs: VIL ≤ 0.8V, VIH ≥ 2.0V.
3. Add 1 mA/MHz for A.C. power component.
2.4
V
4. Add 4 mA/MHz for A.C. power component.
5. These are absolute voltages with respect to device ground pin and
include all overshoots due to system and/or tester noise.
Do not attempt to test these values without suitable equipment.
AC READ CHARACTERISTICS Over Operating Range with VPP = VCC
PARAMETER
SYMBOL
57C128FB-35 57C128FB-45 57C128FB-55
MIN
MAX
MIN
MAX
MIN
MAX
57C128FB-70
MIN
Address to Output Delay
tACC
35
45
55
70
CE to Output Delay
tCE
35
45
55
70
OE to Output Delay
tOE
20
25
25
25
Output Disable to
Output Float
tDF
20
25
25
25
Address to Output Hold
tOH
3-8
0
0
0
0
UNITS
MAX
ns
WS57C128FB
AC READ TIMING DIAGRAM
VALID
ADDRESSES
tACC
tOH
CE
tCE
tDF
OE
tOE
OUTPUTS
VALID
tDF
CAPACITANCE (6) TA = 25°C, f = 1 MHz
SYMBOL
PARAMETER
CONDITIONS
TYP (7)
MAX
UNITS
VIN = 0V
4
6
pF
C IN
Input Capacitance
C OUT
Output Capacitance
VOUT = 0V
8
12
pF
C VPP
VPP Capacitance
VPP = 0 V
18
25
pF
NOTES: 6. This parameter is only sampled and is not 100% tested.
7. Typical values are for TA = 25°C and nominal supply voltages.
TEST LOAD (High Impedance Test Systems)
A.C. TESTING INPUT/OUTPUT WAVEFORM
97.5 Ω
2.01 V
D.U.T.
3.0
30 pF
(INCLUDING SCOPE
AND JIG
CAPACITANCE)
0.0
2.0
0.8
2.0
TEST
POINTS
0.8
A.C. testing inputs are driven at 3.0 V for a logic "1" and 0.0 V
for a logic "0." Timing measurements are made at 2.0 V for a
logic "1" and 0.8 V for a logic "0".
NOTE: 8. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters.
A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between VCC and ground is recommended.
Inadequate decoupling may result in access time degradation or other transient performance failures.
3-9
WS57C128FB
PROGRAMMING INFORMATION
DC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
SYMBOLS
PARAMETER
Input Leakage Current
(VIN = VCC or Gnd)
VPP Supply Current During
Programming Pulse (CE = PGM = VIL)
VCC Supply Current
Output Low Voltage During Verify
(IOL = 16 mA)
Output High Voltage During Verify
(IOH = –4 mA)
ILI
IPP
ICC
VOL
VOH
NOTE:
MIN
MAX
UNITS
–10
10
µA
60
mA
30
mA
0.4
V
2.4
V
9. VCC must be applied either coincidentally or before VPP and removed either coincidentally or after VPP.
10. VPP must not be greater than 13 volts including overshoot. During CE = PGM = VIL, VPP must not be switched from 5 volts to
12.5 volts or vice-versa.
11. During power up the PGM pin must be brought high (≥ VIH) either coincident with or before power is applied to VPP.
AC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
SYMBOLS
PARAMETER
MIN
TYP
MAX
t AS
Address Setup Time
2
µs
t CES
Chip Enable Setup Time
2
µs
t OES
Output Enable Setup Time
2
µs
t OS
Data Setup Time
2
µs
t AH
Address Hold Time
0
µs
t OH
Data Hold Time
2
µs
t DF
Chip Disable to Output Float Delay
0
t OE
Data Valid From Output Enable
t VS
VPP Setup Time
t PW
PGM Pulse Width
ADDRESS STABLE
tAH
HIGH Z
DATA IN STABLE
tOS
tOH
tVS
VIH
CE
VIL
tCES
VIH
VIL
tPW
VIH
OE
VIL
DATA OUT
VALID
tOE
VPP
VCC
PGM
130
ns
200
tAS
VPP
ns
µs
100
ADDRESSES
DATA
130
2
PROGRAMMING WAVEFORM
3-10
UNITS
tOES
tDF
µs
WS57C128FB
ORDERING INFORMATION
PART NUMBER
WS57C128FB-35D
WS57C128FB-45D
WS57C128FB-45DMB
WS57C128FB-45J
WS57C128FB-45L
WS57C128FB-55CMB
WS57C128FB-55D
WS57C128FB-55DMB
WS57C128FB-70D
WS57C128FB-70DM
WS57C128FB-70DMB
NOTE:
SPEED
(ns)
PACKAGE
TYPE
35
45
45
45
45
55
55
55
70
70
70
28 Pin CERDIP, 0.6"
28 Pin CERDIP, 0.6"
28 Pin CERDIP, 0.6"
32 Pin PLDCC
32 Pin CLDCC
32 Pad CLLCC
28 Pin CERDIP, 0.6"
28 Pin CERDIP, 0.6"
28 Pin CERDIP, 0.6"
28 Pin CERDIP, 0.6"
28 Pin CERDIP, 0.6"
OPERATING
PACKAGE TEMPERATURE
DRAWING
RANGE
D2
D2
D2
J4
L3
C2
D2
D2
D2
D2
D2
WSI
MANUFACTURING
PROCEDURE
Comm'l
Comm'l
Military
Comm'l
Comm'l
Military
Comm'l
Military
Comm'l
Military
Military
Standard
Standard
MIL-STD-883C
Standard
Standard
MIL-STD-883C
Standard
MIL-STD-883C
Standard
Standard
MIL-STD-883C
12. The actual part marking will not include the initials "WS."
PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS
REFER TO
PAGE 5-1
The WS57C128FB is programmed using Algorithm D shown on page 5-9.
Return to Main Menu
3-11