CENTRAL CTLSH1

CTLSH1-40M621H
SURFACE MOUNT
HIGH CURRENT, LOW VF
SILICON SCHOTTKY RECTIFIER
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CTLSH1-40M621H
is a very low profile (0.4mm), low VF Schottky rectifier
in a small, thermally efficient, 1.5mm x 2mm Tiny
Leadless Module (TLM) package.
MARKING CODE: CNE
TLM621H CASE
• Device is Halogen Free by design
APPLICATIONS:
FEATURES:
• DC/DC Converters
• Reverse Battery Protection
• Battery powered devices including Cell Phones,
PDAs, Digital Cameras, MP3 Players, etc.
• High Current (IF=1.0A)
• Low Forward Voltage Drop (VF=0.55V MAX @ 1.0A)
• High Thermal Efficiency
MAXIMUM RATINGS: (TA=25°C)
SYMBOL
VRRM
IF
IFRM
IFSM
PD
TJ, Tstg
ΘJA
Peak Repetitive Reverse Voltage
Continuous Forward Current
Peak Repetitive Forward Current, tp<1.0ms
Peak Forward Surge Current, tp=8.0ms
Power Dissipation (Note 1)
Operating and Storage Junction Temperature
Thermal Resistance (Note 1)
UNITS
V
A
A
A
W
°C
°C/W
40
1.0
3.5
6.0
1.6
-65 to +150
75
ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
IR
VR=5.0V
10
μA
IR
VR=8.0V
20
μA
IR
VR=15V
50
μA
IR
VR=40V
0.2
mA
IR
VR=40V, TA=100°C
IR=100μA
20
mA
BVR
VF
IF=10mA
0.30
V
VF
IF=100mA
0.40
V
VF
IF=500mA
0.50
V
VF
IF=1.0A
0.60
V
CJ
VR=4.0V, f=1.0MHz
50
pF
trr
IF=IR=500mA, Irr=50mA, RL=50Ω
15
ns
40
Notes: (1) Mounted on a 4-layer JEDEC test board with one thermal vias connecting the
exposed thermal pad to the first buried plane. PCB was constructed as per
JEDEC standards JESD51-5 and JESD51-7.
V
R4 (19-February 2010)
CTLSH1-40M621H
SURFACE MOUNT
HIGH CURRENT, LOW VF
SILICON SCHOTTKY RECTIFIER
TLM621H CASE - MECHANICAL OUTLINE
OPTIONAL MOUNTING PADS
(Dimensions in mm)
*Exposed pad P internally connected to pins 2, 3, 4, and 5.
For standard mounting refer
to TLM621H Package Details
PIN CONFIGURATION
LEAD CODE:
1) Anode
2) Cathode
3) Cathode
4) Cathode
5) Cathode
6) Anode
MARKING CODE: CNE
R4 (19-February 2010)
w w w. c e n t r a l s e m i . c o m