MITSUBISHI PM50CLB120

MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLB120
FLAT-BASE TYPE
INSULATED PACKAGE
PM50CLB120
FEATURE
a) Adopting new 5th generation IGBT (CSTBT) chip, which
performance is improved by 1µm fine rule process.
For example, typical Vce(sat)=1.9V @Tj=125°C
b) I adopt the over-temperature conservation by Tj detection of
CSTBT chip, and error output is possible from all each conservation upper and lower arm of IPM.
c) New small package
Reduce the package size by 32%, thickness by 22% from
S-DASH series.
• 3φ 50A, 1200V Current-sense IGBT type inverter
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for, shortcircuit, over-temperature & under-voltage (P-Fo available
from upper arm devices)
• Acoustic noise-less 5.5kW/7.5kW class inverter application
APPLICATION
General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES
Dimensions in mm
120
7
106
19.75
66.5
16
3.25
2.5
16
16
2
2
2
25.75
5
17.5
9
13
19
2 -φ
71.5
4 4
7.5
5
2.5
P
B
U
4 4
2.5
19.5
V
4 4
W
4 4
23
23
4 4
23
22
7.75
5.5
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
VUPC
UFO
UP
VUP1
VVPC
VFO
VP
VVP1
VWPC
WFO
11.
12.
13.
14.
15.
16.
17.
18.
19.
WP
VWP1
VNC
VN1
NC
UN
VN
WN
Fo
98.25
1.5
2-φ2.5
1
0.5
16
27.5
8.5
10.5
2
1
17
25
1
Terminal code
50.75
N
17.5
4 4
2
55
4-φ
Oct. 2003
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLB120
FLAT-BASE TYPE
INSULATED PACKAGE
INTERNAL FUNCTIONS BLOCK DIAGRAM
NC Fo
VNC WN
Gnd In
Gnd
VN1
VN
Fo Vcc
Gnd In
Si Out
OT
NC
Gnd
WP
VWP1
VWPC WFO
UN
Fo Vcc
Si Out
OT
Gnd In
Gnd
Fo Vcc
Si Out
OT
N
Gnd In
Gnd
Fo Vcc
Si Out
OT
VP
VVPC
Gnd In
Gnd
W
V
VVP1
VFO
Fo Vcc
Si Out
OT
UP
VUP1
UFO
Gnd In
Fo Vcc
VUPC
Gnd
Si Out
U
OT
P
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol
VCES
±IC
±ICP
PC
Tj
Parameter
Collector-Emitter Voltage
Collector Current
Collector Current (Peak)
Collector Dissipation
Junction Temperature
Condition
VD = 15V, VCIN = 15V
TC = 25°C
TC = 25°C
TC = 25°C
(Note-2)
Ratings
1200
50
100
369
–20 ~ +150
Unit
V
A
A
W
°C
Ratings
Unit
20
V
20
V
20
V
20
mA
CONTROL PART
Symbol
Parameter
VD
Supply Voltage
VCIN
Input Voltage
VFO
Fault Output Supply Voltage
IFO
Fault Output Current
Condition
Applied between : VUP1-VUPC
VVP1-VVPC, VWP1-VWPC, VN1-VNC
Applied between : UP-VUPC, VP-VVPC
WP-VWPC, UN • VN • WN-VNC
Applied between : UFO-VUPC, VFO-VVPC, WFO-VWPC
FO-VNC
Sink current at UFO, VFO, WFO, FO terminals
Oct. 2003
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLB120
FLAT-BASE TYPE
INSULATED PACKAGE
TOTAL SYSTEM
Symbol
Parameter
Supply Voltage Protected by
VCC(PROT)
SC
VCC(surge) Supply Voltage (Surge)
Module Case Operating
TC
Temperature
Storage Temperature
Tstg
Viso
Isolation Voltage
Ratings
Condition
VD = 13.5 ~ 16.5V, Inverter Part,
Tj = +125°C Start
Unit
800
V
1000
V
(Note-2)
–20 ~ +100
°C
60Hz, Sinusoidal, Charged part to Base, AC 1 min.
–40 ~ +125
2500
°C
Vrms
Applied between : P-N, Surge value
THERMAL RESISTANCES
Symbol
Condition
Parameter
Rth(j-c)Q
Rth(j-c)F
Rth(j-c)Q
Rth(j-c)F
Junction to case Thermal
Resistances
Rth(c-f)
Contact Thermal Resistance
Inverter IGBT (per 1 element)
Inverter FWDi (per 1 element)
Inverter IGBT (per 1 element)
Inverter FWDi (per 1 element)
Case to fin, (per 1 module)
Thermal grease applied
(Note-1)
(Note-1)
(Note-2)
(Note-2)
Min.
—
—
—
—
Limits
Typ.
—
—
—
—
Max.
0.26
0.39
0.34
0.51
—
—
0.038
Limits
Typ.
1.8
1.9
2.5
1.0
0.5
0.4
2.0
0.7
—
—
Max.
2.3
2.4
3.5
2.5
0.8
1.0
3.0
1.2
1
10
Unit
°C/W
(Note-1) TC measurement point is just under the chips (Bottom view).
If you use this value, Rth(f-a) should be measured just under the chips.
(Note-2) TC measurement point is as shown below (Top view).
Table1 : TC measurement point of just under the chips.
WP
IGBT FWDi
87.0
86.9
–7.7
1.5
(Unit : mm)
UN
IGBT FWDi
39.3
39.2
5.7
–3.5
W
VN
IGBT FWDi
54.0
54.1
5.7
–3.5
WN
IGBT FWDi
76.0
76.1
5.7
–3.5
P
Top view
N
Bottom view
V
X
Y
VP
IGBT FWDi
65.0
64.9
–7.7
1.5
U
axis
UP
IGBT FWDi
28.3
28.4
–7.7
1.5
B
arm
TC (Base plate)
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol
VCE(sat)
VEC
ton
trr
tc(on)
toff
tc(off)
ICES
Parameter
Condition
Collector-Emitter
Saturation Voltage
FWDi Forward Voltage
VD = 15V, IC = 50A
VCIN = 0V, Pulsed
(Fig. 1)
–IC = 50A, VD = 15V, VCIN = 15V
Switching Time
VD = 15V, VCIN = 0V↔15V
VCC = 600V, IC = 50A
Tj = 125°C
Inductive Load
Collector-Emitter
Cutoff Current
VCE = VCES, VCIN = 15V
Tj = 25°C
Tj = 125°C
(Fig. 2)
(Fig. 3,4)
(Fig. 5)
Tj = 25°C
Tj = 125°C
Min.
—
—
—
0.5
—
—
—
—
—
—
Unit
V
V
µs
mA
Oct. 2003
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLB120
FLAT-BASE TYPE
INSULATED PACKAGE
CONTROL PART
Symbol
Parameter
Condition
VN1-VNC
VXP1-VXPC
ID
Circuit Current
VD = 15V, VCIN = 15V
Vth(ON)
Vth(OFF)
SC
Input ON Threshold Voltage
Input OFF Threshold Voltage
Short Circuit Trip Level
Short Circuit Current Delay
Time
Applied between : UP-VUPC, VP-VVPC, WP-VWPC
UN • VN • WN-VNC
(Fig. 3,6)
–20 ≤ Tj ≤ 125°C, VD = 15V
Over Temperature Protection
Detect Tj of IGBT chip
Supply Circuit Under-Voltage
Protection
–20 ≤ Tj ≤ 125°C
Fault Output Current
VD = 15V, VCIN = 15V
(Note-3)
Minimum Fault Output Pulse
Width
VD = 15V
(Note-3)
toff(SC)
OT
OTr
UV
UVr
IFO(H)
IFO(L)
tFO
VD = 15V
(Fig. 3,6)
Trip level
Reset level
Trip level
Reset level
Min.
—
—
1.2
1.7
100
Limits
Typ.
15
5
1.5
2.0
—
Max.
25
10
1.8
2.3
—
Unit
mA
V
A
—
0.2
—
µs
135
—
11.5
—
—
—
145
125
12.0
12.5
—
10
155
—
12.5
—
0.01
15
°C
1.0
1.8
—
V
mA
ms
(Note-3) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to
protect it.
MECHANICAL RATINGS AND CHARACTERISTICS
Symbol
—
—
Condition
Parameter
Mounting torque
Weight
Mounting part
screw : M5
—
Min.
2.5
—
Limits
Typ.
3.0
340
Max.
3.5
—
Unit
N•m
g
RECOMMENDED CONDITIONS FOR USE
Symbol
VCC
Parameter
Supply Voltage
VD
Control Supply Voltage
VCIN(ON)
VCIN(OFF)
fPWM
Input ON Voltage
Input OFF Voltage
PWM Input Frequency
Arm Shoot-through
Blocking Time
tdead
Condition
Applied across P-N terminals
Applied between : VUP1-VUPC, VVP1-VVPC
VWP1-VWPC, VN1-VNC
(Note-4)
Applied between : UP-VUPC, VP-VVPC, WP-VWPC
UN • VN • WN-VNC
Using Application Circuit of Fig. 8
For IPM’s each input signals
Recommended value
≤ 800
Unit
V
15.0 ± 1.5
V
(Fig. 7)
≤ 0.8
≥ 9.0
≤ 20
kHz
≥ 2.5
µs
V
(Note-4) With ripple satisfying the following conditions dv/dt swing ≤ ±5V/µs, Variation ≤ 2V peak to peak
Oct. 2003
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLB120
FLAT-BASE TYPE
INSULATED PACKAGE
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corresponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
P, (U,V,W)
IN
Fo
VCIN
P, (U,V,W)
Ic
V
IN
Fo
VCIN
–Ic
V
(15V)
(0V)
U,V,W, (N)
VD (all)
U,V,W, (N)
VD (all)
Fig. 1 VCE(sat) Test
Fig. 2 VEC Test
a) Lower Arm Switching
P
VCIN
(15V)
Fo
Signal input
(Upper Arm)
trr
CS
Ic
Vcc
Fo
Signal input
(Lower Arm)
VCIN
VCE
Irr
U,V,W
90%
90%
N
VD (all)
b) Upper Arm Switching
Ic
10%
10%
10%
10%
P
tc (on)
Fo
Signal input
(Upper Arm)
VCIN
VCIN
U,V,W
CS
VCIN
(15V)
tc (off)
Vcc
td (on)
tr
tf
td (off)
Fo
Signal input
(Lower Arm)
(ton= td (on) + tr)
(toff= td (off) + tf)
N
Ic
VD (all)
Fig. 3 Switching time and SC test circuit
Fig. 4 Switching time test waveform
VCIN
Short Circuit Current
P, (U,V,W)
A
VCIN
(15V)
Constant Current
IN
Fo
SC
Pulse VCE
Ic
VD (all)
U,V,W, (N)
Fo
toff(SC)
Fig. 5 ICES Test
Fig. 6 SC test waveform
IPM’ input signal VCIN
(Upper Arm)
1.5V
0V
IPM’ input signal VCIN
(Lower Arm)
0V
2V
tdead
2V
1.5V
1.5V
tdead
2V
t
t
tdead
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
Fig. 7 Dead time measurement point example
Oct. 2003
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLB120
FLAT-BASE TYPE
INSULATED PACKAGE
P
20kΩ ≥10µ
VUP1
→
VD
Fo
IF
Rfo
Vcc
Fo
UP
OT
OUT
In
VUPC
+
–
Si
U
GND GND
≥0.1µ
VVP1
Fo
VD
Rfo
Fo
VP
Rfo
Vcc
Fo
WP
Vcc
≥10µ
Fo
UN
OT
OUT
Si
W
OT
OUT
Si
In
GND GND
≥0.1µ
N
OT
20kΩ
→
M
GND GND
20kΩ
IF
V
In
VWPC
→
Si
GND GND
VWP1
VD
OT
OUT
In
VVPC
Fo
Vcc
Vcc
≥10µ
IF
Fo
VN
OUT
Si
In
GND GND
≥0.1µ
20kΩ
→
VD
VN1
Vcc
≥10µ
IF
Fo
WN
≥0.1µ
In
OT
OUT
Si
GND GND
VNC
NC
NC
5V
1kΩ
Fo
Rfo
: Interface which is the same as the U-phase
Fig. 8 Application Example Circuit
NOTES FOR STABLE AND SAFE OPERATION ;
Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the
stray capacity between the input and output wirings of opto-coupler.
Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler.
Fast switching opto-couplers: tPLH, tPHL ≤ 0.8µs, Use High CMR type.
Slow switching opto-coupler: CTR > 100%
Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the
power supply.
Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N
terminal.
Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line
and improve noise immunity of the system.
•
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•
•
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•
Oct. 2003