MICROCHIP MCP6421

MCP6421
4.4 µA, 90 kHz Op Amp
Features:
Description:
• Low Quiescent Current:
- 4.4 µA/amplifier (typical)
• Low Input Offset Voltage:
- ±1.0 mV (maximum)
• Enhanced EMI Protection:
- Electromagnetic Interference Rejection Ratio
(EMIRR) at 1.8 GHz: 97 dB
• Supply Voltage Range: 1.8V to 5.5V
• Gain Bandwidth Product: 90 kHz (typical)
• Rail-to-Rail Input/Output
• Slew Rate: 0.05 V/µs (typical)
• Unity Gain Stable
• No Phase Reversal
• Small Packages:
- Singles in SC70-5, SOT-23-5
• Extended Temperature Range:
- -40°C to +125°C
The Microchip Technology Inc. MCP6421 family of
operational amplifiers operate with a single supply
voltage as low as 1.8V, while drawing low quiescent
current per amplifier (5.5 µA, maximum). This family
also has low input offset voltage (±1.0 mV, maximum)
and rail-to-rail input and output operation. In addition,
the MCP6421 family is unity gain stable and has a gain
bandwidth product of 90 kHz (typical). This
combination of features supports battery-powered and
portable applications. The MCP6421 family has
enhanced EMI protection to minimize any
electromagnetic interference from external sources,
such as power lines, radio stations, and mobile
communications, etc. This feature makes it well suited
for EMI sensitive applications.
Applications:
•
•
•
•
•
•
The MCP6421 family is offered in single (MCP6421)
packages. All devices are designed using an advanced
CMOS process and fully specified in extended
temperature range from -40°C to +125°C.
Package Types
MCP6421
SC70-5, SOT-23-5
Portable Medical Instrument
Safety Monitoring
Battery Powered System
Remote Sensing
Supply Current Sensing
Analog Active Filter
VOUT 1
5 VDD
VSS 2
VIN+ 3
4 VIN–
Design Aids:
•
•
•
•
•
SPICE Macro Models
FilterLab® Software
Microchip Advanced Part Selector (MAPS)
Analog Demonstration and Evaluation Boards
Application Notes
Typical Application
VDD
R+R
R-R
VDD
-
R1
1k
+
Va
Vb
VDD
-
R-R R+R
+
R3
MCP6421 100k
VDD
-
+
R2
1k
MCP6421
VOUT
MCP6421
R5
100k
10k 
V OUT =  V a – Vb   ------------100 
Strain Gauge
 2013 Microchip Technology Inc.
DS25165A-page 1
MCP6421
NOTES:
DS25165A-page 2
 2013 Microchip Technology Inc.
MCP6421
1.0
ELECTRICAL CHARACTERISTICS
1.1
Absolute Maximum Ratings †
VDD – VSS ......................................................................................................................................................................................... 6.5V
Current at Analog Input Pins (VIN+, VIN-) ....................................................................................................................................... ±2 mA
Analog Inputs (VIN+, VIN-)†† ............................................................................................................................VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ...........................................................................................................................VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ........................................................................................................................................................|VDD – VSS|
Output Short-Circuit Current ................................................................................................................................................. Continuous
Current at Input Pins ...................................................................................................................................................................... ±2 mA
Current at Output and Supply Pins ............................................................................................................................................. ±30 mA
Storage Temperature ..................................................................................................................................................... -65°C to +150°C
Maximum Junction Temperature (TJ) ........................................................................................................................................... +150°C
ESD Protection on All Pins (HBM; MM)   4 kV; 400V
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
†† See Section 4.1.2 “Input Voltage Limits”.
1.2
Specifications
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2,
VOUT = VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 30 pF (refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
VOS
-1.0
—
1.0
mV
VDD = 3.0V; VCM = VDD/
4
VOS/TA
—
±3.0
—
PSRR
75
90
—
dB
IB
—
±1
50
pA
—
20
—
pA
TA = +85°C
TA = +125°C
Input Offset
Input Offset Voltage
Input Offset Drift with Temperature
Power Supply Rejection Ratio
µV/°C TA= -40°C to +125°C,
VCM = VSS
VCM = VSS
Input Bias Current and Impedance
Input Bias Current
—
800
—
pA
Input Offset Current
IOS
—
±1
—
pA
Common Mode Input Impedance
ZCM
—
1013||12
—
||pF
ZDIFF
—
1013||12
—
|pF
Common Mode Input Voltage Range
VCMR
VSS - 0.3
—
VDD + 0.3
V
Common Mode Rejection Ratio
CMRR
75
90
—
dB
VDD = 5.5V
VCM = -0.3V to 5.8V
70
85
—
dB
VDD = 1.8V
VCM = -0.3V to 2.1V
Differential Input Impedance
Common Mode
 2013 Microchip Technology Inc.
DS25165A-page 3
MCP6421
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2,
VOUT = VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 30 pF (refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AOL
95
115
—
dB
0.3 < VOUT < (VDD -0.3V)
VCM= VSS
VDD = 5.5V
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
Output
High-Level Output Voltage
Low-Level Output Voltage
VOH
1.796
1.799
—
V
VDD = 1.8V
5.495
5.499
—
V
VDD = 5.5V
VOL
—
0.001
0.004
V
VDD = 1.8V
—
0.001
0.005
V
VDD = 5.5V
—
±6
—
mA
VDD = 1.8V
—
±22
—
mA
VDD = 5.5V
VDD
1.8
—
5.5
V
IQ
—
4.4
5.5
µA
Output Short-Circuit Current
ISC
Power Supply
Supply Voltage
Quiescent Current per Amplifier
TABLE 1-2:
IO = 0, VCM = VDD/4
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2,
VOUT = VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 30 pF (refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
GBWP
—
90
—
kHz
Phase Margin
PM
—
55
—
°
Slew Rate
SR
—
0.05
—
V/µs
G = +1 V/V
Noise
Input Noise Voltage
Eni
—
15
—
µVp-p
f = 0.1 Hz to 10 Hz
Input Noise Voltage Density
eni
—
95
—
nV/Hz
f = 1 kHz
—
90
—
nV/Hz
f = 10 kHz
Input Noise Current Density
ini
—
0.6
—
fA/Hz
f = 1 kHz
Electromagnetic Interference
Rejection Ratio
EMIRR
—
77
—
dB
—
92
—
VIN = 100 mVPK,
900 MHz
—
97
—
VIN = 100 mVPK,
1800 MHz
—
99
—
VIN = 100 mVPK,
2400 MHz
DS25165A-page 4
VIN = 100 mVPK,
400 MHz
 2013 Microchip Technology Inc.
MCP6421
TABLE 1:
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +5.5V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Operating Temperature Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 5L-SC70
JA
—
331
—
°C/W
Thermal Resistance, 5L-SOT-23
JA
—
220.7
—
°C/W
Conditions
Temperature Ranges
Note 1
Thermal Package Resistances
Note 1:
1.3
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
Test Circuits
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT (see Equation 1-1). Note that VCM is not the
circuit’s Common mode voltage ((VP + VM)/2), and that
VOST includes VOS plus the effects (on the input offset
error, VOST) of the temperature, CMRR, PSRR and
AOL.
EQUATION 1-1:
CF
6.8 pF
RG
100 k
VP
VDD
VIN+
CB1
100 nF
MCP6421
G DM = RF  RG
VDD/2
CB2
1 µF
VIN–
V CM =  V P + V DD  2   2
VM
V OST = VIN– – VIN+
V OUT =  V DD  2  +  V P – V M  + VOST  1 + G DM 
Where:
GDM = Differential Mode Gain
(V/V)
VCM = Op Amp’s Common Mode
Input Voltage
(V)
VOST = Op Amp’s Total Input Offset Voltage (mV)
 2013 Microchip Technology Inc.
RF
100 k
RG
100 k
RL
100 k
RF
100 k
CF
6.8 pF
VOUT
CL
30 pF
VL
FIGURE 1-1:
AC and DC Test Circuit for
Most Specifications.
DS25165A-page 5
MCP6421
NOTES:
DS25165A-page 6
 2013 Microchip Technology Inc.
MCP6421
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
FIGURE 2-1:
ntage of Occurances
Percen
12%
10%
Inputt Offset Voltage (μV)
1000
800
600
400
0
200
-200
-400
-600
-800
1253Samples
VDD = 3.0V
VCM = VDD/4
Input Offset Voltage (μV)
Input Offset Voltage.
1253 Samples
VDD = 3.0V
VCM = VDD/4
TA = -40°C to +125°C
8%
6%
4%
2%
1000
TA = +125°C
800
TA = +85°C
600
TA = +25°C
TA = -40°C
400
200
0
-200
-400
VDD = 5
5.5V
5V
-600
Representative Part
-800
-1000
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Common Mode Input Voltage (V)
FIGURE 2-4:
Input Offset Voltage vs.
Common Mode Input Voltage.
1000
800
600
400
200
0
-200
-400
-600
-800
-1000
Inputt Offset Voltage (μV)
48%
44%
40%
36%
32%
28%
24%
20%
16%
12%
8%
4%
0%
-1000
entage of Occurences
Perce
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2,
VL = VDD/2, RL = 100 k to VL and CL = 30 pF.
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
2
4
6
8
10
12
14
16
18
20
0%
Representative Part
VDD = 5.5V
VDD = 1.8V
0
0.5
1
Input Offset Voltage Drift (μV/°C)
Input Offset Voltage Drift.
1000
800
TA = +125°C
600
TA = +85°C
T
A = +25°C
400
TA = -40°C
200
0
-200
-400
-600
VDD = 1.8V
-800 Representative
Part
-1000
-0.3 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
Common Mode Input Voltage.
 2013 Microchip Technology Inc.
FIGURE 2-5:
Output Voltage.
2 2.5 3 3.5 4
Output Voltage (V)
4.5
5
5.5
Input Offset Voltage vs.
1000
Input O
Offset Voltage (μV)
Inputt Offset Voltage (μV)
FIGURE 2-2:
1.5
800
Representative Part
600
400
200
0
-200
-400
-600
-800
TA = +125°C
125 C
TA = +85°C
TA = +25°C
TA = -40°C
-1000
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5
Power Supply Voltage (V)
FIGURE 2-6:
Input Offset Voltage vs.
Power Supply Voltage.
DS25165A-page 7
MCP6421
90
140
80
130
70
120
CM
MRR, PSRR (dB)
60
50
40
30
20
10
90
80
CMRR @ VDD = 5.5V
@ VDD = 1.8V
60
FIGURE 2-7:
Input Noise Voltage Density
vs. Common Mode Input Voltage.
10,000
50
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
FIGURE 2-10:
Temperature.
1000
1n
Input Bias and Offset Currents
(A)
125
CMRR, PSRR vs. Ambient
VDD = 5.5V
100
100p
1,000
100
1p
1
0.1p
0.1
Input Offset Current
FIGURE 2-8:
vs. Frequency.
1.E+5
100k
Ambient Temperature (°C)
Input Noise Voltage Density
Representative Part
70
PSRR-
50
PSRR+
40
30
20
10
10
FIGURE 2-9:
Frequency.
DS25165A-page 8
100
100
1000
1k
Frequency (Hz)
TA = +125°C
Input B
Bias Current (pA)
CMRR
80
60
FIGURE 2-11:
Input Bias, Offset Current
vs. Ambient Temperature.
1000
900
800
700
600
500
400
300
200
100
0
-100
100
10000
10k
CMRR, PSRR vs.
100000
100k
125
10k
115
1.E+4
105
1.E+2
1.E+3
10
100
1k
Frequency (Hz)
95
1.E+1
85
1
75
1.E+0
65
0.1
25
1.E-1
55
0.01p
0.01
10
90
Input Bias Current
10p
10
45
Input No
oise Voltage Density
(nV/Hz)
110
100
70
f = 10 kHz
VDD = 5.5 V
0
-0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Common Mode Input Voltage (V)
CMR
RR, PSRR (dB)
PSRR
35
Input No
oise Voltage Density
(nV/Hz)
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2,
VL = VDD/2, RL = 100 k to VL and CL = 30 pF.
TA = +85°C
TA = +25°C
VDD = 5.5 V
0
0.5
1
1.5 2 2.5 3 3.5 4 4.5 5
Common Mode Input Voltage (V)
5.5
FIGURE 2-12:
Input Bias Current vs.
Common Mode Input Voltage.
 2013 Microchip Technology Inc.
MCP6421
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2,
VL = VDD/2, RL = 100 k to VL and CL = 30 pF.
6
VDD = 5.5V
VDD = 1.8V
5
Ou
uiescent Current
(μA/Amplifier)
Quiescent Current
(μA/Amplifier)
6
4
3
2
5
4
3
2
1
1
0
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
0
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
125
FIGURE 2-13:
Quiescent Current vs.
Ambient Temperature.
VDD = 5.5V
G = +1 V/V
FIGURE 2-16:
Quiescent Current vs.
Common Mode Input Voltage.
6
120
0
4
3
TA = +125°C
TA = +85°C
TA = +25°C
25°C
TA = -40°C
2
1
0
-60
Open-Loop Phase
60
-90
40
-120
20
-150
0
-180
1.0E+00
1
1.0E+01
1.0E+02
1.0E+03
10 100 1k
Frequency (Hz)
1.0E+04
10k
-210
1.0E+05
100k
Open-Loop Gain, Phase vs.
140
DC Open-Loop Gain (dB)
Ou
uiescent Current
(μA/Amplifier)
80
FIGURE 2-17:
Frequency.
6
5
4
3
2
1
-30
-201.0E-02 1.0E-01
0.01 0.1
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Power Supply Voltage (V)
FIGURE 2-14:
Quiescent Current vs.
Power Supply Voltage.
100
Open
n-Loop Phase (°)
5
Open
n-Loop Gain (dB)
Quiescent
Q
Current
(μA/Amplifier)
Open-Loop Gain
VDD = 1.8V
G = +1 V/V
0
-0.5 -0.2 0.1 0.4 0.7 1.0 1.3 1.6 1.9 2.2 2.5
Common Mode Input Voltage (V)
FIGURE 2-15:
Quiescent Current vs.
Common Mode Input Voltage.
 2013 Microchip Technology Inc.
VDD = 5.5V
130
120
VDD = 1.8V
110
100
90
80
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
FIGURE 2-18:
DC Open-Loop Gain vs.
Ambient Temperature.
DS25165A-page 9
MCP6421
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2,
VL = VDD/2, RL = 100 k to VL and CL = 30 pF.
Output Short Circuit Current
(mA)
DC--Open Loop Gain (dB)
150
140
130
120
110
100
VDD = 5.5V
VDD = 1.8V
90
80
70
0.00
0.05
0.10
0.15
0.20
0.25
0.30
40
20
10
0
-10
-30
-40
0
FIGURE 2-19:
DC Open-Loop Gain vs.
Output Voltage Headroom.
180
120
Gain Bandwidth Product
100
80
60.0
60
50.0
VDD = 5.5V
12V
40
Phase Margin
20
30.0
0
180
140
80.0
120
70.0
Gain Bandwidth Product
100
80
60.0
60
50.0
Phase Margin
40.0
VDD = 1.8V
30.0
Phase Margin (°)
160
90.0
40
20
0
-50
-25
0
25
50
75 100 125
Ambient Temperature (°C)
FIGURE 2-21:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
DS25165A-page 10
5
5.5
VDD = 1.8V
1
1000
10000
10k
Frequency (Hz)
1k
FIGURE 2-20:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
100.0
1.5 2 2.5 3 3.5 4 4.5
Power Supply Voltage (V)
VDD = 5.5V
0.1
-25
0
25
50
75 100 125
Ambient Temperature (°C)
FIGURE 2-23:
Frequency.
Output Voltage
V
Headroom (mV)
-50
Gain B
Bandwidth Product
(MHz)
Outputt Voltage Swing (VP-P)
140
80.0
1
10
160
90.0
0.5
FIGURE 2-22:
Output Short Circuit Current
vs. Power Supply Voltage.
Ph
hase Margin (°)
Gain B
Bandwidth Product
(MHz)
100.0
40.0
[email protected] TA = +125°C
TA = +85°C
85°C
TA = +25°C
TA = -40°C
20
-20
Output Voltage Headroom (V)
VDD - VOH or VOL - VSS
70.0
[email protected] TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
30
100000
100k
Output Voltage Swing vs.
1000
VDD = 1.8V
100
VDD - VOH
10
VOL - VSS
1
0.1
0.001
0.01
0.1
1
10
Output Current (mA)
100
FIGURE 2-24:
Output Voltage Headroom
vs. Output Current.
 2013 Microchip Technology Inc.
MCP6421
1000
0.09
VDD = 5.5V
100
VDD - VOH
10
VOL - VSS
1
0.06
0.05
0.04
0.03
Falling Edge, VDD = 1.8V
Rising
Ri
i Edge,
Ed
VDD = 1.8V
1 8V
0.02
0.00
0.1
1
10
Output Current (mA)
-50
100
-25
0
25
50
75
100
125
Ambient Temperature (°C)
FIGURE 2-25:
Output Voltage Headroom
vs. Output Current.
FIGURE 2-28:
Temperature.
Slew Rate vs. Ambient
0.9
0.8
Outputt Voltage (20 mV/div)
Output Voltage
V
Headroom (mV)
0.07
0.01
0.1
0.01
VDD - VOH
0.7
0.6
0.5
VOL - VSS
0.4
0.3
0.2
0.1
VDD = 1.8V
0
-50
-25
0
25
50
75
Ambient Temperature (°C)
100
VDD = 5.5V
5 5V
G = +1 V/V
125
Time (25 μs/div)
FIGURE 2-26:
Output Voltage Headroom
vs. Ambient Temperature.
FIGURE 2-29:
Pulse Response.
Small Signal Non-Inverting
1.2
Output Voltage (20 mV/div)
Output Voltage
V
Headroom (mV)
Falling Edge, VDD = 5.5V
Rising Edge, VDD = 5.5V
0.08
Slew
S
Rate (V/μs)
Output Voltage
V
Headroom (mV)
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2,
VL = VDD/2, RL = 100 k to VL and CL = 30 pF.
VOL - VSS
1
0.8
VDD - VOH
0.6
0.4
0.2
VDD = 5.5V
VDD = 5.5 V
G = -1 V/V
0
-50
-25
0
25
50
75
Ambient Temperature (°C)
100
125
FIGURE 2-27:
Output Voltage Headroom
vs. Ambient Temperature.
 2013 Microchip Technology Inc.
Time (25 μs/div)
FIGURE 2-30:
Response.
Small Signal Inverting Pulse
DS25165A-page 11
MCP6421
10000
Ou
utput Voltage (V)
5
Clos
sed Loop Output
Im
mpedance (:)
6
1000
4
3
2
VDD = 5.5
55V
G = +1 V/V
100
GN:
101 V/V
11 V/V
1 V/V
10
1
1
0
1.0E+00
Large Signal Non-Inverting
6
100μ
5
10μ
4
VDD = 5.5 V
G = -1 V/V
3
10
1.0E+02
10n
1.0E+05
100k
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
1n
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
0
VIN (V)
Time (0.1 ms/div)
FIGURE 2-32:
Response.
Large Signal Inverting Pulse
FIGURE 2-35:
Measured Input Current vs.
Input Voltage (below VSS).
6
5
VOUT
4
EMIRR (dB)
Input, Output Voltages (V)
10k
1μ
1
VIN
2
1
0
1.0E+04
100n
2
3
1.0E+03
100
1k
Frequency (Hz)
FIGURE 2-34:
Closed Loop Output
Impedance vs. Frequency.
-IIN (A)
Output Voltage (V)
O
FIGURE 2-31:
Pulse Response.
1.0E+01
1
Time (0.1 ms/div)
VDD = 5.5V
G = +2V/V
120
110
100
90
80
70
60
50
40
30
20
10
0
VIN = 100 mVPK
VDD = 5.5V
100k
-1
1M
Time (1 ms/div)
FIGURE 2-33:
The MCP6421 Device
Shows No Phase Reversal.
DS25165A-page 12
10M
100M
1G
10G
Frequency (Hz)
FIGURE 2-36:
EMIRR vs. Frequency.
 2013 Microchip Technology Inc.
MCP6421
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2,
VL = VDD/2, RL = 100 k to VL and CL = 30 pF.
120
EMIRR (dB)
100
80
60
40
20
EMIRR @ 2400 MHz
@ 1800 MHz
@ 900 MHz
@ 400 MHz
0
-45 -40 -35 -30 -25 -20 -15 -10 -5
RF Input Voltage (VPK)
FIGURE 2-37:
to-Peak Voltage.
0
5
10
EMIRR vs. RF Input Peak-
 2013 Microchip Technology Inc.
DS25165A-page 13
MCP6421
NOTES:
DS25165A-page 14
 2013 Microchip Technology Inc.
MCP6421
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP6421
SC70-5, SOT-23-5
3.1
Symbol
Description
Analog Output
1
VOUT
2
VSS
3
VIN+
Non-inverting Input
4
VIN–
Inverting Input
5
VDD
Positive Power Supply
Negative Power Supply
Analog Output (VOUT)
The output pin is a low-impedance voltage source.
3.2
Analog Inputs (VIN+, VIN-)
The non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents.
3.3
Power Supply Pins (VSS, VDD)
The positive power supply (VDD) is 1.8V to 5.5V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
 2013 Microchip Technology Inc.
DS25165A-page 15
MCP6421
NOTES:
DS25165A-page 16
 2013 Microchip Technology Inc.
MCP6421
4.0
APPLICATION INFORMATION
The MCP6421 op amp is manufactured using
Microchip’s state-of-the-art CMOS process. This op
amp is unity gain stable and suitable for a wide range
of general purpose applications.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
VDD
4.1
Rail-to-Rail Input
4.1.1
D1
PHASE REVERSAL
The MCP6421 op amp is designed to prevent phase
reversal, when the input pins exceed the supply
voltages. Figure 2-33 shows the input voltage
exceeding the supply voltage with no phase reversal.
4.1.2
INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the voltages at the
input pins (see Section 1.1, Absolute Maximum
Ratings †).
The Electrostatic Discharge (ESD) protection on the
inputs can be depicted as shown in Figure 4-1. This
structure was chosen to protect the input transistors
against many, but not all, over-voltage conditions, and
to minimize the input bias current (IB).
VDD Bond
Pad
VIN+ Bond
Pad
VSS
Input
Stage
Bond V –
IN
Pad
Bond
Pad
FIGURE 4-1:
Structures.
D2
V1
VOUT
MCP6421
V2
FIGURE 4-2:
Inputs.
Protecting the Analog
A significant amount of current can flow out of the
inputs when the Common mode voltage (VCM) is below
ground (VSS); see Figure 2-35.
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the currents into
the input pins (see Section 1.1, Absolute Maximum
Ratings †).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
currents in or out of the input pins (and the ESD diodes,
D1 and D2). The diode currents will go through either
VDD or VSS.
VDD
D1
D2
V1
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
over-voltage (beyond VDD) events. Very fast ESD
events that meet the spec are limited so that damage
does not occur.
 2013 Microchip Technology Inc.
VOUT
R1
Simplified Analog Input ESD
MCP6421
V2
R2
min(R1,R2) >
VSS – min(V1, V2)
2 mA
min(R1,R2) >
max(V1,V2) – VDD
2 mA
FIGURE 4-3:
Inputs.
Protecting the Analog
DS25165A-page 17
MCP6421
NORMAL OPERATION
The input stage of the MCP6421 op amp uses two
differential input stages in parallel. One operates at a
low Common mode input voltage (VCM), while the other
operates at a high VCM. With this topology, the device
operates with a VCM up to 300 mV above VDD and
300 mV below VSS. The input offset voltage is
measured at VCM = VSS – 0.3V and VDD + 0.3V, to
ensure proper operation.
The transition between the input stages occurs when
VCM is near VDD – 0.6V (see Figures 2-3 and 2-4). For
the best distortion performance and gain linearity, with
non-inverting gains, avoid this region of operation.
4.2
Rail-to-Rail Output
The output voltage range of the MCP6421 op amp is
0.001V (typical) and 5.499V (typical) when
RL = 100 k is connected to VDD/2 and VDD = 5.5V.
Refer to Figures 2-24 and 2-26 for more information.
4.3
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases, and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to the capacitive loads, all gains show
the same general behavior.
When driving large capacitive loads with the MCP6421
op amp (e.g., > 60 pF when G = +1 V/V), a small series
resistor at the output (RISO in Figure 4-5) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
–
VIN
MCP6421
+
RISO
VOUT
CL
FIGURE 4-4:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
DS25165A-page 18
Figure 4-5 gives the recommended RISO values for the
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
100000
Reco
ommended R ISO (Ω)
4.1.4
VDD = 5.5 V
RL = 100 k
10000
1000
100
GN:
1 V/V
2 V/V
≥ 5 V/V
10
1
10p
100p
1n
10n
0.1μ
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-5:
Recommended RISO Values
for Capacitive Loads.
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6421 SPICE macro model are
very helpful.
4.4
Supply Bypass
The MCP6421 op amp’s power supply pin (VDD for
single-supply) should have a local bypass capacitor
(i.e., 0.01 µF to 0.1 µF) within 2 mm for good high
frequency performance. It can use a bulk capacitor
(i.e., 1 µF or larger) within 100 mm to provide large,
slow currents. This bulk capacitor can be shared with
other analog parts.
4.5
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP6421 op amp’s bias current at +25°C (±1 pA,
typical).
 2013 Microchip Technology Inc.
MCP6421
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-6.
EMIRR is defined as :
EQUATION 4-1:
V RF
EMIRR  dB  = 20  log  -------------
  V OS
Where:
Guard Ring
VIN– VIN+
VSS
VRF = Peak Amplitude of
RF Interfering Signal (VPK)
VOS = Input Offset Voltage Shift (V)
4.7
FIGURE 4-6:
for Inverting Gain.
1.
2.
Example Guard Ring Layout
Non-inverting Gain and Unity-Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
Common mode input voltage.
Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
Application Circuits
4.7.1
CO GAS SENSOR
A CO gas detector is a device which detects the
presence of carbon monoxide gas level. Usually this is
battery powered and transmits audible and visible
warnings.
The sensor responds to CO gas by reducing its
resistance proportionaly to the amount of CO present in
the air exposed to the internal element. On the sensor
module, this variable is part of a voltage divider formed
by the internal element and potentiometer R1. The
output of this voltage divider is fed into the noninverting inputs of the MCP6421 op amp. The device is
configured as a buffer with unity gain and is used to
provide a non-loaded test point for sensor sensitivity.
Because this sensor can be corrupted by parasitic electromagnetic signals, the MCP6421 op amp can be
used for conditioning this sensor.
In Figure 4-7, the variable resistor is used to calibrate
the sensor in different environments.
.
4.6
Electromagnetic Interference
Rejection Ratio (EMIRR)
Definitions
VDD
The electromagnetic interference (EMI) is the disturbance that affects an electrical circuit due to either electromagnetic induction or electromagnetic radiation
emitted from an external source.
The parameter which describes the EMI robustness of
an op amp is the Electromagnetic Interference
Rejection Ratio (EMIRR). It quantitatively describes the
effect that an RF interfering signal has on op amp
performance. Internal passive filters make EMIRR
better compared with older parts. This means that, with
good PCB layout techniques, your EMC performance
should be better.
 2013 Microchip Technology Inc.
VDD
VREF
-
+
R1
FIGURE 4-7:
VOUT
MCP6421
CO Gas Sensor Circuit.
DS25165A-page 19
MCP6421
4.7.2
PRESSURE SENSOR AMPLIFIER
The MCP6421 op amp is well suited for conditioning
sensor signals in battery-powered applications. Many
sensors are configured as Wheatstone bridges. Strain
gauges and pressure sensors are two common examples.
Figure 4-8 shows a strain gauge amplifier, using the
MCP6421 Enhanced EMI protection device. The
difference amplifier with EMI robustness op amp is
used to amplify the signal from the Wheatstone bridge.
The two op amps, configured as buffers and connected
at outputs of pressure sensors, prevents resistive
loading of the bridge by resistor R1 and R2. Resistors
R1,R2 and R3,R5 need to be chosen with very low
tolerance to match the CMRR.
VDD
R+R
R-R
VDD
-
Va
Vb
VDD
-
+
R-R R+R
VDD
VOUT
10
IDD
1.8V
to
5.5V
MCP6421
VSS
100 k
1 M
V DD – V OUT
I DD = ----------------------------------------- 10 V/V    10  
High-Side Battery Current Sensor
FIGURE 4-9:
Battery Current Sensing.
R3
MCP6421 100k
R1
1k
+
VDD
VDD
-
+
R2
1k
MCP6421
VOUT
MCP6421
R5
100k
10k 
V OUT =  V a – Vb   ------------100 
Strain Gauge
FIGURE 4-8:
4.7.3
Pressure Sensor Amplifier.
BATTERY CURRENT SENSING
The MCP6421 op amp’s Common Mode Input Range,
which goes 0.3V beyond both supply rails, supports
their use in high-side and low-side battery current
sensing applications. The low quiescent current helps
prolong battery life, and the rail-to-rail output supports
detection of low currents.
Figure 4-9 shows a high side battery current sensor
circuit. The 10 resistor is sized to minimize power
losses. The battery current (IDD) through the 10
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the Common
mode input voltage of the op amp below VDD, which is
within its allowed range. The output of the op amp will
also be below VDD, within its Maximum Output Voltage
Swing specification.
DS25165A-page 20
 2013 Microchip Technology Inc.
MCP6421
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6421 op amp.
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6421 op
amp is available on the Microchip web site at
www.microchip.com. The model was written and tested
in the official OrCAD (Cadence®) owned PSpice®. For
the other simulators, translation may be required.
5.4
Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Some boards that are especially useful are:
The model covers a wide aspect of the op amp's
electrical specifications. Not only does the model cover
voltage, current and resistance of the op amp, but it
also covers the temperature and the noise effects on
the behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions cannot ensure it will match the actual op
amp performance.
•
•
•
•
•
•
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes, and are
recommended as supplemental reference resources.
5.2
FilterLab® Software
Microchip’s FilterLab software is an innovative software
tool that simplifies analog active filter design using op
amps. Available at no cost from the Microchip web site
at www.microchip.com/filterlab, the FilterLab design
tool provides full schematic diagrams of the filter circuit
with component values. It also outputs the filter circuit
in SPICE format, which can be used with the macro
model to simulate the actual filter performance.
5.3
Microchip Advanced Part Selector
(MAPS)
MAPS is a software tool that helps semiconductor
professionals efficiently identify the Microchip devices
that fit a particular design requirement. Available at no
cost
from
the
Microchip
website
at
www.microchip.com/ maps, the MAPS is an overall
selection tool for Microchip’s product portfolio that
includes Analog, Memory, MCUs and DSCs. Using this
tool, you can define a filter to sort features for a
parametric search of devices and export side-by-side
technical comparison reports. Helpful links are also
provided for data sheets, purchase and sampling of
Microchip parts.
 2013 Microchip Technology Inc.
MCP6XXX Amplifier Evaluation Board 1
MCP6XXX Amplifier Evaluation Board 2
MCP6XXX Amplifier Evaluation Board 3
MCP6XXX Amplifier Evaluation Board 4
Active Filter Demo Board Kit
5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
5.5
Application Notes
• ADN003 – “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722 – “Operational Amplifier Topologies and
DC Specifications”, DS00722
• AN723 – “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884 – “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990 – “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
• AN1177 – “Op Amp Precision Design: DC Errors”,
DS01177
• AN1228 – “Op Amp Precision Design: Random
Noise”, DS01228
• AN1297 – “Microchip’s Op Amp SPICE Macro
Models”, DS01297
• AN1332: “Current Sensing Circuit Concepts and
Fundamentals”’ DS01332
• AN1494: “Using MCP6491 Op Amps for Photodetection Applications”’ DS01494
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
DS25165A-page 21
MCP6421
NOTES:
DS25165A-page 22
 2013 Microchip Technology Inc.
MCP6421
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
Example:
5-Lead SC70
DS25
5-Lead SOT-23
Example:
XXNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
3H25
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it
will be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
 2013 Microchip Technology Inc.
DS25165A-page 23
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DS25165A-page 24
 2013 Microchip Technology Inc.
MCP6421
5-Lead Plastic Small Outline Transistor (LT) [SC70]
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 2013 Microchip Technology Inc.
DS25165A-page 25
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DS25165A-page 26
 2013 Microchip Technology Inc.
MCP6421
\
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 2013 Microchip Technology Inc.
DS25165A-page 27
MCP6421
NOTES:
DS25165A-page 28
 2013 Microchip Technology Inc.
MCP6421
APPENDIX A:
REVISION HISTORY
Revision A (March 2013)
• Original Release of this Document.
 2013 Microchip Technology Inc.
DS25165A-page 29
MCP6421
NOTES:
DS25165A-page 30
 2013 Microchip Technology Inc.
MCP6421
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
T
-X
/XX
Tape and Reel Temperature Package
Range
Device:
MCP6421T:
Temperature
Range:
E
Package:
LTY
OT
Single Op Amp (Tape and Reel)
(SC70, SOT-23)
Examples:
a)
MCP6421T-E/LTY:
b)
MCP6421T-E/OT:
Tape and Reel,
Extended Temperature,
5LD SC-70 Package
Tape and Reel,
Extended Temperature,
5LD SOT-23 Package
= -40°C to +125°C (Extended)
= Plastic Package (SC70), 5-lead
= Plastic Small Outline Transistor (SOT-23), 5-lead
 2013 Microchip Technology Inc.
DS25165A-page 31
MCP6421
NOTES:
DS25165A-page 32
 2013 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2013, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-62077-046-7
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2013 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS25165A-page 33
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
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Tel: 852-2401-1200
Fax: 852-2401-3431
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Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
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Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
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Tel: 45-4450-2828
Fax: 45-4485-2829
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Tel: 91-20-2566-1512
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Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
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Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
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Tel: 49-89-627-144-0
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Tel: 678-957-9614
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Tel: 774-760-0087
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Tel: 630-285-0071
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Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS25165A-page 34
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
11/29/12
 2013 Microchip Technology Inc.