ONSEMI NGB18N40CLBT4G

NGB18N40CLBT4
Ignition IGBT
18 Amps, 400 Volts
N−Channel D2PAK
This Logic Level Insulated Gate Bipolar Transistor (IGBT) features
monolithic circuitry integrating ESD and Over−Voltage clamped
protection for use in inductive coil drivers applications. Primary uses
include Ignition, Direct Fuel Injection, or wherever high voltage and
high current switching is required.
Features
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18 AMPS, 400 VOLTS
VCE(on) 3 2.0 V @
IC = 10 A, VGE . 4.5 V
• Ideal for Coil−on−Plug Applications
• Gate−Emitter ESD Protection
• Temperature Compensated Gate−Collector Voltage Clamp Limits
•
•
•
•
•
•
•
•
Stress Applied to Load
Integrated ESD Diode Protection
New Design Increases Unclamped Inductive Switching (UIS) Energy
Per Area
Low Threshold Voltage to Interface Power Loads to Logic or
Microprocessor Devices
Low Saturation Voltage
High Pulsed Current Capability
Integrated Gate−Emitter Resistor (RGE)
Emitter Ballasting for Short−Circuit Capability
Pb−Free Package is Available
C
G
RGE
E
D2PAK
CASE 418B
STYLE 4
MARKING DIAGRAM
4
Collector
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector−Emitter Voltage
VCES
430
VDC
Collector−Gate Voltage
VCER
430
VDC
Gate−Emitter Voltage
VGE
18
VDC
IC
18
50
ADC
AAC
Collector Current−Continuous
@ TC = 25°C − Pulsed
ESD (Human Body Model)
R = 1500 W, C = 100 pF
ESD
ESD (Machine Model) R = 0 W, C = 200 pF
ESD
800
V
PD
115
0.77
W
W/°C
TJ, Tstg
−55 to +175
°C
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Operating and Storage Temperature Range
GB
18N40BG
AYWW
1
Gate
kV
8.0
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
GB18N40B
A
Y
WW
G
3
Emitter
2
Collector
= Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Package
Shipping†
NGB18N40CLBT4
D2PAK
800/Tape & Reel
NGB18N40CLBT4G
D2PAK
800/Tape & Reel
Device
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 3
1
Publication Order Number:
NGB18N40CLB/D
NGB18N40CLBT4
UNCLAMPED COLLECTOR−TO−EMITTER AVALANCHE CHARACTERISTICS (−55° ≤ TJ ≤ 175°C)
Symbol
Characteristic
Single Pulse Collector−to−Emitter Avalanche Energy
VCC = 50 V, VGE = 5.0 V, Pk IL = 21.1 A, L = 1.8 mH, Starting TJ = 25°C
VCC = 50 V, VGE = 5.0 V, Pk IL = 18.3 A, L = 1.8 mH, Starting TJ = 125°C
EAS
Reverse Avalanche Energy
VCC = 100 V, VGE = 20 V, Pk IL = 25.8 A, L = 6.0 mH, Starting TJ = 25°C
EAS(R)
Value
Unit
mJ
400
300
mJ
2000
MAXIMUM SHORT−CIRCUIT TIMES (−55°C ≤ TJ ≤ 150°C)
Characteristic
Symbol
Value
Unit
Short Circuit Withstand Time 1 (See Figure 17, 3 Pulses with 10 ms Period)
tsc1
750
ms
Short Circuit Withstand Time 2 (See Figure 18, 3 Pulses with 10 ms Period)
tsc2
5.0
ms
Symbol
Value
Unit
RqJC
1.3
°C/W
RqJA
50
°C/W
TL
275
°C
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Case
D2PAK (Note 1)
Thermal Resistance, Junction−to−Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
Test Conditions
Temperature
Min
Typ
Max
Unit
BVCES
IC = 2.0 mA
TJ = −40°C to 150°C
380
395
420
VDC
IC = 10 mA
TJ = −40°C to 150°C
390
405
430
TJ = 25°C
−
2.0
20
TJ = 150°C
−
10
40*
TJ = −40°C
−
1.0
10
TJ = 25°C
−
0.7
2.0
TJ = 150°C
−
12
25*
TJ = −40°C
−
0.1
1.0
TJ = 25°C
27
33
37
TJ = 150°C
30
36
40
TJ = −40°C
25
32
35
TJ = −40°C to 150°C
11
13
15
VDC
TJ = −40°C to 150°C
384
640
100
0
mADC
TJ = −40°C to 150°C
10
16
26
kW
TJ = 25°C
1.1
1.4
1.9
VDC
TJ = 150°C
0.75
1.0
1.4
TJ = −40°C
1.2
1.6
2.1*
−
−
3.4
−
OFF CHARACTERISTICS
Collector−Emitter Clamp Voltage
Zero Gate Voltage Collector Current
ICES
VCE = 350 V,
VGE = 0 V
Reverse Collector−Emitter Leakage Current
IECS
VCE = −24 V
Reverse Collector−Emitter Clamp Voltage
BVCES(R)
IC = −75 mA
Gate−Emitter Clamp Voltage
BVGES
Gate−Emitter Leakage Current
IGES
Gate Emitter Resistor
RGE
IG = 5.0 mA
VGE = 10 V
−
mADC
mA
VDC
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
VGE(th)
IC = 1.0 mA,
VGE = VCE
Threshold Temperature Coefficient
(Negative)
−
−
*Maximum Value of Characteristic across Temperature Range.
1. When surface mounted to an FR4 board using the minimum recommended pad size.
2. Pulse Test: Pulse Width v 300 mS, Duty Cycle v 2%.
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2
mV/°C
NGB18N40CLBT4
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
Test Conditions
Temperature
Min
Typ
Max
Unit
TJ = 25°C
1.0
1.4
1.6
VDC
IC = 6.0 A,
VGE = 4.0 V
TJ = 150°C
0.9
1.3
1.6
TJ = −40°C
1.1
1.45
1.7*
TJ = 25°C
1.3
1.6
1.9*
TJ = 150°C
1.2
1.55
1.8
TJ = −40°C
1.4
1.6
1.9*
ON CHARACTERISTICS (Note 2)
Collector−to−Emitter On−Voltage
VCE(on)
IC = 8.0 A,
VGE = 4.0 V
IC = 10 A,
VGE = 4.0 V
IC = 15 A,
VGE = 4.0 V
gfs
VCE = 5.0 V, IC = 6.0 A
1.4
1.8
2.05
1.5
1.8
2.0
TJ = −40°C
1.4
1.8
2.1*
TJ = 25°C
1.8
2.2
2.5
TJ = 150°C
2.0
2.4
2.6*
TJ = −40°C
1.7
2.1
2.5
TJ = 25°C
1.3
1.8
2.0*
TJ = 150°C
1.3
1.75
2.0*
TJ = −40°C
1.4
1.8
2.0*
TJ = −40°C to 150°C
8.0
14
25
Mhos
400
800
100
0
pF
50
75
100
4.0
7.0
10
IC = 10 A,
VGE = 4.5 V
Forward Transconductance
TJ = 25°C
TJ = 150°C
DYNAMIC CHARACTERISTICS
Input Capacitance
CISS
Output Capacitance
COSS
Transfer Capacitance
CRSS
VCC = 25 V, VGE = 0 V
f = 1.0 MHz
TJ = −40°C to 150°C
SWITCHING CHARACTERISTICS
td(off)
VCC = 300 V, IC = 6.5 A
RG = 1.0 kW, RL = 46 W,
TJ = 25°C
−
4.0
10
Fall Time (Resistive)
tf
VCC = 300 V, IC = 6.5 A
RG = 1.0 kW, RL = 46 W,
TJ = 25°C
−
9.0
15
Turn−On Delay Time
td(on)
VCC = 10 V, IC = 6.5 A
RG = 1.0 kW, RL = 1.5 W
TJ = 25°C
−
0.7
4.0
tr
VCC = 10 V, IC = 6.5 A
RG = 1.0 kW, RL = 1.5 W
TJ = 25°C
−
4.5
7.0
Turn−Off Delay Time (Resistive)
Rise Time
*Maximum Value of Characteristic across Temperature Range.
1. When surface mounted to an FR4 board using the minimum recommended pad size.
2. Pulse Test: Pulse Width v 300 mS, Duty Cycle v 2%.
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3
mSec
mSec
NGB18N40CLBT4
TYPICAL ELECTRICAL CHARACTERISTICS (unless otherwise noted)
60
IC, COLLECTOR CURRENT (AMPS)
IC, COLLECTOR CURRENT (AMPS)
60
VGE = 10 V
50
5V
4.5 V
40
30
4V
TJ = 25°C
3.5 V
20
3V
10
2.5 V
0
4.5 V
40
4V
TJ = −40°C
30
3.5 V
20
3V
10
2.5 V
1
2
3
4
5
6
7
8
1
0
3
2
5
4
6
7
VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
Figure 1. Output Characteristics
Figure 2. Output Characteristics
8
60
IC, COLLECTOR CURRENT (AMPS)
60
VGE = 10 V
50
5V
40
TJ = 150°C
4.5 V
30
4V
20
3.5 V
3V
10
2.5 V
0
0
1
2
3
4
5
7
6
55
VCE = 10 V
50
45
40
35
30
TJ = 25°C
25
20
15
10
5
0
0
8
COLLECTOR TO EMITTER VOLTAGE (VOLTS)
VGE = 5 V
IC = 25 A
IC = 20 A
2.5
IC = 15 A
2.0
IC = 10 A
1.5
IC = 5 A
1.0
0.5
0.0
−50
−25
0
25
50
75
100
2
3
4
5
6
7
8
Figure 4. Transfer Characteristics
4.0
3.0
1
VGE, GATE TO EMITTER VOLTAGE (VOLTS)
Figure 3. Output Characteristics
3.5
TJ = 150°C
TJ = −40°C
VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
5V
0
0
IC, COLLECTOR CURRENT (AMPS)
VGE = 10 V
50
125
150
3
TJ = 25°C
2.5
IC = 15 A
2
IC = 10 A
1.5
IC = 5 A
1
0.5
0
3
TJ, JUNCTION TEMPERATURE (°C)
4
5
6
7
8
9
GATE−TO−EMITTER VOLTAGE (VOLTS)
Figure 5. Collector−to−Emitter Saturation
Voltage versus Junction Temperature
Figure 6. Collector−to−Emitter Voltage versus
Gate−to−Emitter Voltage
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4
10
10000
3
TJ = 150°C
IC = 15 A
2
C, CAPACITANCE (pF)
2.5
IC = 10 A
1.5
IC = 5 A
1
1000
Ciss
100
Coss
10
Crss
0.5
3
4
5
6
7
8
0
10
9
40
60
80
100 120
140 160 180 200
VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
Figure 7. Collector−to−Emitter Voltage versus
Gate−to−Emitter Voltage
Figure 8. Capacitance Variation
30
2
1.8
VTH + 4 s
VTH
1.6
1.4
20
GATE TO EMITTER VOLTAGE (VOLTS)
VTH − 4 s
1.2
1
0.8
0.6
0.4
VCC = 50 V
VGE = 5.0 V
RG = 1000 W
25
L = 2 mH
20
15
L = 3 mH
10
L = 6 mH
5
0.2
0
−50 −30 −10
10
30
50
70
90
0
−50 −25
110 130 150
0
25
50
75
100
125
150 175
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 9. Gate Threshold Voltage versus
Temperature
Figure 10. Minimum Open Secondary Latch
Current versus Temperature
12
30
VCC = 50 V
VGE = 5.0 V
RG = 1000 W
25
L = 2 mH
20
10
SWITCHING TIME (ms)
IL, LATCH CURRENT (AMPS)
1
0
0
IL, LATCH CURRENT (AMPS)
GATE THRESHOLD VOLTAGE (VOLTS)
COLLECTOR TO EMITTER VOLTAGE (VOLTS)
NGB18N40CLBT4
L = 3 mH
15
L = 6 mH
10
8
VCC = 300 V
VGE = 5.0 V
RG = 1000 W
IC = 10 A
L = 300 mH
tf
6
td(off)
4
2
5
0
−50 −25
0
25
50
75
100
125
150
0
−50 −30 −10
175
10
30
50
70
90
110 130 150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Typical Open Secondary Latch
Current versus Temperature
Figure 12. Inductive Switching Fall Time
versus Temperature
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5
NGB18N40CLBT4
100
COLLECTOR CURRENT (AMPS)
COLLECTOR CURRENT (AMPS)
100
DC
10
100 ms
1 ms
1
10 ms
100 ms
0.1
0.01
1
100 ms
0.1
100 ms
1 ms
10 ms
0.01
1
10
100
1000
1
10
100
1000
COLLECTOR−EMITTER VOLTAGE (VOLTS)
COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 13. Single Pulse Safe Operating Area
(Mounted on an Infinite Heatsink at TA = 255C)
Figure 14. Single Pulse Safe Operating Area
(Mounted on an Infinite Heatsink at TA = 1255C)
100
100
t1 = 1 ms, D = 0.05
COLLECTOR CURRENT (AMPS)
COLLECTOR CURRENT (AMPS)
10 DC
t1 = 2 ms, D = 0.10
10
t1 = 3 ms, D = 0.30
1
0.1
0.01
t1 = 1 ms, D = 0.05
t1 = 2 ms, D = 0.10
10
t1 = 3 ms, D = 0.30
1
0.1
0.01
1
10
100
1000
1
10
100
1000
COLLECTOR−EMITTER VOLTAGE (VOLTS)
COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 15. Pulse Train Safe Operating Area
(Mounted on an Infinite Heatsink at TC = 255C)
Figure 16. Pulse Train Safe Operating Area
(Mounted on an Infinite Heatsink at TC = 1255C)
VBATT = 16 V
VBATT = 16 V
RL = 0.1 W
RL = 0.1 W
L = 10 mH
L = 10 mH
5.0 V
5.0 V
VIN
VIN
RG = 1 kW
RG = 1 kW
RS = 55 mW
Figure 17. Circuit Configuration for
Short Circuit Test #1
Figure 18. Circuit Configuration for
Short Circuit Test #2
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6
NGB18N40CLBT4
100
R(t), TRANSIENT THERMAL RESISTANCE (°C/Watt)
Duty Cycle = 0.5
0.2
10
0.1
0.05
0.02
1
0.01
0.1
0.01
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
P(pk)
Single Pulse
t1
0.001
t2
DUTY CYCLE, D = t1/t2
TJ(pk) − TA = P(pk) RqJA(t)
RqJC @ R(t) for t ≤ 0.2 s
0.0001
0.00001
0.0001
0.001
0.01
t,TIME (S)
Figure 19. Transient Thermal Resistance
(Non−normalized Junction−to−Ambient mounted on
minimum pad area)
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7
0.1
1
NGB18N40CLBT4
PACKAGE DIMENSIONS
D2PAK 3
CASE 418B−04
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 418B−01 THRU 418B−03 OBSOLETE,
NEW STANDARD 418B−04.
C
E
V
W
−B−
4
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
V
A
1
2
S
3
−T−
SEATING
PLANE
K
W
J
G
D
H
3 PL
0.13 (0.005)
M
T B
M
P
INCHES
MIN
MAX
0.340 0.380
0.380 0.405
0.160 0.190
0.020 0.035
0.045 0.055
0.310 0.350
0.100 BSC
0.080
0.110
0.018 0.025
0.090
0.110
0.052 0.072
0.280 0.320
0.197 REF
0.079 REF
0.039 REF
0.575 0.625
0.045 0.055
MILLIMETERS
MIN
MAX
8.64
9.65
9.65 10.29
4.06
4.83
0.51
0.89
1.14
1.40
7.87
8.89
2.54 BSC
2.03
2.79
0.46
0.64
2.29
2.79
1.32
1.83
7.11
8.13
5.00 REF
2.00 REF
0.99 REF
14.60 15.88
1.14
1.40
STYLE 4:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
U
L
M
SOLDERING FOOTPRINT*
8.38
0.33
F
VIEW W−W
3
1.016
0.04
10.66
0.42
5.08
0.20
3.05
0.12
17.02
0.67
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NGB18N40CLB/D