STMICROELECTRONICS VN5025AJTR-E

VN5025AJ-E
Single channel high side driver with analog sense
for automotive applications
Features
Max supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 to 36V
Max on-state resistance
RON
25 mΩ
Current limitation (typ)
ILIMH
40 A
Off state supply current
IS
2 µA
■
PowerSSO-12
– Reverse battery protection (see Application
schematic )
– Electrostatic discharge protection
General features
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
Application
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
■
Diagnostic functions
– proportional load current sense
– high current sense precision for wide range
currents
– current sense disable
– thermal shutdown indication
– very low current sense leakage
■
Protection
– Undervoltage shut-down
– Overvoltage clamp
– package
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of Vcc
– Thermal shut down
Table 1.
■
The VN5025AJ-E is a monolithic device made
using STMicroelectronics VIPower technology. It
is intended for driving resistive or inductive loads
with one side connected to ground. Active VCC pin
voltage clamp protects the device against low
energy spikes (see ISO7637 transient
compatibility table). This device integrates an
analog current sense which delivers a current
proportional to the load current (according to a
known ratio) when CS_DIS is driven low or left
open. When CS_DIS is driven high, the
CURRENT SENSE pin is in a high impedance
condition. Output current limitation protects the
device in overload condition. In case of long
overload duration, the device limits the dissipated
power to safe level up to thermal shut-down
intervention. Thermal shut-down with automatic
restart allows the device to recover normal
operation as soon as fault condition disappears.
Device summary
Order codes
Package
PowerSSO-12
February 2008
Tube
Tape and Reel
VN5025AJ-E
VN5025AJTR-E
Rev 5
1/31
www.st.com
31
Contents
VN5025AJ-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolue maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1
4
6
2/31
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21
3.1.2
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 22
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
PowerSSO-12TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2
PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
VN5025AJ-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PowerSSO-12TM mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3/31
List of figures
VN5025AJ-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
4/31
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IOUT/ISENSE Vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum current sense ratio drift vs load current- to update. . . . . . . . . . . . . . . . . . . . . . . 14
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
On state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
On state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Turn- On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Turn- Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Maximum turn Off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
PowerSSO-12TM PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 24
PowerSSO-12TM thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 25
Thermal fitting model of a single channel HSD in PowerSSO-12TM . . . . . . . . . . . . . . . . . . 25
PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PowerSSO-12TM tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PowerSSO-12TM tape and reel shipment (suffix “TR” . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
VN5025AJ-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
VCC
VCC
CLAMP
UNDERVOLTAGE
PwCLAMP
DRIVER
OUTPUT
GND
ILIM
LOGIC
INPUT
VDSLIM
PwrLIM
OVERTEMP.
IOUT
K
CURRENT
SENSE
CS_DIS
Table 2.
Pin function
Name
VCC
OUTPUT
GND
INPUT
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
CURRENT SENSE Analog current sense pin, delivers a current proportional to the load current.
CS_DIS
Active high CMOS compatible pin, to disable the current sense pin.
5/31
Block diagram and pin description
Figure 2.
VN5025AJ-E
Configuration diagram (top view)
TAB = Vcc
Vcc
GND
INPUT
CURRENT_SENSE
CS_DIS
Vcc
Table 3.
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
Suggested connections for unused and N.C. pins
Connection / Pin
Current Sense
N.C.
Output
Input
CS_DIS
Floating
N.R.(1)
X
X
X
X
To ground
Through 1kΩ resistor
X
N.R.
1. Not recommended.
6/31
12
11
10
9
8
7
1
2
3
4
5
6
Through 10kΩ Through 10kΩ
resistor
resistor
VN5025AJ-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
VF
ICSD
IIN
IOUT
OUTPUT
CS_DIS
INPUT
VCC
VOUT
ISENSE
CURRENT SENSE
VCSD
GND
VIN
VSENSE
IGND
Note:
VF = VOUT - VCC during reverse battery condition.
2.1
Absolue maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 4.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
- IGND
DC reverse ground pin current
200
mA
Internally limited
A
24
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC-41
+VCC
V
V
140
mJ
IOUT
- IOUT
IIN
ICSD
DC output current
Reverse DC output current
-ICSENSE DC reverse CS pin current
VCSENSE Current Sense maximum voltage
EMAX
Maximum switching energy (single pulse)
(L=0.8mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.) )
7/31
Electrical specifications
Table 4.
Absolute maximum ratings (continued)
Symbol
Value
Unit
VESD
Electrostatic discharge
(Human Body Model: R=1.5KΩ; C=100pF)
- INPUT
- CURRENT SENSE
- CS_DIS
- OUTPUT
- VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
VN5025AJ-E
Parameter
Thermal data
Table 5.
Symbol
Thermal data
Parameter
Rthj-case Thermal resistance junction-case (MAX)
Rthj-amb
8/31
Thermal resistance junction-ambient (MAX)
Max Value
Unit
1.4
°C/W
See Figure 29
°C/W
VN5025AJ-E
2.3
Electrical specifications
Electrical characteristics
The values specified in this section are for 8V<VCC<36V; -40°C<Tj<150°C, unless otherwise
stated.
Table 6.
Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
4.5
13
36
V
4.5
V
VCC
Operating supply
voltage
VUSD
Undervoltage
shutdown
3.5
VUSDhyst
Undervoltage
shutdown hysteresis
0.5
RON
On State resistance
IOUT= 3A; Tj= 25°C
IOUT= 3A; Tj= 150°C
IOUT= 3A; VCC= 5V; Tj=25°C
Clamp voltage
IS= 20 mA
Supply current
Off State; VCC=13V; Tj=25°C;
VIN=VOUT=VSENSE=VCSD=0V
On State; VCC=13V; VIN=5V;
IOUT= 0A
Vclamp
IS
IL(off)
VF
Off State output
current
VIN=VOUT=0V; VCC=13V; Tj=25°C
VIN=VOUT=0V; VCC=13V; Tj=125°C
Output - VCC diode
voltage
-IOUT=4A; Tj=150°C
41
0
0
V
25
50
35
mΩ
mΩ
mΩ
46
52
V
2(1)
5(1)
µA
1.5
3
mA
0.01
3
5
µA
0.7
V
1. PowerMOS leakage included.
9/31
Electrical specifications
Table 7.
Symbol
Switching (VCC=13V, Tj=25°C)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-On delay time
RL= 4.3Ω (see Figure 8.)
30
µs
td(off)
Turn-Off delay time
RL= 4.3Ω (see Figure 8.)
50
µs
(dVOUT/dt)on Turn-On voltage slope
RL= 4.3Ω
See
Figure 20
V/ µs
(dVOUT/dt)off Turn-Off voltage slope
RL= 4.3Ω
See
Figure 22
V/ µs
WON
Switching energy losses
during twon
RL= 4.3Ω (see Figure 8)
0.47
mJ
WOFF
Switching energy losses
during twoff
RL= 4.3Ω (see Figure 8)
0.45
mJ
Table 8.
Symbol
Logic input
Parameter
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
VICL
Test conditions
VIN= 0.9V
Input clamp voltage
CS_DIS low level
voltage
ICSDL
Low level CS_DIS
current
VCSDH
CS_DIS high level
voltage
ICSDH
High level CS_DIS
current
VCSD(hyst)
CS_DIS hysteresis
voltage
CS_DIS clamp voltage
Min.
Typ.
Max.
Unit
0.9
V
1
µA
2.1
V
VIN= 2.1V
Input hysteresis
voltage
VCSDL
VCSCL
10/31
VN5025AJ-E
10
0.25
IIN= 1mA
IIN= -1mA
VCSD= 0.9V
V
5.5
7
V
V
0.9
V
-0.7
1
µA
2.1
V
VCSD= 2.1V
10
0.25
ICSD=1mA
ICSD= -1mA
µA
µA
V
5.5
7
-0.7
V
V
VN5025AJ-E
Electrical specifications
Table 9.
Symbol
Protection and diagnostics(1)
Parameter
IlimH
DC short circuit
current
IlimL
Short circuit current
during thermal cycling
TTSD
Shutdown
temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
THYST
VDEMAG
VON
Test conditions
Min.
Typ.
Max.
Unit
VCC= 13V
5V<VCC<36V
28
40
56
56
A
A
VCC= 13V; TR<Tj<TTSD
16
150
175
Output voltage drop
limitation
200
TRS + 1 TRS + 5
°C
°C
135
°C
Thermal hysteresis
(TTSD-TR)
Turn-Off output
voltage clamp
A
7
°C
IOUT= 2A; VIN=0; L=6mH
VCC-41 VCC-46 VCC-52
V
IOUT= 0.2A
Tj= -40°C...150°C
(see Figure 9)
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.
Table 10.
Symbol
Current sense (8V<VCC<16V)
Parameter
Test conditions
KLED
IOUT/ISENSE
IOUT= 0.05A, VSENSE=0.5V,
VCSD=0V
Tj= -40°C...150°C
K0
IOUT/ISENSE
IOUT= 0.5A; VSENSE=0.5V;
VCSD=0V;
Tj= -40°C...150°C
Current Sense ratio
drift
IOUT=0.5 A; VSENSE= 0.5 V;
VCSD=0V;
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT= 2A; VSENSE=4V; VCSD=0V;
Tj= -40°C...150°C
Tj= 25°C...150°C
Current Sense ratio
drift
IOUT=2A; VSENSE= 4V;
VCSD=0V;
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT= 3A; VSENSE=4V; VCSD=0V;
Tj= -40°C...150°C
Tj= 25°C...150°C
dK0/K0(1)
K1
dK1/K1(1)
K2
Min.
Typ.
Max. Unit
1420 3420 5180
2010 3100 4160
-12
12
%
2220 2880 3600
2310 2880 3450
-10
10
%
2380 2870 3400
2490 2870 3250
11/31
Electrical specifications
Table 10.
Current sense (8V<VCC<16V) (continued)
Symbol
Parameter
dK2/K2(1)
Current Sense ratio
drift
IOUT=3 A; VSENSE= 4 V;
VCSD=0V;
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT= 10A; VSENSE=4V; VCSD=0V;
Tj= -40°C...150°C
Tj=25°C...150°C
Current Sense ratio
drift
IOUT= 10 A; VSENSE= 4 V;
VCSD=0V;
TJ= -40 °C to 150 °C
Analog Sense
leakage current
IOUT=0A; VSENSE=0V;
VCSD=5V; VIN=0V;
Tj=-40°C...150°C
VCSD=0V; VIN=5V;
Tj=-40°C...150°C
IOUT=2A; VSENSE=0V;
VCSD=5V; VIN=5V; Tj=-40°C...150°C
K3
dK3/K3(1)
ISENSE0
Test conditions
Min.
Typ.
-7
Max. Unit
7
%
2700 2860 3050
2700 2860 3050
-4
4
%
0
1
µA
0
2
µA
0
1
µA
30
mA
IOL
Openload On state
current detection
threshold
VIN = 5V, ISENSE= 5 µA
5
VSENSE
Max analog Sense
output voltage
IOUT=3A; VCSD=0V
5
VSENSEH
Analog Sense
output voltage in
overtemperature
condition
VCC=13V; RSENSE=3.9KΩ
9
V
ISENSEH
Analog Sense
output current in
overtemperature
condition
VCC=13V; VSENSE=5V
8
mA
V
Delay response time VSENSE<4V, 0.5<Iout<10A
tDSENSE1H from falling edge of ISENSE=90% of ISENSE max
CS_DIS pin
(see Figure 4)
50
100
µs
Delay response time VSENSE<4V, 0.5<Iout<10A
from rising edge of ISENSE=10% of ISENSE max
CS_DIS pin
(see Figure 4)
5
20
µs
Delay response time VSENSE<4V, 0.5<Iout<10A
tDSENSE2H from rising edge of ISENSE=90% of ISENSE max
INPUT pin
(see Figure 4)
70
300
µs
tDSENSE1L
12/31
VN5025AJ-E
VN5025AJ-E
Electrical specifications
Table 10.
Current sense (8V<VCC<16V) (continued)
Symbol
Parameter
Test conditions
∆tDSENSE2H
Delay response time
between rising edge
of output current
and rising edge of
current sense
tDSENSE2L
Delay response time VSENSE<4V, 0.5<Iout<10A
from falling edge of ISENSE=10% of ISENSE max
INPUT pin
(see Figure 4)
Min.
Typ.
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX= 5A (see Figure 5)
100
Max. Unit
130
µs
250
µs
1. Parameter guaranteed by design, it is not tested.
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
Figure 5.
tDSENSE1L
tDSENSE1H
tDSENSE2L
Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
VIN
∆tDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
13/31
Electrical specifications
Figure 6.
VN5025AJ-E
IOUT/ISENSE Vs. IOUT
Iout / Isense
4000
max Tj = -40 °C to 150 °C
3500
max Tj = 25 °C to 150 °C
3000
typical value
min Tj = 25 °C to 150 °C
2500
min Tj = -40 °C to 150 °C
2000
1500
2
3
4
5
6
7
8
9
IOUT (A)
Figure 7.
Maximum current sense ratio drift vs load current- to update
dk/k(%)
15
10
5
0
-5
-10
-15
2
3
4
5
6
IOUT (A)
Note:
14/31
Parameter guaranteed by design; it is not tested.
7
8
9
10
10
VN5025AJ-E
Electrical specifications
Table 11.
Truth table
Input
Output
Sense (VCSD=0V)(1)
L
H
L
H
L
H
L
H
L
H
L
L
L
L
L
L
0
Nominal
0
VSENSEH
0
0
0
0 if Tj < TTSD
Short circuit to VCC
L
H
H
H
0
< Nominal
Negative output voltage
clamp
L
L
0
Conditions
Normal operation
Overtemperature
Undervoltage
Short circuit to GND
(Rsc ≤10 mΩ)
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Figure 8.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
tr
tf
t
INPUT
td(on)
td(off)
t
Figure 9.
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Von/Ron(T)
Iout
15/31
Electrical specifications
Table 12.
VN5025AJ-E
Electrical transient requirements
ISO 7637-2:
2004(E)
Test levels(1)
Test pulse
III
IV
Number of
pulses or
test times
1
-75V
-100V
5000 pulses
0.5 s
5s
2 ms, 10 Ω
2a
+37V
+50V
5000 pulses
0.2 s
5s
50 µs, 2 Ω
3a
-100V
-150V
1h
90 ms
100 ms
0.1 µs, 50 Ω
3b
+75V
+100V
1h
90 ms
100 ms
0.1 µs, 50 Ω
4
-6V
-7V
1 pulse
100 ms, 0.01 Ω
5b(2)
+65V
+87V
1 pulse
400 ms, 2 Ω
Burst cycle/pulse
repetition time
Delays and
impedance
Test level results(1)
ISO 7637-2:
2004(E)
Test pulse
III
IV
1
C
C
2
C
C
3a
C
C
3b
C
C
4
C
C
5(2)
C
C
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2.
16/31
Valid in case of external load dump clamp: 40V maximum referred to ground.
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
VN5025AJ-E
Electrical specifications
Figure 10. Waveforms
NORMAL OPERATION
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
SHORT TO VCC
INPUT
CS_DIS
LOAD VOLTAGE
LOAD CURRENT
SENSE CURRENT
<Nominal
<Nominal
OVERLOAD OPERATION
Tj
TR TTSD
TRS
INPUT
CS_DIS
ILIMH
ILIML
LOAD CURRENT
VSENSEH
SENSE CURRENT
current power
limitation limitation
thermal cycling
SHORTED LOAD
NORMAL LOAD
17/31
Electrical specifications
2.4
VN5025AJ-E
Electrical characteristics curves
Figure 11. Off state output current
Figure 12. High level input current
Iloff (uA)
Iih (uA)
0.9
5
0.8
4.5
Off State
Vcc=13V
Vin=Vout=0V
0.7
Vin=2.1V
4
3.5
0.6
3
0.5
2.5
0.4
2
0.3
1.5
0.2
1
0.1
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
50
75
100
125
150
175
100
125
150
175
150
175
Tc (°C )
Figure 13. Input clamp voltage
Figure 14. Input low level
Vicl (V)
Vil (V)
7
2
6.8
1.8
lin=1mA
6.6
1.6
6.4
1.4
6.2
1.2
6
1
5.8
0.8
5.6
0.6
5.4
0.4
5.2
0.2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
50
75
Tc (°C )
Figure 15. Input high level
Figure 16. Input hysteresis voltage
Vih (V)
Vihyst (V)
4
1
0.9
3.5
0.8
3
0.7
2.5
0.6
0.5
2
0.4
1.5
0.3
1
0.2
0.5
0.1
0
0
-50
-25
0
25
50
75
Tc (°C )
18/31
100
125
150
175
-50
-25
0
25
50
75
Tc (°C )
100
125
VN5025AJ-E
Electrical specifications
Figure 17. On state resistance vs. Tcase
Figure 18. On state resistance vs. VCC
R on (mOhm)
R on (mOhm)
100
80
90
70
Iout=3A
Vcc=13V
80
60
70
50
60
50
40
Tc=150°C
40
30
Tc=125°C
20
Tc=25°C
30
20
Tc=-40°C
10
10
0
0
-50
-25
0
25
50
75
100
125
150
175
0
5
10
15
Tc (°C )
20
25
30
35
40
Vcc (V)
Figure 19. Undervoltage shutdown
Figure 20. Turn- On voltage slope
Vusd (V)
(dVout/dt)on (V/ms)
16
1000
900
14
Vcc=13V
RI=4.3Ohm
800
12
700
10
600
500
8
400
6
300
4
200
2
100
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
50
75
100
125
150
175
150
175
Tc (°C )
Figure 21. ILIMH vs. Tcase
Figure 22. Turn- Off voltage slope
Ilimh (A)
(dVout/dt)off (V/ms)
100
1000
90
900
Vcc=13V
80
Vcc=13V
RI=4.3Ohm
800
70
700
60
600
50
500
40
400
30
300
20
200
10
100
0
0
-50
-25
0
25
50
75
Tc (°C )
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (°C )
19/31
Electrical specifications
VN5025AJ-E
Figure 23. CS_DIS high level voltage
Figure 24. CS_DIS clamp voltage
Vcsdh (V)
Vcsdcl (V)
8
8
7
7.5
6
7
5
6.5
4
6
3
5.5
2
5
1
4.5
Icsd=1mA
0
4
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
Vcsdl (V)
8
7
6
5
4
3
2
1
0
-25
0
25
50
75
Tc (°C )
20/31
-25
0
25
50
75
Tc (°C )
Figure 25. CS_DIS low level voltage
-50
-50
100
125
150
175
100
125
150
175
VN5025AJ-E
3
Application information
Application information
Figure 26. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
µC
Rprot
INPUT
OUTPUT
Rprot
CURRENT SENSE
GND
RSENSE
Cext
VGND
RGND
DGND
3.1
GND protection network against reverse battery
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤600mV / (IS(on)max).
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power Dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
21/31
Application information
3.1.2
VN5025AJ-E
Solution 2: a diode (DGND) in the ground line
A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈ 600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.
-VCCpeak/Ilatchup ≤Rprot ≤(VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤Rprot ≤180kΩ
Recommended values: Rprot =10kΩ, CEXT=10nF.
22/31
VN5025AJ-E
3.4
Application information
Maximum demagnetization energy (VCC = 13.5V)
Figure 27. Maximum turn Off current versus inductance
100
A
B
C
I (A)
10
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
23/31
Package and PC board thermal data
VN5025AJ-E
4
Package and PC board thermal data
4.1
PowerSSO-12TM thermal data
Figure 28. PowerSSO-12TM PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70µm (front and back side),
Copper areas: from minimum pad lay-out to 8cm2).
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition
RTHj_amb(°C/W)
65
60
55
50
45
40
35
30
0
2
4
6
PCB Cu heatsink area (cm^2)
24/31
8
10
VN5025AJ-E
Package and PC board thermal data
Figure 30. PowerSSO-12TM thermal impedance junction ambient single pulse
ZTH (°C/W)
100
Footprint
2 cm2
8 cm2
10
1
0,1
0,0001
0,001
0,01
0,1
1
Time (s)
10
100
1000
Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-12TM
Equation 1: pulse calculation formula:
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ)
where δ = t p ⁄ T
25/31
Package and PC board thermal data
Table 13.
26/31
VN5025AJ-E
Thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
0.3
R2 (°C/W)
1.3
R3 (°C/W)
4
R4 (°C/W)
2
8
8
8
7
R5 (°C/W)
22
15
10
R6 (°C/W)
26
20
15
C1 (W.s/°C)
0.001
C2 (W.s/°C)
0.003
C3 (W.s/°C)
0.05
C4 (W.s/°C)
0.2
0.1
0.1
C5 (W.s/°C)
0.27
0.8
1
C6 (W.s/°C)
3
6
9
VN5025AJ-E
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of Second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.
5.2
PowerSSO-12™ mechanical data
Figure 32. PowerSSO-12™ package dimensions
27/31
Package and packing information
VN5025AJ-E
PowerSSO-12TM mechanical data
Table 14.
Millimeters
Dimension
Min.
Max.
A
1.250
1.620
A1
0.000
0.100
A2
1.100
1.650
B
0.230
0.410
C
0.190
0.250
D
4.800
5.000
E
3.800
4.000
e
0.800
H
5.800
6.200
h
0.250
0.500
L
0.400
1.270
k
0º
8º
X
1.900
2.500
Y
3.600
4.200
ddd
28/31
Typ.
0.100
VN5025AJ-E
5.3
Package and packing information
Packing information
Figure 33. PowerSSO-12TM tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
1.85
6.75
0.6
All dimensions are in mm.
Figure 34. PowerSSO-12TM tape and reel shipment (suffix “TR”
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
29/31
Revision history
6
VN5025AJ-E
Revision history
Table 15.
Document revision history
Date
Revision
12th-Jan-2004
1
Initial release.
17th-May-2006
2
Second release.
3
Added Contents, List of tables and List of figures.
Added Section 3.4: Maximum demagnetization energy
(VCC = 13.5V) .
Added ECOPACK® package information.
13-Dec-2007
4
Document reformatted and restructured.
Table 4: Absolute maximum ratings : corrected EMAX value from 90
to 140 mJ.
Added Figure 5: Delay response time between rising edge of ouput
current and rising edge of current sense (CS enabled).
Updated Figure 6: IOUT/ISENSE Vs. IOUT.
Added Figure 7: Maximum current sense ratio drift vs load current- to
update.
Table 10: Current sense (8V<VCC<16V) :
– added dk0/k0, dk1/k1, dk2/k2, dk3/k3, ∆tDSENSE2H , IOL
parameters.
Table 12: Electrical transient requirements : updated test level values
III and IV for test pulse 5b and notes.
Section 4.1: PowerSSO-12TM thermal data:
– changed Figure 29: Rthj-amb Vs. PCB copper area in open box
free air condition.
– changed Figure 30: PowerSSO-12TM thermal impedance junction
ambient single pulse.
– Figure 31: Thermal fitting model of a single channel HSD in
PowerSSO-12TM: added note.
– updated Table 13: Thermal parameter:
changed R1 value from 0.28 to 0.3 °C/W.
changed R2 value from 0.9 to 1.3 °C/W.
changed R3 value from 7 to 4 °C/W.
changed R4 values from 10/ 10/ 9 to 8/ 8/ 7 °C/W.
12-Feb-2008
5
Corrected typing error in Table 10: Current sense (8V<VCC<16V) :
changed IOL test condition from VIN = 0V to VIN = 5V.
1st-Mar-2007
30/31
Changes
VN5025AJ-E
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31/31