STMICROELECTRONICS TDA7491MV

TDA7491MV
25 W mono BTL class-D audio amplifier
Features
„
20 W continuous output power:
RL = 8 Ω, THD = 10% at VCC = 18 V
„
25 W continuous output power:
RL = 6 Ω, THD = 10% at VCC = 16 V
„
Wide range single supply operation (5 V - 18 V)
„
High efficiency (η = 90%)
„
Four selectable, fixed gain settings of
nominally 20 dB, 26 dB, 30 dB and 32 dB
„
Differential inputs minimize common-mode
noise
„
Filterless operation
„
No ‘pop’ at turn-on/off
„
Standby and mute features
„
Short-circuit protection
„
Thermal overload protection
„
Externally synchronizable
PowerSSO-36 with
exposed pad down
Description
The TDA7491MV is a mono BTL class-D audio
amplifier with single power supply designed for
LCD TVs and monitors.
Thanks to the high efficiency and an
exposed-pad-down (EPD) package no heatsink is
required.
Furthermore, the filterless operation allows a
reduction in the external component count.
The TDA7491MV is pin to pin compatible with the
TDA7491P, TDA7491LP and TDA7491HV for the
left channel as given in Section 6.1 on page 19.
Table 1.
Device summary
Order code
Operating temp. range
Package
Packaging
TDA7491MV
0 to 70 °C
PowerSSO-36 EPD
Tube
TDA7491MV13TR
0 to 70 °C
PowerSSO-36 EPD
Tape and reel
May 2009
Doc ID 14576 Rev 2
1/28
www.st.com
28
Contents
TDA7491MV
Contents
1
Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
2.1
Pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2
Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1
Test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6
Applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.1
7
8
2/28
Compatibility with TDA7491 stereo BTL family . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1
Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.2
Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.3
Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.4
Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.4.1
Master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.4.2
Slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.5
Filterless modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.6
Output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.7
Protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.8
Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.9
Heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Doc ID 14576 Rev 2
TDA7491MV
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
PowerSSO-36 slug down dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
How to set up SYNCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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3/28
List of figures
TDA7491MV
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
4/28
Internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin connection (top view, PCB view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
THD vs output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
THD vs output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
THD vs Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Frequency Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Closed-loop gain vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Power dissipation and efficiency vs output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Attenuation vs mute voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Current consumption vs voltage on pin STBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Attenuation vs voltage on pin STBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Power supply rejection ratio vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Test board (TDA7491HV) layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PowerSSO-36 slug down outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Applications circuit for class-D amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-on/off sequence for minimizing speaker “pop” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Unipolar PWM output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Typical LC filter for a 8-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Typical LC filter for a 4-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Behavior of pin DIAG for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Power derating curves for PCB used as heatsink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 14576 Rev 2
TDA7491MV
1
Device block diagram
Device block diagram
Figure 1 shows the block diagram of the TDA7491MV.
Figure 1.
Internal block diagram
Doc ID 14576 Rev 2
5/28
Pin description
TDA7491MV
2
Pin description
2.1
Pin out
Figure 2.
Pin connection (top view, PCB view)
SUB_GND
1
36
VSS
NC
2
35
SVCC
NC
3
34
VREF
NC
4
33
SGND
NC
5
32
VDDS
NC
6
31
GAIN1
NC
7
30
GAIN0
NC
8
29
SVR
9
28
DIAG
OUTN
10
27
SGND
OUTN
11
26
VDDS
PVCC
12
25
SYNCLK
PVCC
13
24
ROSC
23
INN
NC
6/28
Exposed pad down
PGND
14
PGND
15
22
INP
OUTP
16
21
MUTE
OUTP
17
20
STBY
PGND
18
19
VDDPW
Doc ID 14576 Rev 2
TDA7491MV
2.2
Pin description
Pin list
Table 2.
Pin description list
Number
Name
Type
Description
1
SUB_GND
POWER
Connect to the frame
2,3
NC
-
No internal connection
4,5
NC
-
No internal connection
6,7
NC
-
No internal connection
8,9
NC
-
No internal connection
10,11
OUTN
OUT
Negative PWM output
12,13
PVCC
POWER
Power supply
14,15
PGND
POWER
Power stage ground
16,17
OUTP
OUT
Positive PWM output
18
PGND
POWER
Power stage ground
19
VDDPW
OUT
3.3 V (nominal) regulator output referred to ground for power
stage
20
STBY
INPUT
Standby mode control
21
MUTE
INPUT
Mute mode control
22
INP
INPUT
Positive differential input
23
INN
INPUT
Negative differential input
24
ROSC
OUT
Master oscillator frequency-setting pin
25
SYNCLCK
IN/OUT
Clock in/out for external oscillator
26
VDDS
OUT
3.3 V (nominal) regulator output referred to ground for signal
blocks
27
SGND
POWER
Signal ground
28
DIAG
OUT
Open-drain diagnostic output
29
SVR
OUT
Supply voltage rejection
30
GAIN0
INPUT
Gain setting input 1
31
GAIN1
INPUT
Gain setting input 2
32
VDDS
POWER
To be connected to VDDS (pin 26)
33
SGND
POWER
Signal ground
34
VREF
OUT
Half VDDS (nominal) referred to ground
35
SVCC
POWER
Signal power supply
36
VSS
OUT
3.3 V (nominal) regulator output referred to power supply
Doc ID 14576 Rev 2
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Electrical specifications
TDA7491MV
3
Electrical specifications
3.1
Absolute maximum ratings
Table 3.
Absolute maximum ratings
Symbol
3.2
Parameter
Value
Unit
VCC
DC supply voltage for pins PVCCA, PVCCB, SVCC
24
V
Top
Operating temperature
0 to 70
°C
Tj
Junction temperature
-40 to 150
°C
Tstg
Storage temperature
-40 to 150
°C
Thermal data
Table 4.
Thermal data
Symbol
Parameter
Min
Typ
Max
Rth j-case
Thermal resistance, junction to case
-
2
3
Rth j-amb
Thermal resistance, junction to ambient
(mounted on recommended PCB)(1)
-
24
-
Unit
°C/W
1. FR4 with vias to copper area of 9 cm2 (see also Section 7.9: Heatsink requirements on page 26).
3.3
Electrical specifications
Unless otherwise stated, the results in Table 5 below are given for the conditions:
VCC = 18 V, RL (load) = 8 Ω, ROSC = R3 = 39 kΩ, C8 = 100 nF, f = 1 kHz, GV = 20 dB, and
Tamb = 25 °C.
Table 5.
Symbol
8/28
Electrical specifications
Parameter
Condition
Min
Typ
Max
Unit
VCC
Supply voltage for
pins PVCC, SVCC
-
5
-
18
V
Iq
Total quiescent
Without LC filter
-
26
35
mA
IqSTBY
Quiescent current in standby
-
-
2.5
5.0
µA
VOS
Output offset voltage
Play mode
-150
-
150
mV
VOS
Output offset voltage
Mute mode
-60
-
60
mV
IOCP
Overcurrent protection threshold RL = 0 Ω
3
5
-
A
Tj
Junction temperature at thermal
shut-down
-
-
150
-
°C
Ri
Input resistance
Differential input
55
60
-
kΩ
VOVP
Overvoltage protection threshold -
19
21
-
V
Doc ID 14576 Rev 2
TDA7491MV
Electrical specifications
Table 5.
Electrical specifications (continued)
Symbol
Parameter
VUVP
Undervoltage protection
threshold
RdsON
Power transistor on resistance
Po
Output power
Po
Po
Condition
Min
Typ
Max
-
-
-
4
High side
-
0.2
-
Low side
-
0.2
-
THD = 10%
-
20
-
THD = 1%
-
16
-
RL = 8 Ω, THD = 10%
VCC = 12 V
-
9.5
-
RL = 8 Ω, THD = 1%
VCC = 12 V
-
7.2
-
RL = 6 Ω, THD = 10%
VCC = 16 V
-
20
-
RL = 6 Ω, THD = 1%
VCC = 16 V
-
16
-
Unit
V
Ω
W
Output power
Output power
W
W
PD
Dissipated power
Po = 20 W THD = 10%
-
2.0
-
W
η
Efficiency
Po = 20 W
80
90
-
%
THD
Total harmonic distortion
Po = 1 W
-
0.1
0.2
%
GAIN0 = L, GAIN1 = L
18
20
22
GAIN0 = L, GAIN1 = H
24
26
28
GAIN0 = H, GAIN1 = L
28
30
32
GAIN0 = H, GAIN1 = H
30
32
34
-
-1
-
1
A Curve, GV = 20 dB
-
20
-
f = 22 Hz to 22 kHz
-
25
35
GV
Closed loop gain
∆GV
Gain matching
eN
Total input noise
dB
dB
µV
SVRR
Supply voltage rejection ratio
fr = 100 Hz, Vr = 0.5 V,
CSVR = 10 µF
40
50
-
dB
Tr, Tf
Rise and fall times
-
-
50
-
ns
fSW
Switching frequency
Internal oscillator
290
310
330
kHz
250
-
-
With external oscillator (2) 250
-
-
2.3
-
-
-
-
0.8
60
80
-
With internal oscillator
fSWR
Output switching frequency
VinH
Digital input high (H)
VinL
Digital input low (L)
AMUTE
Mute attenuation
(1)
kHz
VMUTE = 1 V
Doc ID 14576 Rev 2
V
dB
9/28
Electrical specifications
Table 5.
Symbol
TDA7491MV
Electrical specifications (continued)
Parameter
Condition
Function
Standby, mute and play modes
mode
Min
Typ
Unit
VSTBY < 0.5 V, VMUTE = X Standby
-
VSTBY > 2.5 V,
VMUTE < 0.8 V
Mute
-
VSTBY > 2.5 V,
VMUTE > 2.5 V
Play
-
1. fSW = 106 / ((16 * ROSC + 182) * 4) kHz, fSYNCLK = 2 * fSW with R3 = 39 kΩ (see Figure 18.)
2. fSW = fSYNCLK / 2 with the frequency of the external oscillator.
10/28
Max
Doc ID 14576 Rev 2
TDA7491MV
Characterization curves
The following characterization curves were made using the TDA7491MV demo board. The
LC filter for the 8-Ω load uses components of 33 µH and 220 nF.
All other test conditions are given along side the corresponding curves.
Figure 3.
Output power vs supply voltage
Output Power vs. Supply Voltage(8 ohm)
Test Condition :
Vcc = 5~18V,
RL = 8 ohm,
Rosc =39kO, Cosc =100nF,
Output Power (W)
4
Characterization curves
f =1kHz,
Gv =30dB,
Tamb =25℃
Specification Limit:
Typical:
Vs =18V,Rl = 8 ohm
Po =20W @THD =10%
22
20
18
16
14
12
10
8
6
4
2
0
Po =16W @THD =1%
Figure 4.
THD =10%
Rl =8 ohm
f =1kHz
THD =1%
5
6
7
8
9 10 11 12 13 14 15 16 17 18
Supply Voltage (V)
THD vs output power (1 kHz)
THD (%)
10
Test Condition:
5
Vcc =18V,
2
RL= 8 ohm,
Rosc =39kΩ, Cosc =100nF,
1
0.5
f =1kHz,
Gv =30dB,
0.2
Tamb =25℃
0.1
0.05
Specification Limit:
0.02
Typical:
Po =20W @ THD =10%
0.01
0.005
100m
200m
500m
1
2
5
10
20
30
Output Power (W)
Doc ID 14576 Rev 2
11/28
Characterization curves
Figure 5.
TDA7491MV
THD vs output power (100 Hz)
THD (%)
10
5
Test Condition:
Vcc =18V,
2
RL= 8 ohm,
1
Rosc =39kΩ, Cosc =100nF,
0.5
f =100Hz,
0.2
Gv =30dB,
Tamb =25℃
0.1
0.05
Specification Limit:
0.02
Typical:
0.01
Po =20W @ THD =10%
0.005
100m
200m
500m
1
2
5
10
20
Output Power (W)
Figure 6.
THD vs Frequency
THD (%)
1
Test Condition:
Vcc =18V,
0.5
RL= 8 ohm,
Rosc =39kΩ, Cosc =100nF,
0.2
f =1kHz,
Gv =30dB,
0.1
Po =1W
Tamb =25℃
0.05
0.02
Specification Limit:
Typical: THD<0.5%
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Figure 7.
Frequency Response
Ampl (dB)
+2
Test Condition:
Vcc =18V,
+1
RL= 8 ohm,
Rosc =39kΩ, Cosc =100nF,
f =1kHz,
Gv =30dB,
Po =1W
-0
-1
-2
Tamb =25℃
-3
Specification Limit:
Max: +/-3dB
@20Hz to 20kHz
-4
-5
10
20
50
100
200
500
1k
2k
Frequency (Hz)
12/28
Doc ID 14576 Rev 2
5k
10k
30k
30
TDA7491MV
Characterization curves
Figure 8.
FFT (0 dB)
FFT (dB)
+10
+0
Test Condition:
-10
Vcc =18V,
-20
RL= 8 ohm,
-30
Rosc =39kΩ, Cosc =100nF,
-40
-50
f = 1kHz,
-60
Gv =30dB,
-70
Po =1W
-80
-90
Tamb =25℃
-100
-110
Specification Limit:
-120
Typical: >60dB
-130
for the harmonic frequency
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
2k
5k
10k
20k
Frequency (Hz)
Figure 9.
FFT (-60 dB)
FFT (dB)
+0
-10
Test Condition:
-20
Vcc =18V,
-30
RL= 8 ohm,
-40
Rosc =39kΩ, Cosc =100nF,
-50
f =1kHz,
-60
Gv =30dB,
-70
Po = -60dB (@ 1W =0dB)
Tamb =25℃
-80
-90
-100
-110
Specification Limit:
-120
Typical: > 90dB
-130
for the harmonic frequency
-140
-150
20
50
100
200
500
1k
Frequency (Hz)
Figure 10. Closed-loop gain vs frequency
Test Condition :
+0. 5
Gain=32dB
Vcc = 18V,
-0
RL = 8 ohm,
-0. 5
Gain=22dB
Rosc =39kO, Cosc =100nF,
[email protected]=1kHz, Po=1w,
Gv=32dB,
Tamb =25℃
-1
Gain=26dB
-1. 5
d
B
r
A
Gain=30dB
-2
Vcc=18V,
-2. 5
Rload=8ohm,
-3
[email protected]=1kHz, Po=1w,
Gv=32dB
-3. 5
-4
-4.5
-5
20
50
100
200
500
1k
2k
5k
10k
20k
30k
Hz
TDA7491MV 8ohm Closed-loop gain vs Freq
.at27
Doc ID 14576 Rev 2
13/28
Characterization curves
TDA7491MV
Figure 11. Power dissipation and efficiency vs output power
Vcc = 18V,
RL = 8 ohm,
Rosc =39kO, Cosc =100nF,
Gv =30dB,
Tamb =25℃
4
80
3.5
70
Efficiency (%)
f =1kHz,
90
3
60
2.5
50
40
Vcc=18V
30
Rload=8ohm
2
1.5
1
Gain=30dB
20
f=1kHz
0.5
10
0
0
5
10
15
Output power per channel (W)
20
Dissipation Power (W)
Power dissipation & Efficiency vs Output power
Test Condition :
0
Figure 12. Attenuation vs mute voltage
Attenuation vs Mute voltage
Test Condition :
Vcc = 18V,
RL = 8 ohm,
[email protected] =1kHz, Po=1w
Gv =30dB,
Tamb =25℃
Attenuation (dB)
Rosc =39kO, Cosc =100nF,
10
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
Vcc=18V
Rload=8ohm
Gain=30dB
[email protected]=1kHz,Po=1w
0
0.5
1
1.5
2
Mute voltage (V)
2.5
3
3.5
2.5
3
3.5
Figure 13. Current consumption vs voltage on pin STBY
Iquiescent vs Standby voltage
Test Condition :
Vcc = 18V,
30
RL = 8 ohm,
25
Vin=0,
Gv =30dB,
Tamb =25℃
Iquiescent (mA)
Rosc =39kO, Cosc =100nF,
Vcc=18V
20
Rload=8ohm
Gain=30dB
15
Vin=0
10
5
0
14/28
0
0.5
1
Doc ID 14576 Rev 2
1.5
2
Standby voltage (V)
TDA7491MV
Characterization curves
Figure 14. Attenuation vs voltage on pin STBY
Attenuation vs Standby voltage
Test Condition :
Vcc = 5~18V,
RL = 8 ohm,
[email protected]=1kHz, Po=1w,
Gv =30dB,
Tamb =25℃
Attenuation (dB)
Rosc =39kO, Cosc =100nF,
10
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
Vcc=18V
Rload=8ohm
Gain=30dB
[email protected]=1kHz,Po=1W
0
0.5
1
1.5
2
Standby voltage (V)
2.5
3
3.5
Figure 15. Power supply rejection ratio vs frequency
+0
Test Condition :
T
-10
Vcc = 18V,
-20
RL = 8 ohm,
Rosc =39kO, Cosc =100nF,
Ripple frequency=100Hz
-30
Vin=0,
Gv =30dB,
Tamb =25℃
Ripple voltage=500mV
-40
d
B
r
A
-50
-60
-70
-80
-90
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Doc ID 14576 Rev 2
15/28
Characterization curves
4.1
TDA7491MV
Test board
Figure 16. Test board (TDA7491HV) layout
16/28
Doc ID 14576 Rev 2
TDA7491MV
Package mechanical data
The TDA7491MV comes in a 36-pin PowerSSO package with exposed pad down.
Figure 17 below shows the package outline and Table 6 gives the dimensions.
Figure 17. PowerSSO-36 EPD outline drawing
h x 45°
5
Package mechanical data
Doc ID 14576 Rev 2
17/28
Package mechanical data
Table 6.
TDA7491MV
PowerSSO-36 EPD dimensions
Dimensions in mm
Dimensions in inches
Symbol
Min
Typ
Max
Min
Typ
Max
A
2.15
-
2.47
0.085
-
0.097
A2
2.15
-
2.40
0.085
-
0.094
a1
0.00
-
0.10
0.000
-
0.004
b
0.18
-
0.36
0.007
-
0.014
c
0.23
-
0.32
0.009
-
0.013
D
10.10
-
10.50
0.398
-
0.413
E
7.40
-
7.60
0.291
-
0.299
e
-
0.5
-
-
0.020
-
e3
-
8.5
-
-
0.335
-
F
-
2.3
-
-
0.091
-
G
-
-
0.10
-
-
0.004
H
10.10
-
10.50
0.398
-
0.413
h
-
-
0.40
-
-
0.016
k
0
-
8 degrees
0
-
8 degrees
L
0.60
-
1.00
0.024
-
0.039
M
-
4.30
-
-
0.169
-
N
-
-
10 degrees
-
-
10 degrees
O
-
1.20
-
-
0.047
-
Q
-
0.80
-
-
0.031
-
S
-
2.90
-
-
0.114
-
T
-
3.65
-
-
0.144
-
U
-
1.00
-
-
0.039
-
X
4.10
-
4.70
0.161
-
0.185
Y
6.50
-
7.10
0.256
-
0.280
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
18/28
Doc ID 14576 Rev 2
TDA7491MV
6
Applications circuit
Applications circuit
Figure 18. Applications circuit for class-D amplifier
TDA7491MV
6.1
Input settings for gain:
Input settings for standby, mute and play:
GAIN0 : GAIN1
Nominal gain
STBY : MUTE
Mode
0V:0V
0 V : 3.3 V
3.3 V : 0 V
3.3 V : 3.3 V
20 dB
26 dB
30 dB
32 dB
0V:0V
0 V : 3.3 V
3.3 V : 0 V
3.3 V : 3.3 V
Standby
Standby
Mute
Play
Compatibility with TDA7491 stereo BTL family
TDA7491MV mono BTL analog class-D amplifier is derived from the TDA7491 stereo
analog class-D BTL family. TDA7491MV has only the left channel of the stereo BTL family.
In order to guarantee the pin to pin compatibility when moving the application from stereo to
mono, it is necessary to connect the right channel inputs (pins 32 and 33 of TDA7491 BTL
family) to VCC and GND, that is, pin 32 to VDDS and pin 33 to SGND.
Doc ID 14576 Rev 2
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Application information
TDA7491MV
7
Application information
7.1
Mode selection
The three operating modes of the TDA7491MV are set by the two inputs STBY (pin 20) and
MUTE (pin 21).
z
Standby mode: all circuits are turned off, very low current consumption.
z
Mute mode: inputs are connected to ground and the positive and negative PWM
outputs are at 50% duty cycle.
z
Play mode: the amplifiers are active.
The protection functions of the TDA7491MV are realized by pulling down the voltages of the
STBY and MUTE inputs shown in Figure 19. The input current of the corresponding pins
must be limited to 200 µA.
Table 7.
Mode settings
Mode Selection
STBY
MUTE
L (1)
Standby
Mute
H
Play
H
X (don’t care)
(1)
L
H
1. Drive levels defined in Table 5: Electrical specifications on page 8
Figure 19. Standby and mute circuits
Standby
STBY
3.3 V
0V
R2
30 kΩ
C7
2.2 µF
R4
30 kΩ
C15
2.2 µF
Mute
MUTE
3.3 V
0V
TDA7491MV
Figure 20. Turn-on/off sequence for minimizing speaker “pop”
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Doc ID 14576 Rev 2
TDA7491MV
7.2
Application information
Gain setting
The gain of the TDA7491MV is set by the two inputs, GAIN0 (pin 30) and GAIN1 (pin 31).
Internally, the gain is set by changing the feedback resistors of the amplifier.
Table 8.
Gain settings
GAIN0
7.3
GAIN1
Nominal gain, Gv (dB)
0
0
20
0
1
26
1
0
30
1
1
32
Input resistance and capacitance
The input impedance is set by an internal resistor Ri = 60 kΩ (typical). An input capacitor
(Ci) is required to couple the AC input signal.
The equivalent circuit and frequency response of the input components are shown in
Figure 21. For Ci = 220 nF the high-pass filter cut-off frequency is below 20 Hz:
fc = 1 / (2 * π * Ri * Ci)
Figure 21. Device input circuit and frequency response
Rf
Input
signal
Ci
Input
pin
Ri
Doc ID 14576 Rev 2
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Application information
7.4
TDA7491MV
Internal and external clocks
The clock of the class-D amplifier can be generated internally or can be driven by an
external source.
If two or more class-D amplifiers are used in the same system, it is recommended that all
devices operate at the same clock frequency. This can be implemented by using one
TDA7491MV as master clock, while the other devices are in slave mode (that is, externally
clocked. The clock interconnect is via pin SYNCLK of each device. As explained below,
SYNCLK is an output in master mode and an input in slave mode.
7.4.1
Master mode (internal clock)
Using the internal oscillator, the output switching frequency, fSW, is controlled by the
resistor, ROSC, connected to pin ROSC:
fSW = 106 / ((16 * ROSC + 182) * 4) kHz
where ROSC is in kΩ.
In master mode, pin SYNCLK is used as a clock output pin, whose frequency is:
fSYNCLK = 2 * fSW
For master mode to operate correctly then resistor ROSC must be less than 60 kΩ as given
below in Table 9.
7.4.2
Slave mode (external clock)
In order to accept an external clock input the pin ROSC must be left open, that is, floating.
This forces pin SYNCLK to be internally configured as an input as given in Table 9.
The output switching frequency of the slave devices is:
fSW = fSYNCLK / 2
Table 9.
How to set up SYNCLK
Mode
ROSC
SYNCLK
Master
ROSC < 60 kΩ
Output
Slave
Floating (not connected)
Input
Figure 22. Master and slave connection
Master
Slave
TDA7491MV
ROSC
TDA7491MV
SYNCLK
Output
Cosc
100 nF
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Rosc
39 kΩ
Doc ID 14576 Rev 2
SYNCLK
Input
ROSC
TDA7491MV
7.5
Application information
Filterless modulation
The output modulation scheme of the BTL is called unipolar pulse width modulation (PWM).
The differential output voltages change between 0 V and +VCC and between 0 V and -VCC.
This is in contrast to the traditional bipolar PWM outputs which change between +VCC
and -VCC.
An advantage of this scheme is that it effectively doubles the switching frequency of the
differential output waveform. The OUTP and OUTN are in the same phase when the input is
zero, then the switching current is low and the loss in the load is small. In practice, a short
delay is introduced between these two outputs in order to avoid the BTL output switching at
the same time.
TDA7491MV can be used without a filter before the speaker, because the frequency of the
TDA7491MV output is beyond the audio frequency, the audio signal can be recovered by the
inherent inductance of the speaker and natural filter of the human ear.
Figure 23. Unipolar PWM output
INP
INN
OUTP
OUTN
Differential
OUT
Doc ID 14576 Rev 2
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Application information
7.6
TDA7491MV
Output low-pass filter
To avoid EMI problems, it may be necessary to use a low-pass filter before the speaker. The
cutoff frequency should be larger than 22 kHz and much lower than the output switching
frequency. It is necessary to choose the L-C component values depending on the loud
speaker impedance. Some typical values, which give a cut-off frequency of 27 kHz, are
shown in Figure 24 and Figure 25 below.
Figure 24. Typical LC filter for a 8-Ω speaker
Figure 25. Typical LC filter for a 4-Ω speaker
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Doc ID 14576 Rev 2
TDA7491MV
7.7
Application information
Protection function
The TDA7491MV is fully protected against overvoltages, undervoltages, overcurrents and
thermal overloads as explained here.
Overvoltage protection (OVP)
If the supply voltage exceeds the value for VOVP given in Table 5: Electrical specifications on
page 8 the overvoltage protection is activated which forces the outputs to the
high-impedance state. When the supply voltage drops to below the threshold value the
device restarts.
Undervoltage protection (UVP)
If the supply voltage drops below the value for VUVP given in Table 5: Electrical
specifications on page 8 the undervoltage protection is activated which forces the outputs to
the high-impedance state. When the supply voltage recovers the device restarts.
Overcurrent protection (OCP)
If the output current exceeds the value for IOCP given in Table 5: Electrical specifications on
page 8 the overcurrent protection is activated which forces the outputs to the
high-impedance state. Periodically, the device attempts to restart. If the overcurrent
condition is still present then the OCP remains active. The restart time, TOC, is determined
by the R-C components connected to pin STBY.
Thermal protection (OTP)
If the junction temperature, Tj, reaches 145 °C (nominal), the device goes to mute mode and
the positive and negative PWM outputs are forced to 50% duty cycle. If the junction
temperature exceeds the value for Tj given in Table 5: Electrical specifications on page 8 the
device shuts down and the output is forced to the high impedance state. When the device
cools sufficiently the device restarts.
7.8
Diagnostic output
The output pin DIAG is an open drain transistor. When the protection is activated it is in the
high-impedance state. The pin can be connected to a power supply (< 18 V) by a pull-up
resistor whose value is limited by the maximum sinking current (200 µA) of the pin.
Figure 26. Behavior of pin DIAG for various protection conditions
VDD
TDA7491MV
R1
DIAG
Protection logic
VDD
Restart
Restart
Overcurrent
protection
OV, UV, OT
protection
Doc ID 14576 Rev 2
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Application information
7.9
TDA7491MV
Heatsink requirements
A thermal resistance of 24 °C/W can be obtained using the PCB copper ground layer with
16 vias connecting it to the contact area for the exposed pad. Ensure that the copper ground
area is a nominal 9 cm2 for 24 °C/W.
Figure 27 shows the derating curves for copper areas of 4 cm2 and 9 cm2.
As with most amplifiers, the power dissipated within the device depends primarily on the
supply voltage, the load impedance and the output modulation level.
The maximum estimated power dissipation for the TDA7491MV is less than 4 W. When
properly mounted on the above PCB the junction temperature could increase by 96 °C.
However, with a musical program the dissipated power is about 40% less, leading to a
temperature increase of around 60 °C. Even at the maximum recommended ambient
temperature for consumer applications of 50 °C there is still a clear safety margin before the
maximum junction temperature (150 °C) is reached.
Figure 27. Power derating curves for PCB usedgas heatsink
Pd (W)
8
7
Copper Area 3x3 cm
and via holes
6
5
TDA7491MV
TDA7491P
PowerSSO-36
PSSO36
4
3
Copper Area 2x2 cm
and via holes
2
1
0
0
20
40
60
80
Tamb ( °C)
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Doc ID 14576 Rev 2
100
120
140
160
TDA7491MV
8
Revision history
Revision history
Table 10.
Document revision history
Date
Revision
21-Oct-2008
1
Initial release.
2
Updated text concerning oscillator R and C in Section 3.3:
Electrical specifications on page 8
Updated test condition for Iq, added VUVP, updated STBY and
MUTE voltages and rectified several anomalies in Table 5:
Electrical specifications on page 8
Updated equation for fSW on page 10 and on page 22
Updated Figure 16: Test board (TDA7491HV) layout on page 16
Updated Figure 17: PowerSSO-36 EPD outline drawing on
page 17 and Table 6: PowerSSO-36 EPD dimensions on
page 18
Updated Figure 18: Applications circuit for class-D amplifier on
page 19
29-May-2009
Changes
Doc ID 14576 Rev 2
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TDA7491MV
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