EXAR XRT7296

XRT7296
+ *
APPLICATIONS
FEATURES
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GENERAL DESCRIPTION
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3+ +- 1,1 A+ /+ 1 / / / 3 + +
/ .+ , , 1 / 49 '( :4 '( /
.,/ . 3 1 + / +- / //, + /+, 1 /1
. / / + . A+ +
/ 41 / / .,/ / 3
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/, . D / (
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,+ 1 //,- + ++>, A+ / . + >,+B 1 /*// + $ - ++
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ORDERING INFORMATION
Part No.
Package
Operating
Temperature Range
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0
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XRT7296
BLOCK DIAGRAM
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7=
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0
7
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#
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49:4
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0,+
1 @0
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7
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49:4
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75
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Figure 1. XRT7296 Block Diagram
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0
75
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40<
79
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75
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#=
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XRT7296
PIN CONFIGURATION
#
==0
==0
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0
7
#
57
7=
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79
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7
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75
57
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75
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7
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57
7=
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40<
79
28 Lead PDIP (0.600”)
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57
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75
28 Lead SOJ (Jedec, 0.300”)
PIN DESCRIPTION
Pin #
Symbol
Type
Description
#
Receive Clock Input. , + /+/; . 0 7
==0
Remote Loop Back. 11 1 /, 0 7 1
+ , # ==0 ==0 11 ,+,+- ==0
Local Loop Back. 11 1 /, 0 7 1,1 1 *
/ , , 0= 75 /+- ==0 ==0 11 ,+*
,+- *
DS3, STS-1 or E3 Select Pin 11 1 +/ * 1
/ / 49 +2 +/ 1 / / :4 &
=
Transmit All Ones Select 11 1 /, /,, @
++ E 3
1 + 1 .>,/- 3- #
)
<
"
0
Transmit Positive Data 0 + 1 .++ . # 0 " !
/ 3 1 . 3- , +
!
7
Transmit Negative Data. 7 + 1 .++ . # 0 " / 3 1 . 3- , +
Transmit Clock . 0 7
5 V Digital Supply '± &F( . ++ +/ //,-
!
%
#
57
7=
Encoder Disable. 11 1 3+ 49 :4 / .,/ ,+ *
3- = >, 1 , 3 11 . 0 7 +- *
/
=
Decoder Disable 11 1 3+ 49 :4 / .,/
Digital Ground . ++ +/ //,-
XRT7296
PIN DESCRIPTION (CONT’D)
Pin #
Symbol
Type
Description
40<
=
Bipolar Violation Output 1 11 . 3 21 3 + + / 1 / ,+ / / 1 0
7 +
79
=
Receive Binary Data. + 1 1 =*, , . 0= 75
&
75
=
Receive Negative Data. 1 + 1 / . 7
)
0=
=
Receive Positive Data 1 + 1 / . 0
"
#=
=
Receive Clock Output 1 + 1 . #
!
@=
=
Driver Monitor Output. . @
+ @
0 @
75 .
!±
# /+/; @= 11 ,+ 1 A @
+ /
%
@
75
Monitor Ring Input @
+ . 75 / 3 // 1 . + .+*
, / ++- ,++ 11
@
0
Monitor Tip Input @
+ . 0 / 3 // 1 . + .+,
/ ++- ,++ 11
57
75
=
Transmit Ring Output @
+ 1 + G . .
1 0
=
Transmit Tip Output. @
+ 1 + G . . 1
<
*
5V Analog Supply (± 5%) . + //,-
&
<
Analog Ground . + //,-
Transmit Level Select. 1 , 1 , /., 1 1 1 , , + +, . , /3+ +
1 , , + +, 0 75 / 3 3- 1 H11H H+2H 1 ,+ . A< H11H H+2H 3+2
81 1 /3+ +1 + 1 . A< , 3 H+2H ' 1
,+ + /./(
81 1 /3+ +1 1 . + 1 & . A< - 3 H11H 1 , , ,+ . 1 "%) / 2++ 1 ,+
+ /./ >,
81 1 /3+ +1 1 & . 1 A< , 3 H11H ' 1 ,+ + /./(
Note: This input pin is only active, for DS3 and STS•1 applications.
)
In-circuit Testing. +2 1 /, ++ + + , , 11**
/ ++2 . *//, ++- ,++ 11
"
0
Receive Positive Data 79 , 1 / 3+/; + 1 .++ .
#
!
7
Receive Negative Data 79 , . 1 / 3+/; + .++ .
#
Note
1 If a bipolar violation occurs, RPOS and RNEG can correspond to the decoded versions of RNDATA and RPDATA respectively. If
DECODIS is high, RPOS and RNEG always track RPDATA and RNDATA respectively.
XRT7296
ELECTRICAL CHARACTERISTICS (See Figure 8 )
Test Conditions: VDD = 5V ± 5%, TA = -40C to +85C, unless otherwise specified. All timing characteristics
are measured with 10pF loading.
Symbol
Parameter
Min.
Typ.
Max.
Units
# +/; ,- -/+ ' *(
&
&
&&
F
# +/; ,- -/+ '(
"
&
AC Electrical Characteristics
&
F
# +/; 'F %F(
$
# +/; $++ 'F %F(
?
07 # $++ ? :=
07 # $++ :+ I
0
75 # 0 +# +/; ,- -/+
&
)
&
&
&&
F
# +/; 'F %F(
$
# +/; $++ 'F %F(
?
07 # $++ ? :=
07 # $++ :+ &
#= +/; 'F %F(
$
#= +/; $++ 'F %F(
0=7579 #= 0 +- &&
<
I
DC Electrical Characteristics
<
<
,
,
+- <+
"&
+- , &
<
, 2 <+
&
<
<
:
, :1 <+
<J "
<
<
<=
=, , 2 <+ =?K*
57
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<=:
=, , :1 <+ =?K
< * &
<
<
± *&
, ; ,
0 %) '
,K<(
*&
, //
$
//
$
Notes:
1 When the encoder is enabled, a handling delay of four and a half TCLK clock cycles for B3ZS and five and half clock cycles for HDB3
always exists between TPDATA/TNDATA and TTIP/TRING. The handling delay is reduced to two clock cycles when the encoder
is disabled.
2 When the decoder is enabled, a handling delay of six and a half RCLK clock cycles will always exist between RPDATA/RNDATA
and RPOS/RNEG/RNRZ. The handling delay is reduced to one and half RCLK clock cycles when the decoder is disabled.
3 Supply current is measured with transmitter sending all ones AMI signal and with Transmit Level (TXLEV) set to high.
4 All inputs except pin 19, 20 and pin 26.
Specifications are subject to change without notice
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XRT7296
ABSOLUTE MAXIMUM RATINGS
02 ,
+- *& D)&<
02 0 0; 8
, *)& &
, <+ '- 0( *&< < D &<
<+ - 0 *&< < D&<
, , '- 0( 02 =C 0; "&8
SYSTEM DESCRIPTION
B3ZS/HDB3 ENCODER
LOCAL LOOPBACK
3 , 1 / 3+/; 3
/ 1 49 :4 3- 1
. 1 * , . / 3
, + 3- $ 3- + 0 7 3 // 1 A++- 1
+ / , . 49 1 /1 3+/;
. 1 //, B +/ 3 . 2 / 21/1 / 3 + + 1
+/ / 4< <L 21 4 / ,+ /. 21 1 3 + ,+ < ,+ + 1 ,+ 1 /1/ . 1 / ,/1 1 ,3 . 4 ,+ 2++ 3
32 //, 3 + + '<(
,+ $ . 1 + / :4 1
/ ,+ . :4 + 49 A/ 1
,3 . //, B / ., 3. / +/ / ; +/ 1 +/
/ 1 / < 4<
==0 11 /, 0 7 1,1 31 1 / 1 / 1 1 + #= 0= 75
/ # 0 7
/+- ?+ 3- = >,
0 7 2++ ++ 3 1 +
==0 ==0 11 ,+,+- B3ZS/HDB3 DECODER
1 / 3+/; /+, . 49 :4
/ 3- 1 . 1 * 1 49 . 1 / /
31 4< < ,+ +/ 1 21 . :4 / +/ 3- 1 * +2 4< < ,+ 2++ 3 /
+/ 21 / 31 / 3 +
+ / 21/1 /. 1
/ /1 / / 1 40<
, , * /1 3- +/ 1 1
, &! @:B /+/; / . * 1 . DECODER DISABLE
TRANSMIT ALL ONE SELECT
$ , +/ 21 1
/ 3 3- 1 / / 3
3+ 3- =
11 1 ++
3 + + ,+ / 1 40< = 11 /, /,, @
/ 3 1 + 1 , 0 7 . + 3/; '==0( 11 - = >, BIPOLAR VIOLATION
REMOTE LOOP-BACK
1 40< 2++ 11 . 3 21 3 +
+ / 1 / ,+
/ / 1 07 1
+ ,+ +2- . 1 /
, , 0= 75 21 =
+2
==0 11 /, / 0 7 3 1 + 1,1 0 75 1 3- # 1
0 7 )
XRT7296
PULSE SHAPER
0
1 ,+ 1 //, , /3 . .+ +2 /+ /1>, *1 1 ,+ , 1 + 1 +, . 1 ,+ / 3
M, , 1 < ' +( 81 1
/ 1 /*// A/ & . <
1,+ 3 11 81 1 / + 1 & .
< 1,+ 3 +2 < 11 3+
1 , + + . <
; !&< ; 21 +2 1 . < 1 ../ )± &F
G
"&± &F
75
)± &F
Note
1 Transformer = Pulse Engineering PE 65966, PE 65967
Surface Mount, Same Transformer for DS3, STS-1 and
E3.
Figure 2. Transmit Pulse Amplitude Test Circuit
DRIVER MONITOR
? 0 75 , 1 / .+, 3- 1 / @
0
@
75 . + / 1 . !
# /-/+ ± /-/+ @= 2++ 3 11 ,+ 1
A @
+ /
Parameter
Value
, G
0- ,//
:
+ <+
&<
; ,//
):
Table 1. Transmit Transformer Characteristics
"
XRT7296
DS3 SIGNAL REQUIREMENTS AT THE DSX
$ ,+ /1// /. 1 * 21/1 // . 1 /// 1 /// A
1 21 1 + /1 1
3, . M/;
1 * //
/./ 3+ + 1 + >, 'Table 1)
1 "%) / 1,1 & . . "!
/3+ 1 * ,+- 2 + ,+ + >, AG
1 7
,+ + 'See Table 3 and Figure
3( 1 4++/ *78*%% ,+ + 1
,+ 3- 1 "%) 1
+
Parameter
Specification
")@3 ± 4 + 21 1* ,3, '49(
"& &F
0,+ 1 + ,+ , . 1 + Figure 3 Figure 4 1 ,+ +, 3 /+ 3- / ./ . 1 + 1 ,+ +, , 3 3*
2 )< ; !&< ; , 1 / . 1 ,+
02 +
$ ++ 1 2 )! ± @:B , 3 *! D&"4 1 2 ") ± @:B , 3 *!4 *4 Notes
1
The pulse template proposed by G.703 standards is shown in Figure 4 and specified in Table 4 The proposed G.703 standards
further state that the voltage in a time slot containing a 0 must not exceed 5% of the peak pulse amplitude, except for the residue
of preceding pulses.
2 The power levels specified by the proposed G.703 standards are identical except that the power is to be measured in 3kHz bands.
3 The all 1s pattern must be a pure all 1s signal, without framing or other control bits.
Table 2. DSX•3 Interconnection Specification
Lower Curve
Time
*)
*) D)
& N D
Upper Curve
Equation
Time
*
*)!
*)! D )
N D! OO*
*
D) D)
Equation
D
&N D
N DOOD
&D"*!'*)(
Table 3. DSX-3 Pulse Template Boundaries for ANSI T1.404 Standards (See Figure 3. )
Lower Curve
Time
*!& *)
*) D)
D) D
& N D
Upper Curve
Equation
Time
*
*!& *)!
*)! D )
N D !OO *
*
*)! )
Equation
D
&N D
N DOO D
!D"*!'*)(
Table 4. DSX-3 Pulse Template Boundaries for Bellcore TR-NWT-000499 Standards (See Figure 4)
!
XRT7296
Normalized Amplitudes
Normalized Amplitudes
!
)
*
*&
*
&
!
)
*
*
&
*&
&
&
Time Slots-Normalized to Peak Location
Time Slots-Normalized to Peak Location
Figure 3. DSX-3 Isolated Pulse Template for
ANSI T1.404 Standards
Figure 4. DSX-3 Isolated Pulse Template for
Bellcore TR-NWT-000499
Parameter
Specification
STS-1 SIGNAL REQUIREMENTS
&[email protected] $ * 1 /*// . 1
* Table 5 + 1 + >, 1
* . 1 + ,+ + - ; /. . * '*I*&( ' Figure 5(
4 + 21 1* ,3, '49(
"& &F
02 +
2*3 2 ++ ,
1 * ./ , +2*
.+ 21 4 /,.. .>,/. + @:B 21 *"4
"4
Table 5. STSX-1 Interconnection Specification
Normalized Amplitude
)
Figure 5. STSX-1 Isolated Pulse Template for Bellcore TA-TSY-000253
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XRT7296
E3 SIGNAL REQUIREMENTS
1 "%) ,+ 1 /. / 5" Figure 6 12 1 "
'&& D &(
<
,+ ; >, / 5" Table 6 12 1 ,+ /./
!)&
'&& * &%(
7+ ,+
&&
&
'&& * &(
&
'&& D %%&(
%
'&& D &&(
*&!
Figure 6. CCITT G.703 Pulse Mark at the 34,368-kbit/s Interface
Parameter
Value
0,+ 1 '7++- /,+(
++ ; . + + , /*
. 21 1 ; 'see Figure 6(
/ . 1 0'( /1 /
= /A+ /
"& 7+ 0; <+ . @; '0,+(
<
0; <+ . / '7 0,+(
< ± <
7+ 0,+ 81
&&
. 1 +, . 0 7 0,+ 1 . 0,+
+
%& &
. 1 81 . 0 7 0,+ 1 7+ :+. +,
%& &
Table 6. E3 Pulse Specifications
XRT7296
$
#
:=
?
0
=
7
I
0
=
75
$
#
:=
?
0
=
7
$
#=
I
0=75
=
79
Figure 7. Timing Diagrams for System Interface
XRT7296
<
<
0
7
V
0=
75
79
40<
40<
,+
40< 7
,+
Note
The delay from RPDATA/RNDATA to RPOS/RNEG/RNRZ is not shown here.
Figure 8. Bipolar Violation Example for B3ZS Mode
XRT7296
<
OUTPUTS
RECEIVER
MONITOR
=
P 4
& ) " !
8 0*
=
0
70?
57
!
4
"
=:
P4
#
7
0
=
=
7
#
U2
XRT7296
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79
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$
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75
@
0
57
0
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40<
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$
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75
RECEIVER
OUTPUTS
79
D $
!
TRANSMITER
MONITOR
OUTPUTS
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40<
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75
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7
75
0 )&%))
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4
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Figure 9. Evaluation System Schematic
0
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XRT7295
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XRT7296
28 LEAD PLASTIC DUAL-IN-LINE
(600 MIL PDIP)
Rev. 1.00
!
&
E1
E
D
Seating
Plane
A2
A
L
A1
C
B
B1
e
INCHES
SYMBOL
eA
eB
MILLIMETERS
MIN
MAX
MIN
MAX
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Note: The control dimension is the inch column
XRT7296
28 LEAD SMALL OUTLINE J LEAD
(300 MIL JEDEC SOJ)
Rev. 3.00
D
!
&
E
H
A2
A
Seating
Plane
C
e
B
R
A1
E1
INCHES
SYMBOL
MILLIMETERS
MIN
MAX
MIN
MAX
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Note: The control dimension is the inch column
&
XRT7296
7=
1 1 ; /1 1 ,/ / 1 ,3+/ *
./ +3+- , 3+- . 1 , . - //, *
/3 1 /- +/ , - 1 1 ; 1 1 //, . . . 1 /1,+ / 1 +- . ++, , - , ,E /./ +/ 81+ 1 . 1 ,3+/ 1 3 /.,++- /1/;L
3+- 12 , . //,/
/ 1 , . - . ,/ +. , +/ 21 1 .+, +.,/ . 1 ,/ / 3+- 3 A / /, .+, . 1 +. , - ./+../ .- ../ 0,/ ,1B . , ,/1 +/ ,+ / 2 ,/ ./ 1G '( 1 ; . M,- 1 3 BL '3( 1
, , ++ ,/1 ;L '/( + +3+- . >,+- / , 1 //,*
/
-1 1 + ,/ 21+ 21, 1 2 / . 13
)