TI TRS3253EIRSMR

TRS3253E
www.ti.com .............................................................................................................................................. SLLS850A – JANUARY 2008 – REVISED OCTOBER 2008
RS-232 TRANSCEIVER WITH SPLIT SUPPLY PIN FOR LOGIC SIDE
FEATURES
1
•
•
•
APPLICATIONS
Hand-Held Equipment
PDAs
Cell Phones
Battery-Powered Equipment
Data Cables
32 31 30 29 28 27 26 25
C2+
C2–
V–
DIN1
DIN2
INVALID
DIN3
NC
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
NC
DOUT2
DOUT3
RIN1
RIN2
RIN3
RIN4
RIN5
9 10 11 12 13 14 15 16
FORCEON
ROUT5
ROUT4
ROUT3
ROUT2
ROUT1
VL
NC
•
•
•
•
•
RSM PACKAGE
(TOP VIEW)
NC – No internal connection
DESCRIPTION/ORDERING INFORMATION
The TRS3253E is a three-driver and five-receiver RS-232 interface device, with split supply pins for mixed-signal
operations. All RS-232 inputs and outputs are protected to ±8 kV using the IEC 61000-4-2 Air-Gap Discharge
method, ±8 kV using the IEC 61000-4-2 Contact Discharge method, and ±15 kV using the Human-Body Model.
The charge pump requires only four small 0.1-µF capacitors for operation from a 3.3-V supply. The TRS3253E is
capable of running at data rates up to 1000 kbps, while maintaining RS-232-compliant output levels.
The TRS3253E has a unique VL pin that allows operation in mixed-logic voltage systems. Both driver in (DIN)
and receiver out (ROUT) logic levels are pin programmable through the VL pin. This eliminates the need for
additional voltage level shifter while interfacing with low-voltage microcontroller or UARTs. The TRS3253E is
available in a space-saving QFN package (4 mm × 4 mm RSM).
Auto-powerdown plus can be disabled when FORCEON and FORCEOFF are high. With auto-powerdown plus
enabled, the device activates automatically when a valid signal is applied to any receiver or driver input. INVALID
is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V, or has been between
–0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if all receiver input voltages are between –0.3
V and 0.3 V for more than 30 µs. Refer to Figure 5 for receiver input levels.
ORDERING INFORMATION
TA
–40°C to 85°C
(1)
(2)
PACKAGE
(1) (2)
QFN – RSM
ORDERABLE PART NUMBER
TRS3253ERSMR
TOP-SIDE MARKING
RS53EI
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2008, Texas Instruments Incorporated
PRODUCT PREVIEW
•
VL Pin for Compatibility With Mixed-Voltage
Systems Down to 1.8 V on Logic Side
Enhanced ESD Protection on RIN Inputs and
DOUT Outputs
– ±8 kV IEC 61000-4-2 Air-Gap Discharge
– ±8 kV IEC 61000-4-2 Contact Discharge
– ±15 kV Human-Body Model
Low 300-µA Supply Current
Specified 1000-kbps Data Rate
Auto Powerdown Plus Feature
NC
C1–
V+
C1+
FORCEOFF
VCC
GND
DOUT1
•
TRS3253E
SLLS850A – JANUARY 2008 – REVISED OCTOBER 2008 .............................................................................................................................................. www.ti.com
FUNCTION TABLES
abc
Each Driver (1)
INPUTS
DIN
(1)
FORCEON
FORCEOFF
TIME ELAPSED SINCE LAST
RIN OR DIN TRANSITION
OUTPUT
DOUT
DRIVER STATUS
X
X
L
X
Z
Powered off
L
H
H
X
H
H
H
H
X
L
Normal operation with
auto-powerdown plus disabled
L
L
H
<30 s
H
H
L
H
<30 s
L
L
L
H
>30 s
Z
H
L
H
>30 s
Z
Normal operation with
auto-powerdown plus enabled
Powered off by
auto-powerdown plus feature
H = high level, L = low level, X = irrelevant, Z = high impedance
Each Receiver (1)
INPUTS
PRODUCT PREVIEW
RIN1–RIN5
(1)
2
FORCEOFF
OUTPUTS
TIME ELAPSED SINCE LAST
RIN OR DIN TRANSITION
ROUT1-ROUT5
X
L
X
Z
L
H
<30 s
H
H
H
<30 s
L
Open
H
<30 s
H
RECEIVER STATUS
Powered off
Normal operation with
auto-powerdown plus
disabled/enabled
H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
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TRS3253E
www.ti.com .............................................................................................................................................. SLLS850A – JANUARY 2008 – REVISED OCTOBER 2008
FUNCTIONAL BLOCK DIAGRAM
DIN1
DIN2
DIN3
FORCEOFF
4
25
DOUT1
5
23
DOUT2
7
22
DOUT3
28
6
Auto-Powerdown Plus
INVALID
9
FORCEON
ROUT2
14
21
RIN1
20
13
RIN2
19
12
ROUT3
ROUT4
ROUT5
PRODUCT PREVIEW
ROUT1
RIN3
18
11
RIN4
10
17
RIN5
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TERMINAL FUNCTIONS
TERMINAL
NAME
RSM
C1+, C2+
29, 1
V+
30
DESCRIPTION
Positive terminal of the voltage-doubler charge-pump capacitor
5.5-V supply generated by the charge pump
C1–, C2-
31, 2
INVALID
6
Invalid Output Pin
V–
3
–5.5-V supply generated by the charge pump
DIN1
DIN2
DIN3
4
5
7
Driver inputs
10, 11,
12, 13,
14
ROUT5 ROUT1
VL
15
Negative terminal of the voltage-doubler charge-pump capacitor
Receiver outputs. Swing between 0 and VL.
Logic-level supply. All CMOS inputs and outputs are referenced to this supply.
17, 18,
19, 20,
21
RS-232 receiver inputs
DOUT3
DOUT2
DOUT1
22
23
25
RS-232 driver outputs
GND
26
Ground
VCC
27
3-V to 5.5-V supply voltage
FORCEOFF
28
Powerdown Control input (Refer to Truth Table)
FORCEON
9
Powerdown Control input (Refer to Truth Table)
RIN5-RIN1
PRODUCT PREVIEW
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.3
6
V
VL to GND
–0.3
VCC + 0.3
V
V+ to GND
–0.3
7
V
V– to GND
0.3
–7
V
13
V
V+ + |V–| (2)
VI
Input voltage
VO
Output voltage
Continuous power dissipation
TJ
Junction temperature
Tstg
Storage temperature range
DIN, FORCEOFF to GND, FORCEON to GND
(2)
4
–0.3
RIN to GND
ROUT
6
±25
DOUT to GND
±13.2
–0.3
TA = 70°C, 32-pin RSM
(derate 7 mW/°C above 70°C)
–65
Lead temperature (soldering, 10 s)
(1)
MAX UNIT
VCC to GND
VL + 0.3
V
V
TBD
mW
150
°C
150
°C
300
°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
V+ and V– can have maximum magnitudes of 7 V, but their absolute difference cannot exceed 13 V.
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TRS3253E
www.ti.com .............................................................................................................................................. SLLS850A – JANUARY 2008 – REVISED OCTOBER 2008
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
UNIT
VCC
Supply voltage
3
5.5
V
VL
Supply voltage
1.65
VCC
V
Input logic threshold low
Input logic threshold high
DIN, FORCEOFF, FORCEON
DIN, FORCEOFF, FORCEON
VL = 3 V or 5.5 V
0.8
VL = 2.3 V
0.6
VL = 1.65 V
0.5
VL = 5.5 V
2.4
VL = 3 V
2.0
VL = 2.7 V
1.4
VL = 1.95 V
1.25
TRS3253ECPWR
Operating temperature
TRS3253EIPWR
Receiver input voltage
V
V
0
70
–40
85
–25
25
°C
V
ELECTRICAL CHARACTERISTICS (1)
PARAMETER
II
ICC
(1)
(2)
Input leakage current
Supply current
(TA = 25°C)
TEST CONDITIONS
MIN
FORCEOFF, FORCEON
TYP (2)
MAX
±0.01
±1
µA
0.5
1
mA
Auto-powerdown plus
disabled
No load,
FORCEOFF and FORCEON at VCC
Powered off
No load, FORCEOFF at GND
1
10
Auto-powerdown plus
enabled
No load, FORCEOFF at VCC,
FORCEON at GND,
All RIN are open or grounded
1
10
PRODUCT PREVIEW
over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 µF (tested at 3.3 V ± 10%), C1 = 0.047 µF,
C2–C4 = 0.33 µF (tested at 5 V ± 10%) (unless otherwise noted)
UNIT
µA
Testing supply conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.15 V; C1–C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; and C1 = 0.047 µF
and C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
ESD PROTECTION
PARAMETER
TEST CONDITIONS
Human-Body Model
RIN, DOUT
TYP
UNIT
±15
IEC 61000-4-2 Air-Gap Discharge
±8
IEC 61000-4-2 Contact Discharge
±8
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kV
5
TRS3253E
SLLS850A – JANUARY 2008 – REVISED OCTOBER 2008 .............................................................................................................................................. www.ti.com
RECEIVER SECTION
Electrical Characteristics
over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 µF (tested at 3.3 V ± 10%), C1 = 0.047 µF,
C2–C4 = 0.33 µF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Ioff
Output leakage current
ROUT, receivers disabled
VOL
Output voltage low
IOUT = 1.6 mA
VOH
Output voltage high
IOUT = –1 mA
VIT–
Input threshold low
TA = 25°C
VIT+
Input threshold high
TA = 25°C
Vhys
Input hysteresis
Input resistance
(1)
MIN
TYP (1)
MAX
UNIT
±0.05
±10
µA
0.4
V
VL – 0.6
VL – 0.1
VL = 5 V
0.8
1.2
VL = 3.3 V
0.6
1.5
V
V
VL = 5 V
1.8
2.4
VL = 3.3 V
1.5
2.4
0.5
TA = 25°C
3
5
V
V
7
kΩ
Typical values are at VCC = VL = 3.3 V, TA = 25°C
Switching Characteristics
PRODUCT PREVIEW
over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 µF (tested at 3.3 V ± 10%), C1 = 0.047 µF,
C2–C4 = 0.33 µF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted)
PARAMETER
tPHL
Receiver propagation delay
tPLH
TYP (1)
TEST CONDITIONS
Receiver input to receiver output, CL = 150 pF
0.15
0.15
UNIT
µs
tPHL – tPLH
Receiver skew
50
ns
ten
Receiver output enable time
From FORCEOFF
200
ns
tdis
Receiver output disable time
From FORCEOFF
200
ns
(1)
6
Typical values are at VCC = VL = 3.3 V, TA = 25°C.
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www.ti.com .............................................................................................................................................. SLLS850A – JANUARY 2008 – REVISED OCTOBER 2008
DRIVER SECTION
Electrical Characteristics
over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 µF (tested at 3.3 V ± 10%), C1 = 0.047 µF,
C2–C4 = 0.33 µF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VOH
Output voltage swing
All driver outputs loaded with 3 kΩ to ground, VCC=
3.1V to 5.5V
rO
Output resistance
VCC = V+ = V– = 0, Driver output = ±2 V
IOS
Output short-circuit current
VT_OUT = 0
IOZ
Output leakage current
MIN
TYP (1)
±5
±5.4
300
10M
VT_OUT = ±12 V, FORCEOFF = GND,
VCC = 3 V to 3.6 V
VT_OUT = ±12 V, FORCEOFF = GND,
VCC = 4.5 V to 5.5 V
Driver input hysteresis
Input leakage current
(1)
DIN, FORCEOFF, FORCEON
±0.01
MAX
UNIT
V
Ω
±60
mA
±25
µA
0.5
V
±1
µA
Typical values are at VCC = VL = 3.3 V, TA = 25°C
Timing Requirements
PARAMETER
|tPHL – tPLH|
Maximum data rate
RL = 3 kΩ, CL = 200 pF, One driver switching
Time-to-exit powerdown
|VT_OUT| > 3.7 V
TYP (1)
MAX
1000
µs
100
VCC = 3.3 V,
TA = 25°C,
RL = 3 kΩ to 7 kΩ,
Measured from 3 V
to –3 V or –3 V to 3 V
CL = 150 pF to 1000 pF
15
UNIT
kbps
100
Driver skew (2)
Transition-region
slew rate
(1)
(2)
MIN
PRODUCT PREVIEW
over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 µF (tested at 3.3 V ± 10%), C1 = 0.047 µF,
C2–C4 = 0.33 µF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted)
ns
150
V/µs
Typical values are at VCC = VL = 3.3 V, TA = 25°C.
Driver skew is measured at the driver zero crosspoint.
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AUTO-POWERDOWN SECTION
Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6)
PARAMETER
TEST CONDITIONS
MIN
VIT+(valid)
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND,
FORCEOFF = VL
VIT–(valid)
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND,
FORCEOFF = VL
–2.7
VT(invalid)
Receiver input threshold
for INVALID low-level output voltage
FORCEON = GND,
FORCEOFF = VL
–0.3
VOH
INVALID high-level output voltage
IOH = -1 mA, FORCEON = GND,
FORCEOFF = VL
VOL
INVALID low-level output voltage
IOL = 1.6 mA, FORCEON = GND,
FORCEOFF = VL
MAX
UNIT
2.7
V
V
0.3
V
VL – 0.6
V
0.4
V
Switching Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6)
PARAMETER
MIN
TYP (1)
MAX
UNIT
PRODUCT PREVIEW
tvalid
Propagation delay time, low- to high-level output
0.1
µs
tinvalid
Propagation delay time, high- to low-level output
50
µs
ten
Supply enable time
25
tdis
Receiver or driver edge to auto-powerdown plus
(1)
8
15
30
µs
60
s
All typical values are at VCC = VL = 3.3 V and TA = 25°C.
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APPLICATION INFORMATION
C1+
C2
C4
+
-
V+
C2+
C2-
VCC
V-
-
GND
+
C3†
+
-
+ CBYPASS
- = 0.1 μF
C1
C1RIN1
FORCEON
AutoPowerdown
Plus
RIN2
RS-232 Inputs
+
RIN3
RIN4
FORCEOFF
RIN5
PRODUCT PREVIEW
INVALID
DOUT1
RS-232 Outputs
DOUT2
ROUT1
5 kΩ
ROUT2
DOUT3
5 kΩ
DIN3
ROUT3
Logic Outputs
5 kΩ
Logic Inputs
DIN2
ROUT4
5 kΩ
ROUT5
DIN1
5 kΩ
†
C3 can be connected to VCC or GND.
NOTES: A. Resistor values shown are nominal.
B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or
electrolytic capacitors are used, they should be connected as shown.
VCC vs CAPACITOR VALUES
VCC
C1
C2, C3, and C4
3.3 V ± 0.3 V
5 V ± 0.5 V
3 V to 5.5 V
0.1 μF
0.047 μF
0.1 μF
0.1 μF
0.33 μF
0.47 μF
Figure 1. Typical Operating Circuit and Capacitor Values
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PARAMETER MEASUREMENT INFORMATION
3V
Generator
(see Note B)
Input
RS-232
Output
50 Ω
RL
tTHL
CL
(see Note A)
3V
FORCEOFF
TEST CIRCUIT
0V
tTLH
3V
3V
Output
−3 V
−3 V
6V
SR(tr) +
t THL or tTLH
VOH
VOL
VOLTAGE WAVEFORMS
A.
CL includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns,
tf ≤ 10 ns.
Figure 2. Driver Slew Rate
3V
PRODUCT PREVIEW
Generator
(see Note B)
RS-232
Output
50 Ω
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
tPHL
tPLH
VOH
3V
FORCEOFF
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
A.
CL includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns,
tf ≤ 10 ns.
Figure 3. Driver Pulse Skew
3 V or 0 V
FORCEON
3V
Input
1.5 V
1.5 V
−3 V
Output
Generator
(see Note B)
tPHL
50 Ω
3V
FORCEOFF
tPLH
CL
(see Note A)
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
A.
CL includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 4. Receiver Propagation Delay Times
10
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PARAMETER MEASUREMENT INFORMATION (continued)
3V
Input
VCC
3 V or 0 V
FORCEON
1.5 V
0V
tPHZ
(S1 at GND)
RL
3 V or 0 V
1.5 V
GND
S1
tPZH
VOH
Output
50%
Output
CL
(see Note A)
FORCEOFF
Generator
(see Note B)
0.3 V
tPLZ
(S1 at VCC)
50 Ω
tPZL
(S1 at VCC)
0.3 V
Output
50%
VOL
TEST CIRCUIT
CL includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
C.
tPLZ and tPHZ are the same as tdis.
D.
tPZL and tPZH are the same as ten.
PRODUCT PREVIEW
VOLTAGE WAVEFORMS
A.
Figure 5. Receiver Enable and Disable Times
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PARAMETER MEASUREMENT INFORMATION (continued)
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
Valid RS-232 Level, INVALID High
ROUT
Generator
(see Note B)
2.7 V
50 Ω
Indeterminate
0.3 V
0V
−0.3 V
Indeterminate
Autopowerdown
Plus
INVALID
−2.7 V
CL = 30 pF
(see Note A)
Valid RS-232 Level, INVALID High
†
FORCEOFF
FORCEON
If Signal Remains Within This Region
For More Than 30 µs, INVALID Is Low†
DIN
DOUT
Auto-powerdown plus disables drivers and reduces
supply current to 1 µA.
TEST CIRCUIT
PRODUCT PREVIEW
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following
characteristics: PRR = 5 kbit/s, ZO = 50 Ω, 50%
duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Receiver
Input
3V
2.7 V
0V
0V
−2.7 V
−3 V
tinvalid
tvalid
INVALID
Output
50%
VCC
50%
0V
3 V to 5 V
Driver
Input
50%
50%
0V
≈5.5 V
Driver
Output
≈ −5.5 V
tdis
ten
tdis
V+
Supply
Voltages
ten
V+
V+ −0.3 V
V− +0.3 V
V−
V−
Voltage Waveforms and Timing Diagrams
Figure 6. INVALID Propagation-Delay Times and Supply-Enabling Time
12
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PACKAGE OPTION ADDENDUM
www.ti.com
21-Aug-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TRS3253EIRSMR
ACTIVE
QFN
RSM
32
3000 Green (RoHS &
no Sb/Br)
TRS3253ERSMR
PREVIEW
QFN
RSM
32
3000
TBD
Lead/Ball Finish
CU NIPDAU
Call TI
MSL Peak Temp (3)
Level-2-260C-1 YEAR
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Aug-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TRS3253EIRSMR
Package Package Pins
Type Drawing
QFN
RSM
32
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
3000
330.0
12.4
Pack Materials-Page 1
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
4.3
4.3
1.5
8.0
W
Pin1
(mm) Quadrant
12.0
Q2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Aug-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TRS3253EIRSMR
QFN
RSM
32
3000
346.0
346.0
29.0
Pack Materials-Page 2
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