TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com 50 mA, 3 V TO 50 V, MICROPOWER, LOW-DROPOUT LINEAR REGULATOR Check for Samples: TPS79801-Q1, TPS79850-Q1 FEATURES APPLICATIONS • • • • • • • • • • • • • • 1 23 • • • • Qualified for Automotive Applications Wide Input Voltage Range: 3 V to 50 V Low Quiescent Current: 40 μA (Typ) Low Dropout Voltage: 300 mV (Typ) Output Current: 50 mA No Input Protection Diodes Needed Adjustable Output From 1.275 V to 28 V 1-μA Quiescent Current in Shutdown Stable With 1-μF Output Capacitor Stable With Aluminum, Tantalum, or Ceramic Capacitors Reverse Input-Battery Protection Reverse Output Current Flow Protection Thermal Limiting Available in MSOP-8 Package Low-Current, High-Voltage Regulators Regulators for Battery-Powered Systems Telecom Automotive DGN PACKAGE MSOP-8 PowerPAD™ (TOP VIEW) OUT SENSE/FB NC GND Note: 1 2 3 4 8 7 6 5 IN NC NC EN The exposed thermal pad is connected to ground via pin 4 (GND). DESCRIPTION The TPS798xx is the first device in a line of 50-V high-voltage micropower low-dropout (LDO) linear regulators. This device is capable of supplying 50-mA output current with a dropout voltage of only 300 mV. Designed for low quiescent current high voltage (50 V) applications, 40 μA operating and 1 μA in shutdown makes the TPS798xx an ideal choice for battery-powered or high-voltage systems. Quiescent current is also well-controlled in dropout. Other features of the TPS798xx include the ability to operate with low equivalent series resistance (ESR) ceramic output capacitors. This device is stable with only 1 μF on the output; most older devices require between 10-μF and 100-μF tantalum capacitors for stability. Small ceramic capacitors can be used without the necessary addition of ESR, as is common with other regulators. Internal protection circuitry includes reverse input-battery protection, reverse output current protection, current limiting, and thermal limiting to protect the device in various fault conditions. This device is available in a fixed output voltage of 5 V (TPS79850) and with an adjustable output voltage with a 1.275-V reference voltage (TPS79801). The TPS798xx regulator is available in a 8-lead MSOP (DGN) package with an exposed pad for enhanced thermal management capability. ORDERING INFORMATION (1) TJ –40°C to 125°C (1) (2) (3) PACKAGE (2) VOUT (NOM) Adjustable (3) 5V MSOP – DGN Reel of 2500 ORDERABLE PART NUMBER TOP-SIDE MARKING TPS79801QDGNRQ1 PMRQ TPS79850QDGNRQ1 OOLQ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For fixed 1.275 V, tie FB to out. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2011, Texas Instruments Incorporated TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range (unless otherwise noted). VIN Input voltage range IN (2) –65 V to 60 V OUT –0.3 V to 28 V FB –0.3 V to 7 V EN (2) –65 V to 60 V 0.6 V < VIN Enable to IN differential θJA Thermal impedance, junction to free air TJ Junction temperature range (5) TSTG Storage temperature range JEDEC 51-5 (3) JEDEC 51-7 130°C/W –40°C to 125°C –65°C to 150°C ESD rating (1) 60°C/W (4) Human-Body Model (HBM) 2000 V Charged-Device Model (CDM) 1000 V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Transient: 500 ms for VIN > 50 V The thermal data is based on using JEDEC 51-5. The copper pad is soldered to the thermal land pattern and using 5 by 8 thermal array (vias). Correct attachment procedure must be incorporated. The thermal data is based on using JEDEC 51-7. The copper pad is soldered to the thermal land. No thermal vias. Correct attachment procedure must be incorporated. The junction temperature must not exceed 125ºC. See Figure 1 to determine the maximum ambient operating temperature versus the supply voltage and load current. The safe operating area curves assume a 50ºC/W thermal impedance and may need to be adjusted to match actual system thermal performance. (2) (3) (4) (5) DISSIPATION RATINGS (1) BOARD PACKAGE RθJC RθJA DERATING FACTOR ABOVE TA = 25°C TA ≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING High-K (2) DGN 8.2°C/W 60°C/W 16.6 mW/°C 1.83 W 1.08 W 0.833 W (1) (2) See Thermal Considerations in the Applications Information section for more information related to thermal design. The JEDEC High-K (1s) board design used to derive this data was a 4.5-inch x 3-inch, 2-layer board with 2-ounce copper traces on top of the board. RECOMMENDED OPERATING CONDITIONS VIN Input voltage IOUT Output current TJ Operating junction temperature (1) TA Ambient free-air temperature (1) (2) (3) 2 (2) (3) MIN MAX IN –65 50 UNIT OUT –0.3 28 FB –0.3 7 EN –65 50 50 mA –40 125 °C –40 105 °C V Operating conditions are limited by maximum junction temperature. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited. The TPS798xxQ is specified to meet performance specifications from –40°C to 125°C operating junction temperature. Specifications over the full operating junction temperature range are specified by design, characterization, and correlation with statistical process controls. This device includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature exceeds 125°C (min) when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Copyright © 2009–2011, Texas Instruments Incorporated TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com ELECTRICAL CHARACTERISTICS VIN = VOUT(NOM) + 1.0 V or 4.0 V (whichever is greater for either fixed or adjustable versions), ILOAD = 1.0 mA, VEN = 3.0 V, COUT = CIN = 2.2 μF (unless otherwise noted). For TPS79801, FB pin tied to VOUT. Typical values are at TJ = 25°C. PARAMETER VIN Fixed VOUT Adjustable VOUT ΔVOUT/ΔVIN TEST CONDITIONS Minimum input voltage ILOAD = 50 mA Initial output voltage accuracy VIN = VOUT nom + 0.5 V Output voltage accuracy over line, load, and full temperature range VIN = VOUT nom + 1 V to 50 V, ILOAD = 1 mA to 50 mA Initial output voltage accuracy VIN = 3 V Output voltage accuracy over line, load, and full temperature range VIN = 4 V to 50 V, ILOAD = 1 mA to 50 mA Line regulation, adjustable VOUT ΔVIN = 3 V to 50 V Line regulation, TPS79850 VIN = VOUT nom + 0.5 V to 50 V Load regulation, adjustable VOUT ΔILOAD = 1 mA to 50 mA Adjustable VOUT Output voltage range (2) ΔILOAD = 1 mA to 50 mA Dropout voltage (4) (5) GND pin current (6) 4 -1.5 +1.5 Full range -3.0 +3.0 25°C 1.256 1.275 1.294 Full range 1.237 1.275 1.313 13 Full range 15 25°C 20 Full range 32 25°C 50 UNIT V % V mV mV 90 1.275 25°C 85 Full range 25°C ILOAD = 10 mA, VIN = VOUT(NOM) – 0.1 V VIN = VOUT(NOM) MAX 3 25°C Full range 170 Full range 25°C ILOAD = 50 mA, VIN = VOUT(NOM) – 0.1 V IGND TYP Full range (3) VIN = VOUT(NOM) – 0.1 V VDO MIN Full range ΔVOUT/ΔIOUT Load regulation, fixed VOUT TJ (1) 300 Full range 28 V 150 mV 190 mV 260 mV 350 mV 370 mV 550 mV ILOAD = 0 mA Full range 30 80 μA ILOAD = 1 mA Full range 100 180 μA ILOAD = 10 mA Full range 400 700 μA ILOAD = 50 mA Full range 1.8 3.3 mA 25°C 100 25°C 0.05 VN Output voltage noise COUT = 10μF, ILOAD = 50 mA, BW = 10 Hz to 100 kHz, VIN = 4.3 V, VOUT = 3.3 V (adjustable used) IFB FB pin bias current (7) VIN = 3.0 V EN pin high (enabled) (8) OFF to ON, VIN = 6.0 V Full range EN pin low (shutdown) (8) ON to OFF, VIN = 6.0 V 25°C 0.4 V EN pin low (shutdown) (8) ON to OFF, VIN = 6.0 V Full range 0.2 V VEN = 0 V VIN = 6.0 V, ILOAD = 0 mA Full range 0.4 2.0 μA VEN μVRMS 0.2 μA 1.5 V V V IEN EN pin current (8) VEN = 3 V, VIN = 6.0 V, ILOAD = 0 mA Full range 0.4 0.5 μA Ishutdown GND pin current (6) VIN = 6 V, VEN = 0 V, ILOAD = 0 mA Full range 3 25 μA Power-supply rejection ratio VIN = 4.3 V, VOUT 3.3-V VRIPPLE = 0.5 VPP, fRIPPLE = 120 Hz, ILOAD = 50 mA 25°C 65 Fixed current limit (9) ΔVOUT = VOUT(NOM) – 0.1 V Full range 60 200 mA Adjustable current limit ΔVOUT = VOUT(NOM) – 0.1 V Full range 60 200 mA PSRR ILIMIT (1) (2) (3) (4) (5) (6) (7) (8) (9) dB Full range TJ = –40°C to 125°C This parameter is tested and specified under pulse load conditions such that TJ = TA. This device is 100% production tested at TA = 25°C. Performance at full range is specified by design, characterization, bench to ATE correlation testing, and other statistical process controls. This device is limited by a maximum junction temperature of TJ = 125°C. The regulated output voltage specification cannot be applied to all combinations of various VIN, VOUT, ambient temperature, and IOUT conditions. When operating with large voltage differentials across the device, the output load must be limited so as not to violate the maximum junction temperature for a given ambient temperature. In the adjustable version test, the output uses an external voltage divider. This resistor voltage divider is made up of R1 = 215 kΩ and R2 (bottom resistor) = 340 kΩ. This configuration preloads the output with 6.0μA. By definition, dropout voltage is the minimum input voltage needed to maintain a given output voltage at a specific load current. For dropout testing, minimum VIN = VOUT(NOM) × 0.96. This specification ensures that the device is in dropout and takes into account the output voltage tolerance over the full temperature range. Ground pin current is tested with VIN = VOUT(NOM) or 3 V, whichever is greater. FB pin current flows into the FB pin. EN pin current flows into the EN pin. Current limit is tested with VIN = VOUT(NOM) + 0.5 V or 3.0 V, whichever is greater. VOUT is forced to VOUT(NOM) – 0.1 V and the output current is measured. Copyright © 2009–2011, Texas Instruments Incorporated 3 TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VIN = VOUT(NOM) + 1.0 V or 4.0 V (whichever is greater for either fixed or adjustable versions), ILOAD = 1.0 mA, VEN = 3.0 V, COUT = CIN = 2.2 μF (unless otherwise noted). For TPS79801, FB pin tied to VOUT. Typical values are at TJ = 25°C. PARAMETER IRL TEST CONDITIONS Input reverse leakage current(reverse battery test) (10) IRO Reverse output current TSD Thermal shutdown temperature (TJ) (11) VIN = –60 V, VOUT = open, CIN open VOUT = VOUT(NOM), VIN = ground TJ (1) MIN TYP Full range 25°C 19 MAX UNIT 6 mA 25 μA Shutdown, temperature increasing 135 °C Reset, temperature decreasing 135 °C (10) Reverse output current is tested with the IN pin tied to ground and the output forced to VOUT(NOM) +0.1 V. This current flows into the OUT pin and out of the GND pin and then measured. (11) Specified by design 4 Copyright © 2009–2011, Texas Instruments Incorporated TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com 120 DC O pe ra t io n IOUT = 5 m A 100 TA – Temperature – °C T ra ns ie nt ( <5 0 0 m s ) 80 60 IOUT = 30 m A 40 V OUT = 5 V TJ(max) = 125°C 0JA = 50°C/W 20 IOUT = 50 m A 0 10 20 30 40 V IN – Input Voltage – V 50 60 Figure 1. Safe Operating Area FUNCTIONAL BLOCK DIAGRAMS OUT IN Current Limit Thermal Shutdown SENSE Internal Supply EN Bandgap GND Figure 2. Fixed Voltage Output Version Copyright © 2009–2011, Texas Instruments Incorporated 5 TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com OUT IN Current Limit Thermal Shutdown Internal Supply EN FB Bandgap GND Figure 3. Adjustable Voltage Output Version 6 Copyright © 2009–2011, Texas Instruments Incorporated TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com PIN CONFIGURATIONS DGN PACKAGE MSOP-8 PowerPAD (TOP VIEW) OUT SENSE/FB NC GND Note: 1 2 3 4 8 7 6 5 IN NC NC EN The exposed thermal pad is connected to ground via pin 4 (GND). PIN DESCRIPTIONS PIN NAME DGN DESCRIPTION EN 5 Enable pin. Driving the EN pin high turns on the regulator over full operating range. Driving this pin low puts the regulator into shutdown mode over full operating range. IN 8 Input pin. A 0.1-μF ceramic or greater capacitor is recommended from this pin to ground to assure stability. Both input and output capacitor grounds should be tied back to the IC ground with no significant impedance between them. GND 4 Ground. The exposed thermal pad is connected to ground via this pin. OUT 1 Regulated output voltage pin. A small (1 μF) capacitor is needed from this pin to ground to assure stability. SENSE/FB 2 This pin is the input to the control loop error amplifier; it is used to set the output voltage of the device. NC 3, 6, 7 No internal connection Copyright © 2009–2011, Texas Instruments Incorporated 7 TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS LINE REGULATION vs INPUT VOLTAGE LINE REGULATION vs INPUT VOLTAGE 2 2.5 TA = -40°C Line Regulation – mV Line Regulation – mV 1.5 TA = 85°C 2 TA = 25°C 1.5 TA = -40°C 1 TPS79801 V EN = 2 V V OUT(nom) = 1.275 V IOUT = 1 m A 0.5 0 TA = 25°C TPS79850 V EN = V IN IOUT = 1 m A -1 10 20 30 V IN – Input Voltage – V 0 50 10 20 30 V IN – Input Voltage – V Figure 4. Figure 5. DROPOUT VOLTAGE vs OUTPUT CURRENT DROPOUT VOLTAGE vs OUTPUT CURRENT 350 TPS79850 V IN = 4.9 V V EN = V IN 350 TA = 25°C 250 TA = -40°C 200 150 100 50 40 50 400 TA = 85°C TPS79801 V EN = 2 V V OUT(nom) = 3.3 V 300 40 VDO – Dropout Voltage – mV 0 Vdo – Dropout Voltage – mV 0.5 -0.5 0 TA = 85°C TA = 25°C 300 250 TA = -40°C 200 150 100 50 0 0 0 0.01 0.02 0.03 0.04 IOUT – Output Current – A Figure 6. 8 TA = 85°C 1 0.05 0.06 0 0.01 0.02 0.03 0.04 IOUT – Output Current – A 0.05 0.06 Figure 7. Copyright © 2009–2011, Texas Instruments Incorporated TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs TEMPERATURE 50 50 45 45 V EN = V IN 40 40 IQ – Quiescent Current – µA IQ – Quiescent Current – µA V EN = V IN 35 35 30 30 TPS79801 V IN = 6 V V OUT(nom) = 1.275 V IOUT = 0 m A 25 20 25 TPS79850 V IN = 6 V IOUT = 0 m A 20 15 15 10 10 V EN = 0 V 5 0 -40 -20 5 0 20 40 60 TA – Tem perature – °C 80 0 -40 100 V EN = 0 V -20 0 20 40 60 TA – Tem perature – °C Figure 8. Figure 9. QUIESCENT CURRENT vs INPUT VOLTAGE QUIESCENT CURRENT vs INPUT VOLTAGE 60 80 100 60 TA = -40°C 40 TA = 85°C TA = 25°C 30 20 TPS79801 V EN = 6 V V OUT(nom) = 1.275 V IOUT = 0 m A 10 TA = -40°C TA = 25°C 50 IQ – Quiescent Current – µA IQ – Quiescent Current – µA 50 40 TA = 85°C 30 20 TPS79850 V EN = 6 V IOUT = 0 m A 10 0 0 0 10 20 30 V IN – Input Voltage –V Figure 10. Copyright © 2009–2011, Texas Instruments Incorporated 40 50 0 10 20 30 V IN – Input Voltage –V 40 50 Figure 11. 9 TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) QUIESCENT CURRENT vs OUTPUT CURRENT QUIESCENT CURRENT vs OUTPUT CURRENT 1800 1800 TPS79801 V IN = 7 V V EN = V IN V OUT(nom) = 5 V TA = 25°C IQ – Quiescent Current – µA 1400 TPS79850 V IN = 6 V V EN = V IN TA = 25°C 1600 IQ – Quiescent Current – µA 1600 1200 1000 800 600 1400 1200 1000 800 600 400 400 200 200 0 0 0 0 0.01 0.02 0.03 0.04 0.01 0.05 0.02 0.03 0.04 0.05 IOUT – Output Current – A IOUT – Output Current – A Figure 12. Figure 13. REVERSE BATTERY LEAKAGE vs INPUT VOLTAGE POWER SUPPLY RIPPLE REJECTION vs FREQUENCY 100 90 80 V IN = 7 V DC + 20 m V p-p AC 70 PSRR – dB V IN = 6 V DC + 20 m V p-p AC 60 50 40 30 20 10 TPS79850 V EN = V IN IOUT = 50 m A TA = 25°C CIN = Open COUT = 10 µF 0 1.E+01 10 1.E+02 100 V IN = 5.5 V DC + 20 m V p-p AC 1.E+03 1k 1.E+04 10k 1.E+05 100k 1.E+06 1M 1.E+07 10M Frequency – Hz Figure 14. 10 Figure 15. Copyright © 2009–2011, Texas Instruments Incorporated TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com APPLICATION INFORMATION The TPS798xx is a 50-mA high-voltage LDO regulator with micropower quiescent current and shutdown. The device is capable of supplying 50 mA at a dropout voltage of 300 mV (typ). The low operating quiescent current (40 μA) drops to 1 μA in shutdown. In addition to the low quiescent current, the TPS798xx incorporates several protection features that make it ideal for battery-powered applications. The device is protected against both reverse-input and reverse-output voltages. In battery-backup applications, where the output can be held up by a backup battery when the input is pulled to ground, the TPS798xx acts as if it has a diode in series with its output and prevents reverse current flow. Figure 16 and Figure 17 illustrate two typical applications. RETURN IN OUT 1 mF OFF 1mF TPS79801 FB EN ON GND RSET -48V Note: ILED = 1.275 V/RSET –48 V can vary from –4 V to –50 V Figure 16. Constant Brightness for Indicator LED Over Wide Input Voltage Range RP IN OUT TPS79801 VIN Load FB EN GND Figure 17. Kelvin Sense Connection Adjustable Operation The TPS798xx has an output voltage range of 1.275 V to 28 V. The output voltage is set by the ratio of two external resistors as shown in Figure 18. The feedback loop monitors the output to maintain the voltage at the adjust pin at 1.275 V referenced to ground. The current in R1 is then equal to 1.275 V/R1, and the current in R2 is the current in R1 plus the FB pin bias current. The FB pin bias current, 0.2 μA at 25°C, flows through R2 into the FB pin. The output voltage can be calculated using the formula in Figure 18. The value of R1 should be less than 250 kΩ to minimize errors in the output voltage caused by the FB pin bias current. Note that in shutdown, the output is turned off and the divider current is zero. VOUT OUT IN R2 VIN C1 TPS79801 EN FB GND R1 VOUT = 1.275 V (1 + R2 / R1) + IFBR2 VFB = 1.275 V IFB = 0.2 µA at 25°C Output Range = 1.275 V to 28 V Figure 18. Adjustable Operation Copyright © 2009–2011, Texas Instruments Incorporated 11 TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com A 100-pF capacitor (C1) placed in parallel with the top resistor (R2) of the output divider is necessary for stability and transient performance of the adjustable TPS798xx. The impedance of C1 at 10 kHz should be less than the value of R2. The adjustable device is tested and specified with the FB pin tied to the OUT pin and a 1 mA dc load (unless otherwise specified) for an output voltage of 1.275 V. Specifications for output voltages greater than 1.275 V are proportional to the ratio of the desired output voltage to 1.275 V (VOUT/1.275 V). For example, load regulation for an output current change of 1 mA to 50 mA is –10 mV (typ) at VOUT = 1.275 V. At VOUT = 12 V, load regulation is: (12 V/1.275 V) × (–10 mV) = –94 mV Output Capacitance and Transient Response The TPS798xx is designed to be stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 1 μF with an ESR of 3 Ω or less is recommended to prevent oscillations. The TPS798xx is a micropower device, and output transient response is a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the TPS798xx, increase the effective output capacitor value. Extra consideration must be given to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. The most common dielectrics used are Z5U, Y5 V, X5R, and X7R. The Z5U and Y5 V dielectrics are good for providing high capacitances in a small package, but exhibit strong voltage and temperature coefficients. When used with a 5 V regulator, a 10μF Y5 V capacitor can exhibit an effective value as low as 1μF to 2μF over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals because of mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients. Thermal Considerations The power handling capability of the device is limited by the maximum rated junction temperature (125°C). The power dissipated by the device consists of two components: • Output current multiplied by the input/output voltage differential: IOUT × (VIN – VOUT) • GND pin current multiplied by the input voltage: IGND × VIN The GND pin current can be found by examining the GND pin current curves in the Typical Characteristics . Power dissipation is equal to the sum of the two components listed previously. The TPS798xx series regulators have internal thermal limiting designed to protect the device during overload conditions. Do not exceed the maximum junction temperature rating of 125°C. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. For surface-mount devices, heat sinking is accomplished by using the heat-spreading capabilities of the printed circuit board (PCB) and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat generated by power devices. 12 Copyright © 2009–2011, Texas Instruments Incorporated TPS79801-Q1, TPS79850-Q1 www.ti.com SLVS822D – MARCH 2009 – REVISED AUGUST 2011 Calculating Junction Temperature Given an output voltage of 5 V, an input voltage range of 15 V to 24 V, an output current range of 0 mA to 50 mA, and a maximum ambient temperature of 50°C, the maximum junction temperature is calculated as follows. The power dissipated (PDISS) by the DGN package is equal to: IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX)) Where: IOUT(MAX) = 50 mA VIN(MAX) = 24 V VOUT = 5 V IGND at (IOUT = 50 mA, VIN = 24 V) = 1 mA Therefore, PDISS = 50 mA (24 V – 5 V) + 1 mA (24 V) = 0.974 W The thermal resistance is approximately 60°C/W, based on JEDEC 51-5 profile. Therefore, the junction temperature rise above ambient is approximately equal to: 0.974 W × 60°C/W = 58.44°C The maximum junction temperature is then equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: TJ max = 50°C + 58.44°C = 108.44°C Protection Features The TPS798xx incorporates several protection features that make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse-input voltages, and reverse currents from output to input. Current-limit protection and thermal-overload protection are intended to protect the device against current overload conditions at the output of the device. The junction temperature should not exceed 125°C. The input of the device withstands reverse voltages of –60 V. Current flow into the device is limited to less than 6 mA (typically, less than 100 μA), and no negative voltage appears at the output. The device protects both itself and the load. This architecture also provides protection against batteries that may be plugged in backwards. The FB pin of the adjustable device can be pulled above or below ground by as much as 7 V without damaging the device. If the input is left open or grounded, the FB pin behaves as an open circuit when pulled below ground, or as a large resistor (typically, 100 kΩ) in series with a diode when pulled above ground. If the input is powered by a voltage source, pulling the FB pin below the reference voltage increases the output voltage. This configuration causes the output to go to a unregulated high voltage. Pulling the FB pin above the reference voltage turns off all output current. In situations where the FB pin is connected to a resistor divider that would pull the FB pin above its 7 V clamp voltage if the output is pulled high, the FB pin input current must be limited to less than 5 mA. For example, a resistor divider provides a regulated 1.5 V output from the 1.275-V reference when the output is forced to 28 V. The top resistor of the resistor divider must be chosen to limit the current into the FB pin to less than 5 mA when the FB pin is at 7 V. The 21-V difference between the OUT and FB pins divided by the 5-mA maximum current into the FB pin yields a minimum top resistor value of 5.8 kΩ. In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open. The rise in reverse output current above 7 V occurs from the breakdown of the 7 V clamp on the FB pin. With a resistor divider on the regulator output, this current is reduced, depending on the size of the resistor divider. When the IN pin of the TPS798xx is forced below the OUT pin, or the OUT pin is pulled above the IN pin, input current typically drops to less than 0.6 mA. This scenario can occur if the input of the TPS798xx is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. The state of the EN pin has no effect on the reverse output current when the output is pulled above the input. Copyright © 2009–2011, Texas Instruments Incorporated 13 TPS79801-Q1, TPS79850-Q1 SLVS822D – MARCH 2009 – REVISED AUGUST 2011 www.ti.com Thermal Information The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (TJ max) above which normal operation is not assured. The operating environment must be designed so that the operating junction temperature (TJ) does not exceed the maximum junction temperature (TJ max). The two primary environmental variables that can be used to improve thermal performance are air flow and external heatsinks. The purpose of this section is to help the designer to determine the proper operating environment for a linear regulator that operates at a specific power level. In general, the maximum expected power (PD max) consumed by a linear regulator is computed as shown in Equation 1: PDmax = (VIN(avg) – VOUT(avg)) × IOUT(avg) + VI(avg) × IQ Where: VIN(avg) is the average input voltage. VOUT(avg) is the average output voltage. IOUT(avg) is the average output current. IQ is the quiescent current. (1) (1) For most TI LDO regulators, the quiescent current is insignificant compared to the average output current; therefore, the term VIN(avg) × IQ can be ignored. The operating junction temperature is computed by adding the ambient temperature (TA) and the increase in temperature as a result of the regulator power dissipation. The temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal resistances between the junction and the case (RθJC), the case to heatsink (RθCS), and the heatsink to ambient (RθSA). Thermal resistances are measurements of how effectively an object dissipates heat. Typically, the larger the device, the more surface area available for power dissipation and the lower the device thermal resistance. 1.2 JEDEC 51-5 Power Dissipation (W) 1 0.8 0.6 0.4 0.2 0 0 20 40 60 80 100 120 140 160 Temperature (°C) Figure 19. Power Dissipation vs Temperature 14 Copyright © 2009–2011, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 16-Jul-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TPS79801QDGNRQ1 ACTIVE MSOPPowerPAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79850QDGNRQ1 ACTIVE MSOPPowerPAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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