LH168K 324-output TFT-LCD Source Driver IC LH168K DESCRIPTION PIN CONNECTIONS The LH168K is a 324-output TFT-LCD source driver IC which can simultaneously display 262 144 colors in 64 gray scales. TOP VIEW 395-PIN TCP XO1 1 YO1 2 ZO1 3 FEATURES • Selectable number of LCD drive outputs : 324/321/312/309 • Built-in 6-bit digital input DAC • Dot-inversion drive : Outputs the inverted gray scale voltages between LCD drive pins next to each other • 2-port input for each circuit of data inputs R, G and B, and it is possible to sample and hold display data of two pixels at the same time at 324-output and 312-output modes. 1-port input for each circuit of data inputs R, G and B at 321output and 309-output modes. • Possible to display 262 144 colors in 64 gray scales with reference voltage input of 18 gray scales : This reference voltage input corresponds to ‹ correction and intermediate reference voltage input can be abbreviated • Cascade connection • Sampling sequence : Output shift direction can be selected XO1, YO1, ZO1/XO108, YO108, ZO108 or ZO108, YO108, XO108/ZO1, YO1, XO1 • Shift clock frequency : 55 MHz (MAX.) • Supply voltages – VCC (for logic system) : +2.7 to +3.6 V – VLS (for LCD drive system) : +12 V (MAX.) • Package : 395-pin TCP (Tape Carrier Package) 395 394 393 392 391 390 GND VLS GND MODE PBS XB5 385 XB0 384 XA5 CHIP SURFACE 379 XA0 378 YA5 373 372 371 370 369 368 367 366 365 364 363 362 361 360 359 358 357 356 355 354 353 352 351 350 349 348 347 346 YA0 SPOI VH0 VH8 VH16 VH24 VH32 VH40 VH48 VH56 VH63 VL63 VL56 VL48 VL40 VL32 VL24 VL16 VL8 VL0 POLB POLA CK SPIO LS REV2 REV YB5 341 YB0 340 ZB5 335 ZB0 334 ZA5 329 328 327 326 325 ZA0 LBR VCC VLS GND XO108 322 YO108 323 ZO108 324 NOTE : Doesn't prescribe TCP outline. In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device. 1 LH168K PIN DESCRIPTION PIN NO. 1 to 324 SYMBOL XO1-ZO108 I/O O LCD drive output pins 325, 393, 395 326, 394 GND VLS – Ground pins – Power supply pins for analog circuit 327 VCC 328 LBR – I Power supply pin for digital circuit Shift direction selection input pin 329 to 334 ZA0-ZA5 ZB0-ZB5 I I Data input pins Data input pins 341 to 346 YB0-YB5 I Data input pins 347, 348 REV, REV2 349 LS I I LCD drive output polarity exchange input pins Latch input pin 350 351 SPIO CK I/O I 335 to 340 DESCRIPTION Start pulse input/cascade output pin Shift clock input pin 352, 353 POLA, POLB I Input data polarity exchange input pins 354 to 362 VL0-VL63 363 to 371 VH63-VH0 I I Reference voltage input pins Reference voltage input pins 372 373 to 378 SPOI I/O YA0-YA5 I Data input pins 379 to 384 XA0-XA5 I Data input pins 385 to 390 XB0-XB5 I Data input pins 391 PBS I 2-port/1-port selection input pin 392 MODE I Input pin for selecting the number of LCD drive outputs Start pulse input/cascade output pin 2 LH168K BLOCK DIAGRAM VCC GND GND GND 327 325 393 395 MODE 392 LBR 328 SPOI 372 PBS 391 SHIFT REGISTER CK 351 350 SPIO POLA 352 PLOB 353 1 2 XA0 379 385 XB0 XA5 384 390 XB5 YA0 373 341 YB0 YA5 378 346 YB5 ZA0 329 335 ZB0 ZA5 334 340 ZB5 108 6x2 DATA LATCH 6x2 SAMPLING MEMORY 6x2 6 6 6 6 6 LS 349 HOLD MEMORY 6 326 VLS LEVEL SHIFTER 6 6 6 VH0 371 VH63 363 VL63 362 18 REFERENCE VOLTAGE GENERATION CIRCUIT DA CONVERTER 64 x 2 VL0 354 REV 347 OUTPUT CIRCUIT REV2 348 1 2 3 XO1 YO1 ZO1 3 322 323 324 XO108 YO108 ZO108 394 VLS LH168K FUNCTIONAL OPERATIONS OF EACH BLOCK BLOCK Shift Register FUNCTION Used as a bi-directional shift register which performs the shifting operation by CK and Data Latch selects bits for data sampling. Used to temporary latch the input data which is sent to the sampling memory. Sampling Memory Hold memory Used to sample the data to be entered by time sharing. Used for latch processing of data in the sampling memory by LS input. Level Shifter Used to shift the data in the hold memory to the power supply level of the analog circuit unit and sends the shifted data to DA converter. Reference Voltage Generation Circuit DA Converter Output Circuit Used to generate a gamma-corrected 64 x 2-level voltage by the resistor dividing circuit. Used to generate an analog signal according to the display data and sends the signal to the output circuit. Used as a voltage follower, configured with an operational amplifier and an output buffer, which outputs analog signals of 64 x 2 gray scales to LCD drive output pin. INPUT/OUTPUT CIRCUITS VCC ¿Applicable pins¡ CK, LS, REV, LBR, To Internal Circuit MODE, PBS, XA0-XA5, XB0-XB5, YA0-YA5, YB0-YB5, ZA0-ZA5, ZB0-ZB5 I GND Fig. 1 Input Circuit (1) VCC I To Internal Circuit GND ¿Applicable pins¡ POLA, POLB, REV2 GND Fig. 2 Input Circuit (2) 4 LH168K Pch Tr I VCC Output Signal O Output Control Signal Nch Tr GND VCC To Internal Circuit ¿Applicable pins¡ SPIO, SPOI GND Fig. 3 Input/Output Circuit VLS Operational Amplifier O + From Internal Circuit ¿Applicable pins¡ XO1-XO108, YO1-YO108, ZO1-ZO108 – GND Fig. 4 Output Circuit 5 LH168K FUNCTIONAL DESCRIPTION Pin Functions SYMBOL VCC VLS FUNCTION Used as power supply pin for digital circuit, connected to +2.7 to +3.6 V. GND Used as power supply pin for analog circuit, connected to +8.0 to +12.0 V. Used as ground pin, connected to 0 V. SPIO Used as input pins of start pulse and also used as output pins for cascade connection. When "H" is input into start pulse input pin, data sampling is started. On completion of SPOI sampling, "H" pulse is output to output pin for cascade connection. Pin functions are LBR LS CK VH0-VH63 VL0-VL63 selected by LBR. For selecting, refer to "Functional Operations". Used as input pin for selecting the shift register direction. For selecting, refer to "Functional Operations". Used as input pin for parallel transfer from sampling memory to hold memory. Data is transferred at the rising edge and output from LCD drive output pin. Used as shift clock input pin. Data is latched into sampling memory from data input pin at the rising edge. Used as reference voltage input pins. Hold the reference voltage fixed during the period of LCD drive output. For relation between input data and output voltage values, refer to "Output Voltage Value". For internal gamma correction, refer to "Gamma Correction Value". Observe the following relation for input voltage. VLS > VH0 ≥ VH8 ≥ π ≥ VH63 ≥ VL63 ≥ VL56 ≥ π ≥ VL0 > GND. XA0-XA5 Used as data input pins of R, G, and B colors. 6-bit data are input from data pins at the rising edge of CK. When PBS is "L", 2-pixel data are input from XA0 to XA5, YA0 to YA5, YA0-YA5 ZA0 to ZA5 and XB0 to XB5, YB0 to YB5, ZB0 to ZB5 at the same time. ZA0-ZA5 XB0-XB5 When PBS is "H", 1-pixel data is input from XA0 to XA5, YA0 to YA5 and ZA0 to ZA5, and fixed XB0 to XB5, YB0 to YB5 and ZB0 to ZB5 to "L" or "H". For relation between input data YB0-YB5 ZB0-ZB5 and output voltage values, refer to "Functional Operations" and "Output Voltage Value". Select the data to be entered into X, Y, and Z according to picture element arrays of the panel. Used as input pin for selecting the number of LCD drive outputs, which sets up operation mode with PBS pin. When "L" is entered, it becomes 324-output/2-port input mode at PBS MODE pin "L" or 321-output/1-port input mode at PBS pin "H". When "H" is entered, it becomes 312-output/2-port input mode at PBS pin "L" or 309-output/1-port mode at PBS pin "H". For selecting the number of LCD drive outputs, refer to "Output Characteristics". Used as 2-port/1-port exchange input pin to take in data. When "L" is entered, it becomes PBS 2-port input mode and 2-pixel data are input at the same time. When "H" is entered, it becomes 1-port input mode. 6 LH168K SYMBOL FUNCTIONS Used as LCD drive output pins which output the voltage corresponding to the input of data input pins. When 321-output mode, 3 outputs (XO54 to ZO54) are invalid. When 312-output XO1-XO108 YO1-YO108 ZO1-ZO108 mode, 12 outputs (XO55 to XO58, YO55 to YO58, ZO55 to ZO58) are invalid. When 309outputs mode, 15 outputs (XO54 to XO58, YO54 to YO58, ZO54 to ZO58) are invalid. Invalid output pins must be opened. Data of XO1 to XO108 correspond to XA0 to XA5 and XB0 to XB5. Data of YO1 to YO108 correspond to YA0 to YA5 and YB0 to YB5, and data of ZO0 to ZO108 correspond to ZA0 to ZA5 and ZB0 to ZB5. For relation between input data and output voltage values, refer to "Functional Operations" and "Output Voltage Value". Used as input pins for input data polarity exchange, POLA corresponds to XA0 to XA5, YA0 POLA POLB to YA5 and ZA0 to ZA5, and POLB corresponds to XB0 to XB5, YB0 to YB5 and ZB0 to ZB5. When "L" is entered, display data becomes normal mode. When "H" is entered, input data becomes polarity exchange mode. For relation between input data and output voltage values, refer to "Output Voltage Value". These pins are pulled down at the inside. Used as polarity exchange pins of LCD drive output. Data is taken at the term when LS is REV REV2 "H" and the output polarity of the LCD drive output pin is determined. Function of REV is the same as function of REV2. Input polarity exchange signal to REV, and REV2 is fixed to "L" or opened in general. When 321-output/309-output mode, it is possible to exchange output polarity between LCD driver next to each other by fixing REV2 to "L" or "H" according to position on panel. For exchanging, refer to "Output Characteristics". REV2 pin is pulled down at the inside. 7 LH168K Functional Operations The following describes the relation between data input pin and output direction. (1) PBS = "L" Data input pin XA0-XA5 YA0-YA5 ZA0-ZA5 XB0-XB5 YB0-YB5 ZB0-ZB5 Output direction XO1 YO1 ZO1 XO2 YO2 ZO2 πππ πππ XB0-XB5 YB0-YB5 ZB0-ZB5 XO108 YO108 ZO108 (2) PBS = "H" Data input pin XA0-XA5 YA0-YA5 ZA0-ZA5 XA0-XA5 YA0-YA5 ZA0-ZA5 Output direction XO1 YO1 ZO1 XO2 YO2 ZO2 πππ πππ XA0-XA5 YA0-YA5 ZA0-ZA5 XO108 YO108 ZO108 The following describes the relation between LBR pin, SPOI pin, SPIO pin and output direction. PIN OUTPUT DIRECTION LBR SPOI RIGHT SHIFT (XO1, YO1, ZO1/XO108, YO108, ZO108) H Input LEFT SHIFT (ZO108, YO108, XO108/ZO1, YO1, XO1) L Output SPIO Output Input NOTE : Color data corresponding to X, Y, and Z vary depending on the output direction. 8 LH168K Output Characteristics The following describes the relation between operation mode, REV pin, REV2 pin and output polarity of LCD drive pin. MODE PBS Operation XO1 YO1 ZO1 XO2 YO2 ZO2 WHEN REV = "L", REV2 = "L" or REV = "H", REV2 = "H" L L H H L H L H WHEN REV = "H", REV2 = "L" or REV = "L", REV2 = "H" L L H H L H L H 324-output mode 321-output mode 312-output mode 309-output mode 324-output mode 321-output mode 312-output mode 309-output mode – + – + – + XO53 YO53 ZO53 XO54 YO54 ZO54 XO55 YO55 ZO55 XO56 YO56 ZO56 XO57 YO57 ZO57 XO58 YO58 ZO58 XO59 YO59 ZO59 – + – + – + – + – + – + – + – + – + – + – XO107 YO107 ZO107 XO108 YO108 ZO108 – + – + – + – – – + + + + + + – – – – – – + + + + + + – – – – – – + + + + + + – – – --------------------------------------------------------------------------------------– – – + + + + + + – – – – – – + + + NA + NA – NA – NA – NA + NA + NA + NA – NA – + NA NA + – NA – NA NA – + NA + NA NA + – NA – NA NA – + NA + NA NA + – NA – NA NA – + NA + NA NA + – NA – NA NA – + NA + NA NA + – NA – NA NA – + NA + NA NA + – NA – NA NA – + NA + – + + – + – + – – + – + – + + – + --------------------------------------------------------------------------------------+ – + + – + – + – – + – + – + + – + – + – – + – + – + + – + – + – – + – NOTES : + : The gray scale voltages corresponding to reference voltage VH0 to VH63 are output. – : The gray scale voltages corresponding to reference voltage VL0 to VL63 are output. NA : Non active. Must be opened. 9 + – + – + – + – + NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA – + – – + – + – + LH168K Output Voltage Value Two voltages are selected from all of the reference voltages (V0-V63) by the upper 3-bit data (D5, D4 and D3) of the 6-bit input data (D5, D4, D3, D2, D1 and D0) taken by time sharing, and intermediate value is determined by the lower 3-bit data (D2, D1 and D0). INPUT The Vi is a reference voltage (VHi or VLi) that is determined by the polarity exchange input (REV and REV2). Relation between input data and output voltage values is shown below. (i = 0, 8, 16, 24, 32, 40, 48, 56, 63) OUTPUT VOLTAGE INPUT OUTPUT VOLTAGE DATA 0 1 POLA (POLB) = "L" V0 V8 + (V0 – V8) x 7/8 POLA (POLB) = "H" DATA POLA (POLB) = "L" POLA (POLB) = "H" V63 20 V32 V32 + (V24 – V32) x 1/8 V63 + (V56 – V63) x 1/7 21 V40 + (V32 – V40) x 7/8 V32 + (V24 – V32) x 2/8 2 V8 + (V0 – V8) x 6/8 V8 + (V0 – V8) x 5/8 V63 + (V56 – V63) x 2/7 V63 + (V56 – V63) x 3/7 22 23 V40 + (V32 – V40) x 6/8 V32 + (V24 – V32) x 3/8 V40 + (V32 – V40) x 5/8 V32 + (V24 – V32) x 4/8 5 V8 + (V0 – V8) x 4/8 V8 + (V0 – V8) x 3/8 V63 + (V56 – V63) x 4/7 V63 + (V56 – V63) x 5/7 24 25 V40 + (V32 – V40) x 4/8 V32 + (V24 – V32) x 5/8 V40 + (V32 – V40) x 3/8 V32 + (V24 – V32) x 6/8 6 V8 + (V0 – V8) x 2/8 V63 + (V56 – V63) x 6/7 26 V40 + (V32 – V40) x 2/8 V32 + (V24 – V32) x 7/8 7 V8 + (V0 – V8) x 1/8 V56 27 V40 + (V32 – V40) x 1/8 V24 8 V8 V56 + (V48 – V56) x 1/8 28 V40 V24 + (V16 – V24) x 1/8 29 V48 + (V40 – V48) x 7/8 V24 + (V16 – V24) x 2/8 A V16 + (V8 – V16) x 7/8 V56 + (V48 – V56) x 2/8 V16 + (V8 – V16) x 6/8 V56 + (V48 – V56) x 3/8 2A V48 + (V40 – V48) x 6/8 V24 + (V16 – V24) x 3/8 B V16 + (V8 – V16) x 5/8 V56 + (V48 – V56) x 4/8 2B V48 + (V40 – V48) x 5/8 V24 + (V16 – V24) x 4/8 C V16 + (V8 – V16) x 4/8 V56 + (V48 – V56) x 5/8 V16 + (V8 – V16) x 3/8 V56 + (V48 – V56) x 6/8 2C 2D V48 + (V40 – V48) x 4/8 V24 + (V16 – V24) x 5/8 V48 + (V40 – V48) x 3/8 V24 + (V16 – V24) x 6/8 V16 + (V8 – V16) x 2/8 V56 + (V48 – V56) x 7/8 V16 + (V8 – V16) x 1/8 V48 2E 2F V48 + (V40 – V48) x 2/8 V24 + (V16 – V24) x 7/8 V48 + (V40 – V48) x 1/8 V16 3 4 9 D E F 10 V48 + (V40 – V48) x 1/8 30 V24 + (V16 – V24) x 7/8 V48 + (V40 – V48) x 2/8 V24 + (V16 – V24) x 6/8 V48 + (V40 – V48) x 3/8 31 32 V56 + (V48 – V56) x 7/8 V16 + (V8 – V16) x 2/8 V56 + (V48 – V56) x 6/8 V16 + (V8 – V16) x 3/8 14 V24 + (V16 – V24) x 5/8 V48 + (V40 – V48) x 4/8 V24 + (V16 – V24) x 4/8 V48 + (V40 – V48) x 5/8 33 34 V56 + (V48 – V56) x 5/8 V16 + (V8 – V16) x 4/8 V56 + (V48 – V56) x 4/8 V16 + (V8 – V16) x 5/8 15 V24 + (V16 – V24) x 3/8 V48 + (V40 – V48) x 6/8 35 V56 + (V48 – V56) x 3/8 V16 + (V8 – V16) x 6/8 16 36 V56 + (V48 – V56) x 2/8 V16 + (V8 – V16) x 7/8 17 V24 + (V16 – V24) x 2/8 V48 + (V40 – V48) x 7/8 V24 + (V16 – V24) x 1/8 V40 37 V56 + (V48 – V56) x 1/8 18 19 V24 V40 + (V32 – V40) x 1/8 + (V24 – V32) x 7/8 V40 + (V32 – V40) x 2/8 38 39 V63 V56 + (V56 – V63) x 6/7 V8 + (V0 – V8) x 1/8 V8 + (V0 – V8) x 2/8 1B V32 + (V24 – V32) x 6/8 V40 + (V32 – V40) x 3/8 V32 + (V24 – V32) x 5/8 V40 + (V32 – V40) x 4/8 3A 3B V63 + (V56 – V63) x 5/7 V63 + (V56 – V63) x 4/7 V8 + (V0 – V8) x 3/8 V8 + (V0 – V8) x 4/8 1C V32 + (V24 – V32) x 4/8 V40 + (V32 – V40) x 5/8 3C V63 + (V56 – V63) x 3/7 V8 + (V0 – V8) x 5/8 1D 1E V32 + (V24 – V32) x 3/8 V40 + (V32 – V40) x 6/8 V32 + (V24 – V32) x 2/8 V40 + (V32 – V40) x 7/8 3D 3E V63 + (V56 – V63) x 2/7 V63 + (V56 – V63) x 1/7 V8 + (V0 – V8) x 6/8 V8 + (V0 – V8) x 7/8 1F V32 + (V24 – V32) x 1/8 3F V63 V0 11 12 13 1A V16 V32 V32 10 V48 V16 + (V8 – V16) x 1/8 V8 LH168K ‹ (Gamma) Correction Value Between reference voltage input pins VH0 and VH63, 63 resistors are connected in series. And between reference voltage input pins VL0 and VL63, 63 resistors are connected in series. No resistor is connected between reference voltage input pins VH63 and VL63. The ‹ correction curve is a broken line connected between intermediate voltage inputs (VH8, VH16, VH24, VH32, VH40, VH48, VH56, VL8, VL16, VL24, VL32, VL40, VL48 and VL56). Each ‹ correction value between the intermediate voltage inputs is divided into 7 or 8 parts by the same resistor. LH168K VH0 VH8 VH16 VH24 VH32 External Reference Voltage VH40 VH48 VH56 VH63 R0 8 equal parts R1 8 equal parts R2 8 equal parts R3 8 equal parts R4 8 equal parts R5 8 equal parts R6 8 equal parts R7 7 equal parts R8 7 equal parts R9 8 equal parts R10 8 equal parts R11 8 equal parts R12 8 equal parts R13 8 equal parts R14 8 equal parts R15 8 equal parts VL63 VL56 VL48 VL40 VL32 VL24 VL16 VL8 VL0 The following shows the ratio of ‹ correction resistance, when R0 equals 1. R0 1.00 R8 0.20 R1 0.20 0.10 R9 0.10 0.10 R2 R3 R10 R11 R4 0.10 0.10 R12 0.10 0.10 R5 0.10 R13 0.10 R6 0.10 0.20 R14 0.20 1.00 R7 R15 11 LH168K PRECAUTIONS Reference voltage input The relation of the reference voltage input is shown here. Precautions when connecting or disconnecting the power supply This IC has some power supply pins, so it may be permanently damaged by a high current which may flow if voltage is supplied to the LCD drive power supply while the logic system power supply is floating. Therefore, when connecting the power supply, observe the following sequence. VLS > VH0 ≥ VH8 ≥ π ≥ VH56 ≥ VH63 ≥ 0.5VLS ≥ VL63 ≥ VL56 ≥ π ≥ VL8 ≥ VL0 > GND Maximum ratings When connecting or disconnecting the power supply, this IC must be used within the range of the absolute maximum ratings. VCC / logic input / VLS, VH0-VH63, VL0-VL63 When disconnecting the power supply, follow the reverse sequence. Target output load This IC is designed for a 150 pF output load capacity. When using this IC for other than 150 pF panels, confirm the device is having no problem before using it. ABSOLUTE MAXIMUM RATINGS PARAMETER Supply voltage Input voltage Output voltage Storage temperature SYMBOL VCC VLS VI VI VO VO TSTG APPLICABLE PINS VCC VLS VH0-VL0 SPIO, SPOI, CK, LS, REV, REV2, LBR, POLA, POLB, MODE, PBS, XA0-XA5, XB0-XB5, YA0-YA5, YB0-YB5, ZA0-ZA5, ZB0-ZB5 SPIO, SPOI XO1-ZO108 RATING –0.3 to +6.0 –0.3 to +13.0 –0.3 to VLS + 0.3 UNIT V V V –0.3 to VCC + 0.3 V –0.3 to VCC + 0.3 –0.3 to VLS + 0.3 –45 to +125 V V ˚C NOTES : 1. TA = +25 ˚C 2. The maximum applicable voltage on any pin with respect to GND (0 V). RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN. VCC +2.7 Supply voltage +8.0 VLS VH0-VH63 0.5VLS Reference voltage input VL0-VL63 +0.1 Clock frequency fCK LCD drive output load capacity CL TOPR –20 Operating temperature TYP. MAX. UNIT +3.6 V +12.0 V VLS – 0.1 V 0.5VLS V 55 MHz 150 pF +75 ˚C NOTE : 1. The applicable voltage on any pin with respect to GND (0 V). 12 NOTE 1 NOTE 1, 2 LH168K ELECTRICAL CHARACTERISTICS DC Characteristics PARAMETER Input "Low" voltage (VCC = +2.7 to +3.6 V, VLS = +8.0 to +12.0 V, TOPR = –20 to +75 ˚C) SYMBOL CONDITIONS VIL APPLICABLE PINS XA0-XA5, YA0-YA5, ZA0-ZA5, MIN. XB0-XB5, YB0-YB5, ZB0-ZB5, TYP. MAX. UNIT GND 0.3VCC V 0.7VCC VCC V GND GND + 0.4 V VCC – 0.4 VCC V 10 µA 10 µA 400 µA 12 mA 1.5 mA 4.5 mA 3.5 mA GND + 0.2 VLS – 0.2 V –20 +20 mV NOTE SPIO, SPOI, CK, LS, LBR, Input "High" voltage REV, REV2, POLA, POLB, VIH MODE, PBS Output "Low" voltage VOL IOL = 0.3 mA Output "High" voltage VOH IOH = –0.3 mA SPIO, SPOI XA0-XA5, YA0-YA5, ZA0-ZA5, XB0-XB5, YB0-YB5, ZB0-ZB5, Input "Low" current IILL1 SPIO, SPOI, CK, LS, LBR, REV, REV2, POLA, POLB, MODE, PBS XA0-XA5, YA0-YA5, ZA0-ZA5, Input "High" current XB0-XB5, YB0-YB5, ZB0-ZB5, IILH1 SPIO, SPOI, CK, LS, LBR, REV, MODE, PBS POLA, POLB, REV2 IILH2 Supply current (In operation mode) fCK = 55 MHz ICC1 fLS = 50 kHz (Data sampling state) fCK = 55 MHz Supply current (In standby mode) Supply current (In operation mode) ICC2 fLS = 50 kHz SPI = GND is fixed. (Standby state) fCK = 55 MHz ILS1 fLS = 50 kHz (Data sampling state) fCK = 55 MHz Supply current (In standby mode) VCC-GND ILS2 VLS-GND fLS = 50 kHz SPI = GND is fixed. (Standby state) Output voltage range Deviations between output voltage pins VOUT VOD Output current IO1-IO4 Resistance between reference voltage input pins RGMAH RGMAL XO1-ZO108 VH0-VH63 VL0-VL63 13 200 µA 20 20 k$ k$ 1 2 LH168K NOTES : 1. Criterion of evaluating voltage deviations. (a) Between output voltage pins Measuring values : Output voltage value at the time after 10 µs at the rising edge of LS. (Average of several times) (Conditions) Output load capacity is 150 pF. In a state when the reference voltage is fixed. Expecting values : Calculated following these specifications. (Conditions) In a state when the reference voltage is fixed. (b) Between LCD drivers Measuring values : Applicable to (a). (Conditions) Applicable to (a). Expecting values : Applicable to (a). (Conditions) Applicable to (a). Each input voltage between the LCD drivers must be made perfectly equal by connecting corresponding reference voltage input pins. 2. IO1 : Applied voltage = 8.0 V for output pins XO1 to ZO108. Output voltage = 7.5 V for output pins XO1 to ZO108. VLS = 10.0 V IO2 : Applied voltage = 7.0 V for output pins XO1 to ZO108. Output voltage = 7.5 V for output pins XO1 to ZO108. VLS = 10.0 V IO3 : Applied voltage = 3.0 V for output pins XO1 to ZO108. Output voltage = 2.5 V for output pins XO1 to ZO108. VLS = 10.0 V IO4 : Applied voltage = 2.0 V for output pins XO1 to ZO108. Output voltage = 2.5 V for output pins XO1 to ZO108. VLS = 10.0 V 14 LH168K AC Characteristics PARAMETER Clock frequency "H" level pulse width "L" level pulse width (VCC = +2.7 to +3.6 V, VLS = +8.0 to +12.0 V, TOPR = –20 to +75 ˚C) SYMBOL CONDITIONS fCK tCR Input fall time tCF CK Data setup time tSUD XA0-XA5, YA0-YA5, ZA0-ZA5, XB0-XB5, YB0-YB5, ZB0-ZB5, Data hold time tHD POLA, POLB Start pulse setup time tSUSP Start pulse hold time tHSP Start pulse width tWSP Start pulse output delay time LCD drive output delay time 1 LCD drive output delay time 2 CL = 15 pF tDO1 CL = 150 pF tDO2 LS signal-CK signal hold time tHLS setup time REV signal-LS signal hold time MAX. 55 UNIT MHz ns ns 10 ns 10 ns 4 ns 0 ns 4 0 ns ns 1 -------fCK ns 12 ns 3 µs 10 µs XO1-ZO108 tLSSP width REV signal-LS signal TYP. 4 SPIO, SPOI tDSP LS signal-SPI signal setup time LS signal "H" level MIN. 4 tCWH tCWL Input rise time APPLICABLE PINS CL = 150 pF 1 -------fCK ns 7 ns tWLS 1 -------fCK ns tSURV 14 ns 10 ns LS REV, REV2 tHRV 15 LH168K Timing Chart 1 fCK tcWH tcWL 1 CK tSUSP tHSP tCR 2 tCF SPIO Input (SPOI) tWSP XA0-XA5 YA0-YA5 ZA0-ZA5 XB0-XB5 YB0-YB5 ZB0-ZB5 POLA POLB CK tHD tSUD 1 LAST – 1 LAST tDSP SPIO Output (SPOI) tHLS tWLS LS tLSSP SPIO Input (SPOI) tSURV tHRV REV REV2 tDO1 Target voltage ±(VLS x 0.1) XO1-ZO108 Target voltage (6-bit accuracy) tDO2 16 2