CXA1785AR RGB Decoder/Driver For the availability of this product, please contact the sales office. Description The CXA1785AR is an RGB decoder/driver designed to drive LCD panels. This IC converts composite video signals, Y/C signals and Y/color difference signals into RGB signals used for driving LCDs. Features • Both NTSC/PAL compatible • Supports composite inputs, Y/C inputs and Y/color difference input • Band pass filter, trap and delay line • Sharpness function • γ compensation circuit • R, B output delay time adjustment circuit • Polarity reverse circuit Applications • Color liquid crystal viewfinders • Liquid crystal projectors • Industrial monitors Structure Bipolar silicon monolithic IC 48 pin LQFP (Plastic) Absolute Maximum Ratings (Ta=25°C) • Supply voltage VCC1-GND 6 V • Supply voltage VCC2-VEE 15 V • Supply voltage GND-VEE 10 V • Input pin voltage VIN VCC1 V • Operating temperature Topr –30 to +85 °C • Storage temperature Tstg –55 to +150 °C • Allowable power dissipation PD 560 mW Operating Conditions • Supply voltage VCC1-GND 4.25 to 5.25 V • Supply voltage VCC2-GND 4.25 to 14.0 V • Supply voltage VCC2-VEE 11.25 to 14.0 V • Supply voltage VEE-GND –8.75 to 0 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E93Z28-TE CXA1785AR SUB CONTRAST B SUB CONTRAST R DL ADJ BRIGHT GAMMA 2 GAMMA 1 FRP SUB BRIGHT B SUB BRIGHT R CLIP 36 35 34 33 32 31 30 29 28 27 26 37 38 B-Y BGP GEN 39 EXT G IN 40 INT / EXT SW BGP G-Y INV BRIGHT γ DL 41 INV BRIGHT γ R-Y EXT R IN γ DL MATRI X EXT B IN INV BRIGHT Y CONTRAST AAA CLAMP AGC AMP 44 AGC DET CLAMP DEMOD G GEN 42 43 Vcc1 F ADJ N P N 47 PICTURE 48 F/F COLOR AA KILLER ACC DET Y/C 4 5 6 7 8 9 10 11 12 COLOR KILLER FILTER R-Y B-Y ACC FILTER CHROMA OUT NT/PAL/ COLOR DEFFER BURST OUT VIDEO IN 14 COMP PAL ON —2— VXO OUT HUE C IN H FILTER OUT R DC DET 15 APC FILTER IDENT FILTER TRAP 19 VXO APC ACC 3 20 R OUT N H. FILTER 2 21 G DC DET IDENT TRAP 1 22 G OUT 16 HPF B DC DET GND 17 P COMP Y/C AGC OUT 23 P REG2 REG1 24 B OUT VEE 18 PICTURE 46 PN PHASE SHIFT PAL SW EXT SYNC REG3 P 45 N AGC FILTER AA AA AA AA AA AA AA AAAA VREF SYNC SEP SYNC SEP 25 VCC2 SYNC OUT SYNC IN Block Diagram VXO IN 13 HUE CXA1785AR Pin Description (The pin voltage is VCC1 = 4.5 V) Pin No. Symbol Pin voltage 1 TRAP 2.0V Equivalent circuit Description Trap connection. Leave this pin open other than when composite video input is selected. VCC1 1 VEE 2 H FILTER OUT GND Outputs the video signal to be input to the sync separation circuit. VCC1 2 GND VEE 3 VIDEO IN 2.25V Composite video signal input (Y signal when using Y/C input and Y/color difference input). The standard input level is 0.5 VP-P (from sync tip to 100 % white). VCC1 3 VEE 4 IDENT FILTER GND IDENT detection filter connection. Leave this pin open other than when PAL mode is selected. VCC1 4 VEE GND 5 C IN 2.5V VCC1 5 VEE GND —3— Chroma signal input when using Y/C input. Composite video signal input is supported when this pin is connected to GND. Leave this pin open when Y/color difference input. The standard input level is 0.15 VP-P (burst). CXA1785AR Pin No. Symbol 6 COLOR Pin voltage Equivalent circuit Description Color adjustment. The amplitude of color difference signal is adjusted when Y/color difference input. VCC1 6 VEE GND 7 BURST OUT Burst cleaning coil is connected for PAL. Leave this pin open other than when PAL mode is selected. 3.2V VCC1 7 VEE GND 8 KILLER FILTER Killer detection filter is connected. Leave this pin open other than when Y/color difference input is selected. VCC1 8 GND VEE 9 R–Y 1.9V VCC1 9 10 B–Y 1.9V 10 VEE GND 11 ACC FILTER Color difference demodulation circuit inputs. Leave this pin open for NTSC. Color difference signal is input when Y/color difference input. In this case, input is pedestal clamped by using external coupling capacitor. ACC detection filter is connected. Leave this pin open for Y/color difference input. VCC1 11 VEE —4— CXA1785AR Pin No. Symbol Pin voltage 12 CHROMA OUT 2.3V Equivalent circuit Description Color adjusted and burst taken out chroma signal is output. VCC1 12 VEE 13 HUE GND VCC1 13 VEE GND 14 VXO IN 3.9V VCC1 Color phase adjustment pin. Also doubles as the NTSC, PAL or Y/color difference switch. PAL is selected when this pin is connected to GND; Y/color difference is selected when this pin is connected to Vcc1. VXO input. Leave this pin open for Y/color difference input. 14 GND VEE 15 APC FILTER APC detection filter connection. Leave this pin open for Y/color difference input. VCC1 15 VEE GND 16 VXO OUT 2.7V VXO output. Leave this pin open for Y/color difference input. VCC1 16 VEE GND 17 GND Ground. 18 VEE Minimum electric potential connection. —5— CXA1785AR Pin No. Symbol 19 R DC DET 21 G DC DET 23 B DC DET Pin voltage Equivalent circuit Description Smoothing capacitor connection for the feedback circuit of RGB output DC level control . Use a low-leakage capacitor because this pin has high impedance. VCC1 19 21 23 GND VEE 20 R OUT 22 G OUT 24 B OUT Vcc2+VEE 2 RGB primary color signal output. VCC2 20 22 24 VEE 25 VCC2 26 CLIP 2.3V Power supply connection for RGB output. Sets the RGB output amplitude (black-black) clip level. This pin is preset internally. VCC1 26 GND 27 SUB BRIGHT R 2.2V Fine adjustment for R and B signal brightness. Functions with the γ compensation curve. This pin is preset internally. VCC1 27 28 SUB BRIGHT B 2.2V 28 GND VEE 29 Polarity reverse timing pulse input for RGB output. Reversed when low; nonreversed when high. FRP VCC1 29 VEE GND —6— CXA1785AR Pin No. Symbol 30 GAMMA1 Pin voltage Equivalent circuit Description Adjusts voltage gain change point γ1. VCC1 Output 30 γ1 VEE GND Input 31 GAMMA2 Adjusts voltage gain change point γ2 and the peak limiter that operates by Vw γ2 above γ2.This pin is preset internally. 2.25V VCC1 31 Output Peak limiter Vwγ 2 γ2 VEE GND Input 32 BRIGHT RGB output brightness adjustment. Does not function with the gamma compensation curve. VCC1 32 GND VEE 33 DL ADJ 1.2V VCC1 33 VEE GND 34 35 SUB CONTRAST R SUB CONTRAST B 2.25V VCC1 2.25V 34 35 VEE GND —7— Adjusts delay time of R and B output for G output. The delay time is adjusted by changing the resistance value between this pin and GND. The B output delay time is twice the R output delay time. Connecting this pin to VCC turns off the R output and B output delay circuits. Fine adjustment for R and B signal contrast. This pin is preset internally. CXA1785AR Pin No. Symbol 36 SYNC IN Pin voltage Equivalent circuit Description VCC1 36 VEE 37 GND SYNC OUT Vcc1 37 VEE 38 SYNC SEP GND 1.8V VCC1 High level input when synchronized; low level at all other times. The rising edge of the input pulse must precede the falling edge of the SYNC OUT pulse. For PAL, the internal flip flop switches at the rising edge of the input pulse. Outputs the sync signal separated by the sync separation circuit. High level when synchronized and at low level in all other cases. This pin is of an open collector output. The high level for the output should be VEE + 15 V or less. Sync separation circuit input. Input the H FILTER output signal. 38 VEE 39 EXT B IN 40 EXT G IN GND VCC1 39 40 41 EXT R IN 41 GND VEE 42 CONTRAST VCC1 42 VEE GND —8— External digital signal input. There are two threshold values: VTH1 (approximately 1.2 V) and VTH2 (approximately 2.2 V). When one of the RGB signals exceeds VTH1, all of the RGB outputs go to black level; when an input exceeds VTH2, only the corresponding output goes to white level. Adjusts RGB output contrast. CXA1785AR Pin No. Symbol Pin voltage 43 44 VCC1 F ADJ 1.2V Equivalent circuit VCC1 44 GND VEE 45 CLAMP VCC1 45 VEE 46 AGC FILTER Description Power supply connection. Connect a resistance between this pin and GND; the outflow current value adjusts the internal filters. Connect 18 kΩ for both NTSC and PAL. The following conditions apply to the resistance connected: Allowable difference in resistance: ±2 % Temperature characteristics: ±200 ppm Clamps the luminance signal pedestal level. Use a low-leakage capacitor because this pin has high impedance. GND Connects AGC detection filter of luminance signal. VCC1 46 GND VEE 47 AGC OUT Outputs the voltage detected by the AGC detection circuit of luminance signal. When the AGC amplifier gain is high, the output voltage is high. VCC1 47 VEE 48 PICTURE GND Adjusts frequency response of luminance signal. Decreasing the voltage emphasizes contours. VCC1 48 VEE GND —9— CXA1785AR Electrical Characteristics AC Characteristics Unless otherwise specified, VCC1 = 4.5 V, VCC2 = 12 V, VEE = GND, Ta = 25°C, SW5→a, SW8→a, SW9→b, SW10→b, SW12A→a, SW12B→ON, SW13→b, SW20→OFF, SW22→OFF, SW24→OFF SW26→OFF, SW27→OFF, SW28→OFF, SW31→OFF, SW33→b, SW34→OFF, SW35→OFF, SW38→a, SW46→OFF. V5 = 0 V, V6 = 2.6 V, V13 = 2.7 V, V30 = 3.5 V, V32 = 2.1 V, V42 = 2.25 V, V46 = 1.5 V, V48 = 2.5 V, and VR1=6.8 kΩ (C): input SG11, (D): input SG7b (4.5 VP-P) Note) Adjust the burst cleaning coil so that the amplitude of the color difference signal is the same at each 1H of TP20 when SG5 (4.43 MHz, burst/chroma phase = ±135°) is input to (B) with a standard sample. Item Video Block Video maximum gain Amount of contrast adjustment gain variation (1) Amount of contrast adjustment gain variation (2) AGC amplitude characteristics Symbol Conditions Min. Typ. Max. Gmax V42 = 1.2 V, input SG8 (-15 dB) to (A). Measure the ratio between the output amplitude (white-black) and input amplitude at TP22. Input SG8 (-14 dB) to (A). V1, V0, and V2 are the output amplitude (white-black) at TP22 when V42 is changed to 1.2 V, 2.25 V and 3.3 V. Gct1 = 20log (V1/V0) Gct2 = 20log (V2/V0) 33 36 39 3.0 5.5 Gct1 Gct2 Va1 Va2 AGC detection output Amount of image quality adjustment variation (composite video input, NTSC) Amount of image quality adjustment variation (composite video input, PAL) Vad1 Vad2 Vad3 Gp1 Gp2 Gp3 Gp4 Input SG1 (0 dB) to (A) and adjust V42 so that TP22 output amplitude (white-black) is 4 V when APL = 50 % Va1 and Va2 are the amplitude at TP22 when APL = 10 % and 90 %. Input SG1 (0 dB) to (A). Vad1, Vad2, and Vad3 are the voltage at TP47 when APL = 10 %, 50 %, and 90 %. SW5→b, SW46→ON Input SG2 (100 kHz) to (A) and adjust V42 so that the amplitude of the sine wave at TP22 is 0.5 V P-P. Gp1 and Gp2 are the amount of change in the output amplitude at TP22 when SG2 is 2.1 MHz and V48 = 2 V and 3 V. SW5→b, SW13→a, SW46→ON Input SG2 (100 kHz) to (A) and adjust V42 so that the amplitude of the sine wave at TP22 is 0.5 V P-P. Gp3 and Gp4 are the amount of change in the output amplitude at TP22 when SG2 is 2.4 MHz and V48 = 2 V and 3 V. —10— dB - 15 - 11 4.6 5.6 6.6 2.0 2.5 3.0 2.7 1.1 0.1 6.0 3.0 1.7 0.5 9.0 3.4 2.3 0.9 - 4.0 - 1.0 6.0 VP-P V dB 9.0 - 4.0 Unit - 1.0 CXA1785AR Item Amount of image quality adjustment variation (Y/C input, Y/color difference input) Symbol Gp5 Gp6 Trap attenuation (NTSC) Gtf (NT) Trap attenuation (PAL) Gtf (PAL) DC regeneration ratio K Chroma Block Maximum chroma output(composite video input PAL) Maximum chroma output (Y/C input PAL) ACC characteristics (composite video input NTSC) ACC characteristics (Y/C input NTSC) Conditions Min. Typ. SW5→a, SW46→ON 14.0 Input SG2 (100 kHz) to (A) and adjust V42 so that the amplitude of the sine wave at TP22 is 0.5 VP-P. With SG2 at 1.8 MHz, Gp5 and Gp6 are the amount of change in the output amplitude at TP22 when V48 = 2 V and 3 V. Input SG3 (100 kHz/3.58 MHz, 0 dB) to (A) and measure the output level at TP1 for 3.58 MHz to 100 kHz. SW13→a Input SG3 (100 kHz/4.43 MHz, 0 dB) to (A) and measure the output level at TP1 for 4.43 MHz to 100 kHz. Input SG1 (APL = 10%, 0 dB) to (A). V1 is 95 the output amplitude (black-black) at TP22. Next, input SG1 (APL = 90%, 0 dB). V2 is the output amplitude (black-black) at TP22. K = (V1- |V1 - V2|) × 100/V1 17.0 Vcmax1 SW5→b, SW13→a, V6=3.5 V 0.7 Input SG5 (4.43 MHz, burst/chroma phase = ±135°) to (A) and measure the amplitude of the chroma signal at TP12. Vcmax2 SW13→a, V6=3.5 V 0.7 Input SG5 (4.43 MHz, burst/chroma phase = ±135°) to (B) and measure the amplitude of the chroma signal at TP12. GA1 SW5→b Input SG5 (0 dB, +6 dB, -25 dB), (burst/ GA2 chroma phase = 180°) to (A). Measure the - 10.0 output amplitude at TP12, labeling the output corresponding to 0 dB, +6 dB and -25 dB as V0, V1 and V2, respectively. GA1 = 20log(V1/V0) GA2 = 20log(V2/V0) GA3 SW5→a Input SG5 (0 dB, +6 dB, -25 dB), (burst/ GA4 chroma phase = 180°) to (B). Measure the - 9.0 output amplitude at TP12, labeling the output corresponding to 0 dB, +6 dB and -25 dB as V0, V1 and V2, respectively. GA3 = 20log(V1/V0) GA4 = 20log(V2/V0) —11— 1.0 Max. Unit 3.0 dB - 45 - 30 - 45 - 30 % 0.85 1.2 0.85 1.2 0 2.0 VP-P - 5.0 dB 0 - 4.0 2.0 CXA1785AR Item Symbol Conditions ACC characteristics (composite video input PAL) GA5 ACC characteristics (Y/C input PAL) GA7 SW5→b, SW13→a Input SG5 (0 dB, +6 dB, -25 dB), (burst/ chroma phase = ±135°) to (A). Measure the output amplitude at TP12, labeling the output corresponding to 0 dB, +6 dB and -25 dB as V0, V1 and V2, respectively. GA5 = 20log(V1/V0) GA6 = 20log(V2/V0) SW13→a Input SG5 (0 dB, +6 dB, -25 dB), (burst/ chroma phase = ±135°) to (B). Measure the output amplitude at TP12, labeling the output corresponding to 0 dB, +6 dB and -25 dB as V0, V1 and V2, respectively. GA7 = 20log(V1/V0) GA8 = 20log(V2/V0) Input SG5 (0 dB, burst/chroma phase = 180°) to (B). Measure the chroma signal amplitude at TP12 when V6 = 1.6 V, 2.6 V and 3.5 V, labeling the corresponding output as V0, V1 and V2, respectively. GC1 = 20log(V1/V0) GC2 = 20log(V2/V0) SW5→b Input SG6 (4.43 MHz, 2.5 MHz, 3.58 MHz) to (A), labeling the output amplitude at TP12 corresponding to each frequency as V0, V1 and V2, respectively. GHP1 = 20log(V1/V0) GHP2 = 20log(V2/V0) SW5→a Input SG6 (4.43 MHz, 2.5 MHz, 3.58 MHz) to (B), labeling the output amplitude at TP12 corresponding to each frequency as V0, V1 and V2, respectively. GHP3 = 20log(V1/V0) GHP4 = 20log(V2/V0) Input SG5 (0 dB) to (B). Measure the difference between 3.579545 MHz and the input frequency at which the voltage at TP8 is 2 V or less by changing the burst frequency. SW13→a Input SG5 (0 dB) to (B). Measure the difference between 4.433619 MHz and the input frequency at which the voltage at TP8 is 2 V or less by changing the burst frequency. GA6 GA8 Amount of color adjustment gain variation GC1 GC2 HPF characteristics (composite video input) GHP1 GHP2 HPF characteristics (Y/C input) GHP3 GHP4 APC pull-in range (NTSC) fA1 APC pull-in range (PAL) fA2 —12— Min. Typ. Max. 0 2.0 Unit - 10.0 - 5.0 0 - 9.0 - 4.0 - 30 4.0 - 6.0 - 6.0 2.0 - 20 dB 6.0 - 30 - 10 - 2.0 1.0 - 30 - 10 - 2.0 1.0 ±500 +2000 -1000 ±500 ±1200 Hz CXA1785AR Item Symbol Conditions Killer operation input level (NTSC) VbK1 Killer operation input level (PAL) VbK2 Killer color residue (NTSC) VbS1 Killer color residue (PAL) VbS2 Demodulation output amplitude ratio (NTSC) R-Y/ B-Y G-Y/ B-Y Input SG5 (burst/chroma phase = 180°) to (B) and monitor the output at TP12. Gradually reduce the input amplitude and measure the input level at which the killer operation is activated. SW13→a Input SG5 (burst/chroma phase = ±135°) to (B) and monitor the output at TP12. Gradually reduce the input amplitude and measure the input level at which the killer operation is activated. SW8→b, V42=2.6V Input SG5 (burst/chroma phase = 180°) to (B). Measure the amplitude of the color difference output at TP24. SW8→b, SW13→a, SW12A→b, V42=2.6V Input SG5 (burst/chroma phase = ± 135°) to (B). Measure the amplitude of the color difference output at TP24. Input SG5 (0 dB) to (B) and change the chroma phase. VR: Maximum output amplitude at TP20 VG: Maximum output amplitude at TP22 VB: Maximum output amplitude at TP24 (R-Y)/(B-Y) = VR/VB (G-Y)/(B-Y) = VG/VB SW12A→b, SW13→a, V6 = 2 V Input SG5 (0 dB) to (B) and change the chroma phase. VR: Maximum output amplitude at TP20 VG: Maximum output amplitude at TP22 VB: Maximum output amplitude at TP24 (R-Y)/(B-Y) = VR/VB (G-Y)/(B-Y) = VG/VB Input SG5 (0 dB) to (B) and change the chroma phase. θR: Phase in which output amplitude at TP20 reaches a maximum θG: Phase in which output amplitude at TP22 reaches a maximum θB: Phase in which output amplitude at TP24 reaches a maximum θRB = θR – θB θGB = θG – θB Demodulation output amplitude ratio (PAL) Demodulation relative phase (NTSC) R-Y/ B-Y G-Y/ B-Y θRB θGB —13— Min. Typ. Max. - 42 - 37 - 37 - 32 50 100 90 180 0.56 0.66 0.76 0.29 0.36 0.44 0.60 0.70 0.84 0.30 0.38 0.46 80 90 100 230 240 250 Unit dB mVP-P deg CXA1785AR Item Demodulation relative phase (PAL) Symbol Conditions Min. Typ. Max. θRB SW12A→b, SW13→a Input SG5 (0 dB) to (B) and change the chroma phase. θR: Phase in which output amplitude at TP20 reaches a maximum θG: Phase in which output amplitude at TP22 reaches a maximum θB: Phase in which output amplitude at TP24 reaches a maximum θRB = θR – θB θGB = θG – θB (C) = OPEN Input SG5 (0 dB) to (B). With V42 = 3.0 V, adjust the chroma phase so that the amplitude at TP24 is at a maximum. Using a spectrum analyzer, measure the 7.15909 MHz component versus the 15.734 kHz component of the output at TP24. SW12A = b, SW13→a, (C) = OPEN Input SG5 (0 dB) to (B). With V42 = 3.0 V, adjust the chroma phase so that the amplitude at TP24 is at a maximum. Using a spectrum analyzer, measure the 8.867238 MHz component versus the 15.625 kHz component of the output at TP24. Input SG5 (0 dB) to (B). Label the phase at which the output amplitude at TP24 reaches a maximum when V13 = 1.8 V as θ1, when V13 = 2.7 V as θ2, and when V13 = 3.6 V as θ3. θ + = θ1 – θ2, θ – = θ3 – θ2 SW5→b Input SG5 (0 dB) to (A) and gradually increase the voltage V5. Measure the voltage at which the output at TP12 disappeares. SW5→b Input SG5 (0 dB) to (A) and gradually lower the voltage V5. Measure the voltage at which the output at TP12 appeares. Input SG5 (0 dB, 3.579545 MHz, burst/ chroma phase = 180°) to (B) and gradually lower the voltage V13. Measure the voltage of V13 at which the output at TP24 ceases. 80 90 100 230 240 254 θGB Demodulation output residual carrier (NTSC) VCAR (N) Demodulation output residual carrier (PAL) VCAR (P) HUE variable range θ+ θ– Composite→YC input switching voltage VthCY YC→Composite input switching voltage VthYC NTSC↔PAL switching voltage VthNP —14— Unit deg - 40 - 30 - 50 - 40 30 40 - 30 - 40 1.2 1.4 1.6 0.7 0.9 1.1 dB deg V 0.4 0.7 1.0 CXA1785AR Item Color difference input output maximum gain Color difference input output gain variation NTSC↔Y/color difference switching voltage Sync Block Sync separation input sensitivity current Sync separation output ON voltage External sync input threshold H filter output gain H filter output delay time Sync separation output delay time Interface Block Amount of change in brightness Symbol Conditions Min. Typ. Max. 44 47 50 - 45 - 30 dB 4.0 4.3 V 21 30 µA 0.2 0.5 1.2 1.5 1.8 V 8 300 10 500 14 700 dB 300 500 700 SW38→b Input SG7 (amplitude: 0.15 Vp-p) to (A) and measure the output at TP37. Rising edge tpLH (sy) Falling edge tpHL (sy) 0.8 1.1 1.8 0.3 0.5 0.9 No input for (A) and (B). V32 = 1.8 V Measure the output (black-black) at TP20, TP22, and TP24. No input for (A) and (B). V32 = 2.8 V Measure the output (black-black) at TP20, TP22, and TP24. (When the phase is different from the case of V32 = 2.1 V, make the value negative.) 9.0 Gmax (CD) SW13→c, SW9→a, SW10→a, V6=3.5V ,V42=1.2V, (A)(B) no input. Input SG12 (40 mV amplitude) to (I) and (J). Measure the amplitude at TP20 and TP24. ∆G(CD) SW13→c, SW9→a, SW10→a, (A)(B) no input. Input SG12 (40 mV amplitude) to (I) and (J). Measure the output amplitude variation at TP20 and TP24 during V6 = 1.6 V versus V6 = 3.5 V. VthNCD SW13→b, SW9→a, SW10→a, V6 = 2.6 V, (A)(B) no input. Input SG12 (0.1 V amplitude) to (I) and (J) and gradually increase the voltage V13. Measure the voltage V13 at which the output at TP20 and TP24 starts. Iis VON Veth Ghf tpLH (HF) tpHL (HF) tpLH (sy) tpHL (sy) Vb1 Vb2 3.7 Using the current from (E), measure the input current at which the signal at TP37 changes from low to high. Measure the output voltage at TP37. Increase the amplitude at SG7b from 0 V and measure the voltage at which the clamp circuit begins to operate. Input SG7a to (A) and measure TP2. Input SG7a to (A) and measure TP2. Rising edge tpLH (HF) Falling edge tpHL (HF) —15— 1.0 Unit ns µs VP-P CXA1785AR Item Amount of change in sub-brightness Symbol Conditions Vsb Min. No input for (A) and (B). V32 = 2.3 V ±1.0 Measure the difference in amplitudes (blackblack) at TP20 and TP24 when SW27 and SW28 are off, and when SW27 and SW28 are on, and V27 and V28 are at 1.0 V and 3.0 V. Amount of change in ∆GSC1 Input SG8 (-14 dB) to (A). Measure the sub-contrast gain difference in output amplitudes (white-black) at TP20 and TP24 when SW34 and SW35 ∆GSC2 are off, and when SW34 and SW35 are on, 2.5 and V34 and V35 are at 1.0 V and 3.0 V. Define them as ∆G SC 1 and ∆G SC 2, respectively. RGB output DC voltage VRGB No input for (A) and (B). Adjust V32 and 5.8 measure the DC voltage at TP20, TP22, and TP24 with the amplitude (black-black) at TP22 is 0 V and 9 VP-P. Difference in electric ∆VBL No input for (A) and (B). Measure the po-tential for inter-RGB difference between the maximum and output black levels minimum black levels when TP20, TP22, and TP24 are reversed and not reversed, respectively. Difference in reversed/ ∆GINV Input SG8 (-11 dB) to (A). non-reversed voltage Measure the difference between the nongain reversed output amplitude (white-black) and the reversed output amplitude at TP20, TP22 and TP24. Difference in inter-RGB ∆GRBG Input SG8 (-11 dB) to (A). gain (with DL OFF) Measure the level difference of the maximum and minimum in non-reversed output amplitude (white-black) at TP20, TP22 and TP24. Difference in inter-RGB ∆GRBG SW33→a gain (with DL ON) Input SG8 (-11 dB) to (A). Measure the level difference of the maximum and minimum in non-reversed output amplitude (white-black) at TP20, TP22 and TP24. FRP input threshold VthFRP Input SG8 (-11 dB) to (A). 1.2 While increasing the voltage at (C), measure the voltage at which the output reverses at TP20, TP22, and TP24. —16— Typ. Max. ±2.5 - 5.0 Unit V - 4.0 dB 6.2 V 300 mV 3.5 6.0 ±0.3 ±0.6 0.3 0.6 dB 0.4 0.7 1.5 1.8 V CXA1785AR Item Symbol Conditions External digital RGB input threshold VthEXT1 Input SG8 (-11 dB) to (A). Input SG10 to (F), (G), and (H) and increase VthEXT2 the amplitude starting from 0 V; VthEXT1 is the voltage at which the output goes to black level for the input at TP20, TP22, and TP24 Increase the voltage further; VthEXT2 is the voltage at which the output for that input goes to white level. γ compensation characGγ 1 SW31→ON, SW46→ON, V30 = 2.1 V, V31 teristics = 2.1 V, V42 = 1.2 V (contrast Max.) Gγ 2 Input SG9 to (A), and measure the gain at TP20, TP22, and TP24. VWγ 2 Min. Typ. Max. 1.0 1.2 1.4 2.0 2.2 2.4 Unit V 33 36 39 19 22 25 0.5 0.7 0.9 dB V Peak limiter Output Vwγ2 A B Gg2 Gg1 Input Vwγ2 is the difference in electric potential between point B, where the compensation cuts out, and the peak limit point. Delay line R delay time tDR1 SW33→a, VR1 = 9.1 kΩ, V42 = 2.7 V. Input SG4 to (A). Measure the delay time at TP20 output to TP22 output. tDR2 SW33→a, VR1 = 4.7 kΩ, V42 = 2.7 V. Input SG4 to (A). Measure the delay time at TP20 output to TP22 output. Delay line B delay time tDB1 SW33→a, VR1 = 9.1 kΩ, V42 = 2.7 V. Input SG4 to (A). Measure the delay time at TP24 output to TP22 output. tDB2 SW33→a, VR1 = 4.7 kΩ, V42 = 2.7 V. Input SG4 to (A). Measure the delay time at TP24 output to TP22 output. Delay line RB delay t D(RAT)1 tpHL1tD (RAT)1 = tDR1 / tDB1 ratio t D(RAT) 2 tD (RAT)2 = tDR2 / tDB2 Propagation delay time tpLH1 SW5→b, SW20, SW22, SW24→ON between input and Input SG4 to (A). Adjust V42 and set the output (composite input) tpHL1 amplitude (white - black) at TP20, TP22, and TP24 to 4 V, and measure the rise time tpLH1 and fall time tpHL1. Propagation delay time tpLH2 SW5→a, SW20, SW22, SW24→ON between input and Input SG4 to (A). Adjust V42 and set the output (Y/C input) tpHL2 amplitude (white - black) at TP20, TP22, and TP24 to 4 V, and measure the rise time tpLH2 and fall time tpHL2. —17— 105 45 ns 210 90 0.4 0.4 400 0.5 0.5 520 0.6 0.6 700 400 520 700 400 520 700 400 520 700 ns CXA1785AR Symbol Conditions Min. Typ. Max. Propagation delay time between input and output (Y/color difference input) Item tpLH3 200 300 400 200 300 400 Propagation delay time between EXT and output tpLH4 60 120 180 140 200 260 Output rise and fall times for EXT input tTLH SW13→c, SW20, SW22, SW24→ON SW12B→OFF Input SG4 to (A). Adjust V42 and set the amplitude (white-black) at TP20, TP22, and TP24 to 4V, and measure the rise time tpLH3 and fall time tpHL3. SW20, SW22, SW24→ON Input SG10 to (F), (G), and (H). Use V30 to adjust the output amplitude at TP20, TP22, and TP24 to 4.5 V, and measure the rise time tpLH4 and fall time tpHL4. SW20, SW22, SW24→ON Input SG10 to (F), (G), and (H). Use V30 to adjust the output amplitude at TP20, TP22, and TP24 to 4.5 V, and measure the rise time tTLH and fall time tTHL. SW5→a, SW20, SW22, SW24→ON, V42=2.6V, V48=1.7V Input SG2 (100kHz) to (A). Increase the frequency of input signal and measure the frequency at SW33 ON/OFF, respectively. The frequency must be measured at 3dB lowered in comparison with when sine wave amplitude is 100kHz. SW5→a, SW20, SW22, SW24→ON, V42=2.6V, V48=3.0V Input SG2 (100kHz) to (A). Increase the frequency of input signal and measure the frequency at SW33 ON/OFF, respectively. The frequency must be measured at 3dB lowered in comparison with when sine wave amplitude is 100kHz. No input for (A) and (B). V32 = 2.3 V Measure the difference in the output amplitude (black - black) at TP20, TP22, and TP24 when SW26→OFF and when SW26→with V26 = 3.0 V. 20 50 100 60 100 160 5.0 6.0 5.0 6.0 3.0 4.0 3.0 4.0 3.0 4.0 tpHL3 tpHL4 tTHL Frequency response f1DON f1DOFF f2DON f2DOFF CLIP control range VCLIP —18— Unit ns MHz V CXA1785AR Electrical Characteristics DC Characteristics Unless otherwise specified, VCC1 = 4.5 V, VCC2 = 12 V, VEE = GND, Ta = 25°C, SW5→a, SW8→a, SW9→b, SW10→b, SW12A→a, SW12B→ON (SW12B→OFF for Y/color difference input), SW13→b (SW13→c for Y/color difference input), SW20→OFF, SW22→OFF, SW24→OFF, SW26→OFF, SW27→OFF, SW28→OFF, SW31→OFF, SW33→a, SW34→OFF, SW35→OFF, SW38→a, and SW46→OFF. V6 = 2.6 V, V13 = 2.7 V, V30 = 3.5 V, V32 = 2.1 V, V42 = 2.25 V, V48 = 2.5 V, and VR1 = 6.8 kΩ (C): input SG11, (D): input SG7b (4.5 VP-P) No. Item Symbol ICC1A 1 Current consumption ICC1B Current consumption (for Y/color 2 difference input) ICC2 3 Current consumption Z1 4 TRAP output impedance Z3 VIDEO IN input impedance 5 Z5 6 C IN input impedance Z7 7 BURST OUT output impedance Z9 8 R-Y input impedance Z10 B-Y input impedance 9 Z26 10 CLIP input impedance Z27 11 SUB BRIGHT R input impedance Z28 12 SUB BRIGHT B input impedance Z31 GAMMA2 input impedance 13 14 SUB CONTRAST R input impedance Z34 15 SUB CONTRAST B input impedance Z35 Z39 16 EXT B IN input impedance Z40 EXT G IN input impedance 17 Z41 18 EXT R IN input impedance I5 19 C IN pin current I6 20 COLOR pin current HUE pin current I13 21 I13 22 HUE pin current I29 23 FRP pin current I30 24 GAMMA1 pin current BRIGHT pin current I32 25 I36 26 SYNC IN pin current I42 27 CONTRAST pin current I48 28 PICTURE pin current Conditions Min. Typ. Max. Unit Measure the inflow current to Pin 43 Measure the inflow current to Pin 43 27.0 35.0 24.0 32.0 Measure the inflow current to Pin 25 Hi-Z when Y/color difference input Hi-Z when Y/color difference input V5=GND V6=3.5V V13=4.0V V13=GND V29=GND V30=GND V32=2.5V V36=GND V42=3.0V V48=3.0V —19— 3.0 1.0 12.0 3.6 2.5 21 21 53 53 53 53 53 53 100 100 100 4.0 0.3 0.2 - 1.0 - 0.2 - 1.0 - 0.2 - 6.0 - 2.0 0.2 - 1.0 - 0.2 0.2 0.2 mA 4.3 kΩ 6.0 1.0 1.0 µA 1.0 1.0 1.0 CXA1785AR Input Waveforms SG NO. SG1 Waveform APL variable, 5-step wave APL10% 0.357V 0.143V APL50% 0.179V APL90% 0.357V SG2 The sine wave video signal is shown below. Amplitude and frequency are variable. 0.03V 0.175V 0.143V SG3 SG4 Sine wave; amplitude 150 mVP-P, frequency variable 0.357V 10µsec 1H SG5 Chroma signal Burst amplitude 150 mVP-P, chroma amplitude 150 mVP-P Burst, chroma frequency (3.579545 MHz, 4.433619 MHz) Chroma phase variable 0.15V —20— CXA1785AR SG NO. SG6 Waveform Sine wave video signal, frequency variable. 0.15V 0.15V 0.143V 1H SG7 Horizontal sync signal, amplitude variable. 1H a. 0.143V Video input sync signal 5µs 0V 5µs External sync signal amplitude variable b. 0V 500ns SG8 5-step wave. 0 dB is shown below. 0.357V 0.143V 5µs 64µs SG9 0.357V 1H SG10 tr, tf<50ns 4.5V 5µs 0V Horizontal sync signal Synchronization with the horizontal sync signal SG11 FRP pulse tr, tf<50ns 63.5µs 4.5V 0V 2.5µs Horizontal sync signal 5µs —21— CXA1785AR SG NO. Waveform SG12 10µs Amplitude variable Horizontal sync signal Syncronization with the horizontal sync signal Switching Characteristics Timing chart 4.5V Input waveform 50% 0V tPHL tPLH 90% Output waveform 90% 50% 50% 10% tTLH tTHL —22— CXA1785AR Electrical Characteristics Measurement Circuit VEE Vcc2 VR1 1µ 100µ Vcc1 b V28 V27 V26 SW28 SW27 SW26 V30 SW31 V31 V32 SW33 SW34 V34 SW35 V35 (D) a (C) 100µ TP37 1µ 36 1k 35 34 33 32 31 30 29 28 27 26 25 37 Vcc1 TP24 24 100 a (E) b 38 SW38 23 39 (F) SW24 100p 0.068µ 22 TP22 100 40 (G) SW22 21 100p 0.068µ 41 (H) 20 TP20 100 42 19 43 18 44 17 45 16 46 15 47 14 1µ 100µ 18k TP47 48 13 c 0.1µ b Vcc1 a SW13 1M TP12 V13 b a SW12B V5 0.1µ Vcc1 0.01µ b 12 6.8k a 11 0.01µ TP8 22k b 10 9 82p 8 SW8 0.01µ V6 ∗5 a (A) 7 SW10 Vcc1 ∗4 6 0.047µ TP2 5 56p TP1 4 680p 270 3 SW5 2 10µ 1 10M V48 1µ 0.01µ ∗3 5.6k ∗1 8.2k 0.0068µ 2.2µ 0.47µ Vcc1 560k V46 SW46 100p 0.068µ ∗2 1µ 100µ V42 Vcc1 SW20 a SW12A (I) b 6.8k (B) (J) ∗1 1 kΩ for NTSC, no resistance for PAL. ∗2 Allowable difference in resistance: ±2 % Temperature characteristics: ±200 ppm ∗3 KINSEKI CX-5F Frequency: 3.579545 MHz (NTSC mode) 4.433619 MHz (PAL mode) Load capacity 16 pF, frequency deviation within ±30 ppm, frequency temperature characteristics within ±30 ppm ∗4 TDK NLT 4532-S3R6B (NTSC mode) NLT 4532-S4R4 (PAL mode) ∗5 TOKO 332 PN-2636BS —23— CXA1785AR Description of Operation • Trap The trap frequency switches between 3.58 MHz for NTSC and 4.43 MHz for PAL. When using Y/C input and Y/color difference input, the signal does not pass through the trap. • Video AGC circuit Different AGC characteristics are obtained, depending on the APL level of the luminance signal. The gain for the luminance signal is adjusted through peak detection. • ACC detection, ACC amplifier The peak amplitude of the ACC amplifier output burst signal is detected, and is used to control the ACC amplifier gain. • VXO, APC detection The VXO local oscillation circuit is a Pierce-type crystal oscillation circuit. The phases of the input burst signal and the VXO oscillator output are compared in the APC detection block, and the detective output is used to form a PLL loop that controls the VXO oscillation frequency, which means that the need for adjustments is eliminated. • External inputs Digital input with two thresholds has a pull-down resistor of 100 kΩ. When one of the RGB inputs is higher than the lower threshold VTH1, all RGB outputs go to black level. When the higher threshold VTH2 is exceeded, the output for only the signal in question goes to white level, while the other outputs remain at black level. • γ compensation In order to support the characteristics of liquid crystal panels, the I/O characteristics are as shown in Fig. 1. The characteristics can be changed to those shown in Fig. 2 by adjusting Pin 30, or to those shown in Fig. 3 by adjusting Pin 31. The peak limiter function is linked to point B. White peak limit Output Output Output B’ B’ A B A’ B B A A Input Fig. 1 GAMMA1 adjustment Input Fig. 2 —24— GAMMA2 adjustment Input Fig. 3 CXA1785AR • RGB output The primary color signals from the RGB outputs (Pins 20, 22, and 24) are reversed by the FRP pulse input to Pin 29, as shown in Fig. 4. Feedback is applied so that the center voltage of the output signals matches the reference voltage (VCC2 + VEE)/2. VIDEO IN FRP RGB OUT Center voltage Notes on Operation • Power supply pins Always connect the minimum electric potential applied to the IC to Pin 18; do not leave Pin 18 open. The voltages applied to the supply voltage pins must satisfy the following relationship: VEE ≤ GND ≤ VCC1 ≤ VCC2 • White balance adjustment If the SUB BRIGHT (Pins 27 and 28) and the SUB CONTRAST (Pins 34 and 35) are left at their preset states and no white balance adjustment is made in the liquid crystal display system, the white balance may be lost due to slight variations in the electronic components in this system. Therefore, it is recommended that some type of white balance adjustment always be made. —25— CXA1785AR Application Circuit (NTSC) 680k 4.5V 12V GND 22k 39k 33k 39k 22k 22k 33k 47k 39k 33k 33k 33k 22k 33k 33k 33k Reversed pulse input 36 35 34 33 47k 39k 39k 22k 33k 39k 100µ 0.01µ 0.01µ 0.01µ 0.01µ 0.01µ 1µ 10k 100 Sync separation output 0.01µ 0.01µ 0.01µ External sync input 33k 33k ∗1 32 31 30 29 28 27 26 25 37 38 23 39 22 1µ 270 B G R 100 B output 24 1k 0.068µ 100 40 21 41 20 42 19 43 18 44 17 45 16 46 15 47 14 G output 0.068µ 100 27k R output 27k 47k 0.068µ 0.01µ ∗1 18k ∗2 1k 0.0068µ 100µ 1µ 2.2µ 560k ∗3 0.47µ 5.6k 8.2k 0.01µ 48 3 4 5 6 7 8 39k TRAP 22k 39k 0.1µ VIDEO IN 10 39k C IN 11 12 0.01µ 0.1µ 0.01µ Ex.) TDK NLT4532 - S3R6B 330k 9 0.047µ 33k 2 10µ 33k 13 1 39k 47k 18k 1M 0.01µ NTSC, 12 V output power supply • When using composite input: Connect C IN to GND and input the composite signal to VIDEO IN. • When using Y/C input: Input the Y signal to VIDEO IN and the C signal to C IN. In this case, the TRAP for Pin 1 is not needed. ∗1 Use a ceramic capacitor for the decoupling capacitor 1µF for the power supply, and connect it close to the IC pin. ∗2 Allowable difference in resistance: ±2 % Temperature characteristics: ±200 ppm ∗3 KINSEKI CX-5F Frequency: 3.579545 MHz Load capacity 16 pF, frequency deviation within ±30 ppm, frequency temperature characteristics within ±30 ppm Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —26— CXA1785AR Application Circuit (PAL) 33k 4.5V 12V GND 22k 39k 22k 22k 33k 33k 47k 39k 33k 33k 33k 22k 33k 33k 39k Reversed pulse input 680k 36 35 34 33 32 31 47k 39k 39k 0.01µ 0.01µ 0.01µ 30 29 28 100µ 0.01µ Sync separation output 22k 33k 39k 10k 100 1µ 0.01µ External sync input 0.01µ 0.01µ 0.01µ 33k 33k ∗1 27 26 25 24 38 23 39 22 1k 1µ 270 B G R 100 37 B Output 0.068µ 100 40 21 41 20 G Output 0.068µ 100 27k R Output 27k 47k 0.068µ 42 19 43 18 44 17 45 16 46 15 47 14 0.01µ ∗1 ∗2 18k 0.0068µ 100µ 1µ 2.2µ 560k ∗3 0.47µ 5.6k 8.2k 0.01µ 48 8 332PN-2636BS 56p 680p Ex.) TDK NLT4532 - S4R4 0.047µ 39k TRAP 22k 330k 39k 0.1µ 9 39k VIDEO IN C IN 10 11 12 6.8k 6.8k 7 1M 6 0.1µ 5 82p 4 0.01µ 3 10M 0.01µ 33k 2 10µ 33k 13 1 0.01µ 0.01µ PAL, 12 V output power supply • When using composite input: Connect C IN to GND and input the composite signal to VIDEO IN. • When using Y/C input: Input the Y signal to VIDEO IN and the C signal to C IN. In this case, the TRAP for Pin 1 is not needed. ∗1 Use a ceramic capacitor for the decoupling capacitor 1µF for the power supply, and connect it close to the IC pin. ∗2 Allowable difference in resistance: ±2 % Temperature characteristics: ±200 ppm ∗3 KINSEKI CX-5F Frequency: 4.433619 MHz Load capacity 16 pF, frequency deviation within ±30 ppm, frequency temperature characteristics within ±30 ppm Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —27— CXA1785AR Application Circuit (Y/color difference input) 680k 33k 39k 4.5V 12V GND 22k 39k 22k 22k 33k 47k 33k 33k 33k 22k 33k 33k 39k 33k Reversed pulse input 36 35 34 32 31 30 47k 39k 39k 0.01µ 0.01µ 0.01µ 0.01µ 33 29 28 100µ 0.01µ Sync separation output 22k 33k 1µ 10k 100 39k 33k 0.01µ 0.01µ External sync input 0.01µ 33k ∗1 27 26 25 37 1µ 270 B G R 100 B output 24 1k 0.068µ 38 23 39 22 100 G output 0.068µ 40 21 41 20 100 27k 27k 47k 42 19 43 18 44 17 45 16 46 15 47 14 0.01µ ∗1 R output 0.068µ ∗2 18k 0.0068µ 100µ 1µ 2.2µ 560k 48 0.01µ 3 4 5 6 7 8 10 9 11 12 39k 0.01µ 0.01µ 0.01µ 33k 2 10µ 33k 13 1 R-Y IN B-Y IN 22k 39k 330k 39k Y IN ∗1 Use a ceramic capacitor for the decoupling capacitor 1µF for the power supply, and connect it close to the IC pin. ∗2 Allowable difference in resistance: ±2 % Temperature characteristics: ±200 ppm Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —28— CXA1785AR Unit : mm 48PIN LQFP (PLASTIC) 9.0 ± 0.3 7.0 ± 0.2 0.15 ± 25 36 0.05 24 8.0 ± 0.2 37 A 13 48 12 1 0.5 0.2 ± 0.06 0.08 M 0.1 0.5 1.45 ± 0.2 0.1 ± 0.1 0.65 ± 0.2 Package Outline 0° to 10° DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE LQFP-48P-L111 LEAD TREATMENT SOLDER PLATING EIAJ CODE LQFP048-P-0707-AP LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 0.2g JEDEC CODE —29—