TL1593C 3-CHANNEL SAMPLE-AND-HOLD CIRCUIT SOCS027B – APRIL 1987 – REVISED JULY 1991 • • • • • • Designed for Use With TI Virtual-Phase CCD Image Sensors Supports Both Color and Monochrome Applications Contains Three Separate Sample-and-Hold Circuits Differential Input With 11-dB Gain 5-MHz Sampling Rate on Each Channel Separate Analog and Digital Supplies for Immunity to Switching Transients NS PACKAGE (TOP VIEW) ANLG VCC AIN1 CIN1 AIN2 CIN2 AIN3 CIN3 ANLG GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 S/H1 S/H2 S/H3 DIG VCC OUT1 OUT2 OUT3 DIG GND description The TL1593C is a three-channel sample-and-hold integrated circuit designed for use in processing video signals generated by TI virtual-phase CCD image sensors. It can be used with one-, two-, and three-channel color and monochrome TI virtual-phase CCDs. Each sample-and-hold channel consists of a differential-input buffer, a digitally controlled switch, and an output buffer that has high impedance. Separate supply and ground pins are provided for the analog and digital sections to ensure optimum isolation. Internal-hold capacitors are included to reduce the external parts count. The differential inputs allow the amplifier return pin of the imager to be connected to CIN of the sample-and-hold circuit to obtain common-mode rejection for antiblooming clock transients in the CCD. The analog inputs should be capacitively coupled from the CCD outputs to ensure optimum performance. The TL1593C is supplied in a 16-pin plastic package and is characterized for operation from 0°C to 70°C. This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C, Method 3015; however, precautions should be taken to avoid application of any voltage higher than maximum-rated voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriate logic voltage level, preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments. Copyright 1991, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TL1593C 3-CHANNEL SAMPLE-AND-HOLD CIRCUIT SOCS027B – APRIL 1987 – REVISED JULY 1991 schematic S/H1 CIN1 AIN1 16 3 2 + + – DIG GND CIN2 AIN2 5 4 + + AIN3 – OUT2 ANLG GND 14 7 6 + + – – 11 dB DIG GND ANLG GND Terminal Functions TERMINAL NAME 2 11 – DIG GND CIN3 ANLG GND 15 11 dB S/H3 OUT1 – 11 dB S/H2 12 NO. I/O DESCRIPTION AIN1 2 I Channel 1 analog input AIN2 4 I Channel 2 analog input AIN3 6 I Channel 3 analog input ANLG GND 8 ANLG VCC 1 CIN1 3 I Channel 1 compensation input CIN2 5 I Channel 2 compensation input CIN3 7 I Channel 3 compensation input DIG GND 9 DIG VCC 13 OUT1 12 O Channel 1 output OUT2 11 O Channel 2 output OUT3 10 O Channel 3 output S/H1 16 I Channel 1 sample-and-hold input S/H2 15 I Channel 2 sample-and-hold input S/H3 14 I Channel 3 sample-and-hold input Analog ground Analog supply voltage Digital ground Digital supply voltage POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 OUT3 TL1593C 3-CHANNEL SAMPLE-AND-HOLD CIRCUIT SOCS027B – APRIL 1987 – REVISED JULY 1991 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Analog supply voltage range, ANLG VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.4 V to 16 V Digital supply voltage range, DIG VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.4 V to 16 V Input voltage range, VI: AINn inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.4 V to ANLG VCC CINn inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.4 V to ANLG VCC S/Hn inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.4 V to DIG VCC Continuous total power dissipation at (or below) TA ≤ 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 625 mW Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30°C to 75°C Storage temperature range, TSTG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to GND. recommended operating conditions MAX UNIT Analog supply voltage, ANLG VCC MIN 10 12 13 V Digital supply voltage, DIG VCC 10 12 13 V High-level input voltage, VIH NOM 2 V Low-level input voltage, VIL 0.8 Input bias voltage, voltage VIB Input voltage voltage, VI V AINn inputs 4.9 5.1 5.3 CINn inputs 2.2 2.4 2.6 AINn inputs VIB – 0.3 VIB – 0.2 VIB VIB VIB + 0.3 VIB + 0.2 CINn inputs Sampling frequency V 5 Sampling time 55 Operating free-air temperature, TA 30 V MHz ns °C 75 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS Output voltage level Output voltage swing MIN TYP‡ MAX 6 6.75 7.5 V 10 µA – 300 µA 2 V IIH IIL High-level input current IO – IO+ Output source current –5 mA Output sink current 0.4 mA ICC Supply current Ci VI = 2.7 V, VI = 0.4 V, UNIT Low-level input current Input capacitance Input impedance DIG VCC = 12 V, DIG VCC = 12 V DIG VCC = 12 V ANLG VCC = 12 V – 160 18.5 28 AINn inputs 5 7 CINn inputs 19 24 S/Hn inputs 13 18 AINn inputs 100 Output impedance 50 mA pF kΩ 200 Ω ‡ All typical values are at TA = 25° C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TL1593C 3-CHANNEL SAMPLE-AND-HOLD CIRCUIT SOCS027B – APRIL 1987 – REVISED JULY 1991 MECHANICAL DATA NS/R-PDSO-G** PLASTIC SMALL-OUTLINE PACKAGE 16 PIN SHOWN A 16 9 PINS** 14 16 20 24 A MAX 10,50 10,50 12,90 15,30 A MIN 9,90 9,90 12,30 14,70 DIM 8,20 7,40 5,60 5,00 1 8 2,00 MAX Seating Plane 0,10 0,05 MIN 1,27 0°– 10° 0,40 0,20 0,10 1,05 0,55 0,25 M 4040062/A–10/93 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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