TI TPD6E001RSFRG4

TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C – JULY 2006 – REVISED APRIL 2007
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
8 IO6
IO3
3
7 IO5
N.C.
4
6 IO4
GND
5
IO1
1
IO2
2
IO3
3
N.C.
2
12
11
10
GND
4
5
6
N.C.
IO2
VCC
9 N.C.
GND
VCC
10
1
N.C.
RSF PACKAGE
(TOP VIEW)
RSE PACKAGE
(TOP VIEW)
IO1
UBB
USB 2.0
Ethernet
FireWire™
Video
Cell Phones
SVGA Video Connections
Glucosemeters
N.C.
•
•
•
•
•
•
•
ESD Protection Exceeds
– ±15-kV Human-Body Model (HBM)
– ±8-kV IEC 61000-4-2 Contact Discharge
– ±15-kV IEC 61000-4-2 Air-Gap Discharge
Low 1.5-pF Input Capacitance
Low 1-nA (Max) Leakage Current
Low 1-nA Supply Current
0.9-V to 5.5-V Supply-Voltage Range
Six-Channel Device
Space-Saving RSE and RSF Packages
Alternate 2-, 3-, 4-Channel Options Available:
TPD2E001, TPD3E001, and TPD4E001
9
IO6
8
IO5
7
IO4
N.C. – Not internally connected
DESCRIPTION/ORDERING INFORMATION
The TPD6E001 is a low-capacitance ±15-kV ESD-protection diode array designed to protect sensitive
electronics attached to communication lines. Each channel consists of a pair of diodes that steer ESD current
pulses to VCC or GND. The TPD6E001 protects against ESD pulses up to ±15-kV Human-Body Model (HBM),
±8-kV Contact Discharge, and ±15-kV Air-Gap Discharge, as specified in IEC 61000-4-2. This device has a
1.5-pF capacitance per channel, making it ideal for use in high-speed data IO interfaces.
The TPD6E001 is a six-channel device designed for cell-phone connectors and SVGA video connections.
The TPD6E001 is available in tiny RSE and RSF packages and is specified for –40°C to 85°C operation.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
2 × 1.5 RSE
Reel of 3000
TPD6E001RSER
2DO
4 × 4 RSF
Reel of 2000
TPD6E001RSFR
ZWN
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FireWire is a trademark of Apple Computer, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2007, Texas Instruments Incorporated
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C – JULY 2006 – REVISED APRIL 2007
LOGIC BLOCK DIAGRAM
VCC
IO1
IO2
IO3
IO4
IO5
IO6
GND
PIN DESCRIPTION
RSE NO.
RSF NO.
NAME
1, 2, 3,
6, 7, 8
1, 2, 3,
7, 8, 9
IOx
FUNCTION
ESD-protected channel
5
5
GND
Ground
10
11
VCC
Power-supply input. Bypass VCC to GND with a 0.1-µF ceramic capacitor.
4, 9
4, 6, 10, 12
N.C.
Not internally connected
EP
EP
Exposed pad. Connect to GND.
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
–0.3
7
VI/O
–0.3
VCC + 0.3
V
–65
150
°C
150
°C
Tstg
Storage temperature range
TJ
Junction temperature
Bump temperature (soldering)
Infrared (15 s)
220
Vapor phase (60 s)
215
Lead temperature (soldering, 10 s)
(1)
2
300
UNIT
V
°C
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Submit Documentation Feedback
www.ti.com
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
SLLS685C – JULY 2006 – REVISED APRIL 2007
Electrical Characteristics
VCC = 5 V ± 10%, TA = -40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
Supply voltage
ICC
Supply current
VF
Diode forward voltage
IF = 10 mA
VBR
Breakdown voltage
IBR = 10 mA
Channel clamp voltage (2)
VC
TYP (1)
0.9
1
0.65
MAX
TA = 25°C, ±15-kV HBM,
IF = 10 A
Positive transients
TA = 25°C,
±8-kV Contact Discharge
(IEC 61000-4-2), IF = 24 A
Positive transients
TA = 25°C,
±15-kV Air-Gap Discharge
(IEC 61000-4-2), IF = 45 A
Positive transients
Channel leakage current
Vi/o = GND to VCC
Ci/o
Channel input
capacitance
VCC = 5 V, Bias of VCC/2
UNIT
5.5
V
100
nA
0.95
V
11
Ii/o
(1)
(2)
MIN
V
VCC + 25
Negative transients
–25
VCC + 60
Negative transients
–60
V
VCC + 100
Negative transients
–100
±1
1.5
nA
pF
Typical values are at VCC = 5 V and TA = 25°C.
Channel clamp voltage is not production tested.
ESD Protection
PARAMETER
TYP
UNIT
±15
kV
IEC 61000-4-2 Contact Discharge
±8
kV
IEC 61000-4-2 Air-Gap Discharge
±15
kV
HBM
Submit Documentation Feedback
3
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C – JULY 2006 – REVISED APRIL 2007
TYPICAL OPERATING CHARACTERISTICS
IO CAPACITANCE
vs
IO VOLTAGE
(VCC = 5.0 V)
2.20
IO Capacitance (pF)
2.00
1.80
1.60
1.40
1.20
1.00
0.00
1.00
2.00
2.50
3.00
4.00
5.00
IO Voltage (V)
IO LEAKAGE CURRENT
vs
TEMPERATURE
(VCC = 5.5 V)
IO Leakage Current (pA)
1000
100
10
1
–40
25
45
Temperature (°C)
4
Submit Documentation Feedback
65
85
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C – JULY 2006 – REVISED APRIL 2007
APPLICATION INFORMATION
VBUS
0.1 µF
VCC
D+
D–
RT
GND
IO5
IO3
USB
Controller
IO1
D1
IO6
IO2
IO4
VBUS
D+
D–
GND
GND
Detailed Description
When placed near the connector, the TPD6E001 ESD solution offers little or no signal distortion during normal
operation due to low IO capacitance and ultra-low leakage current specifications. The TPD6E001 ensures that
the core circuitry is protected and the system is functioning properly in the event of an ESD strike. For proper
operation, the following layout/design guidelines should be followed:
1. Place the TPD6E001 solution close to the connector. This allows the TPD6E001 to take away the energy
associated with ESD strike before it reaches the internal circuitry of the system board.
2. Place a 0.1-µF capacitor very close to the VCC pin. This limits any momentary voltage surge at the IO pin
during the ESD strike event.
3. Ensure that there is enough metallization for the VCC and GND loop. During normal operation, the
TPD6E001 consumes nA leakage current. But during the ESD event, VCC and GND may see 15 A to
30 A of current, depending on the ESD level. Sufficient current path enables safe discharge of all the
energy associated with the ESD strike.
4. Leave the unused IO pins floating.
5. The VCC pin can be connected in two different ways:
a. If the VCC pin is connected to the system power supply, the TPD6E001 works as a transient suppressor
for any signal swing above VCC + VF. A 0.1-µF capacitor on the device VCC pin is recommended for ESD
bypass.
b. If the VCC pin is not connected to the system power supply, the TPD6E001 can tolerate higher signal
swing in the range up to 10V. Please note that a 0.1-µF capacitor is still recommended at the VCC pin for
ESD bypass.
Submit Documentation Feedback
5
PACKAGE OPTION ADDENDUM
www.ti.com
17-Jul-2010
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
TPD6E001RSER
ACTIVE
UQFN
RSE
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
TPD6E001RSERG4
ACTIVE
UQFN
RSE
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
TPD6E001RSFR
ACTIVE
WQFN
RSF
12
2000
TBD
Call TI
Call TI
Request Free Samples
TPD6E001RSFRG4
ACTIVE
WQFN
RSF
12
2000
TBD
Call TI
Call TI
Request Free Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
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