TI SN74ALS32DRG4

SN54ALS32, SN54AS32, SN74ALS32, SN74AS32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SDAS113B – APRIL 1982 – REVISED DECEMBER 1994
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
SN54ALS32, SN54AS32 . . . J PACKAGE
SN74ALS32, SN74AS32 . . . D OR N PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
description
These devices contain four independent 2-input
positive-OR gates. They perform the Boolean
functions Y = A • B or Y = A + B in positive logic.
B
H
X
H
X
H
H
L
L
L
3
12
4
11
5
10
6
9
7
8
VCC
4B
4A
4Y
3B
3A
3Y
1Y
NC
2A
NC
2B
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3B
2Y
GND
NC
3Y
3A
A
OUTPUT
Y
13
SN54ALS32, SN54AS32 . . . FK PACKAGE
(TOP VIEW)
FUNCTION TABLE
(each gate)
INPUTS
14
2
1B
1A
NC
VCC
The
SN54ALS32
and
SN54AS32
are
characterized for operation over the full military
temperature range of – 55°C to 125°C. The
SN74ALS32 and SN74AS32 are characterized for
operation from 0°C to 70°C.
1
4B
•
NC – No internal connection
logic symbol†
1A
1B
2A
2B
3A
3B
4A
4B
1
logic diagram (positive logic)
≥1
3
2
1A
1Y
1B
4
5
6
2Y
2B
9
10
8
3Y
3A
3B
12
13
2A
11
4Y
4A
4B
1
3
2
4
6
5
9
8
10
12
13
11
1Y
2Y
3Y
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
Copyright  1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54ALS32, SN54AS32, SN74ALS32, SN74AS32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SDAS113B – APRIL 1982 – REVISED DECEMBER 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54ALS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS32
SN74ALS32
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
High-level output current
– 0.4
– 0.4
mA
IOL
TA
Low-level output current
4
8
mA
70
°C
High-level input voltage
2
Operating free-air temperature
2
– 55
125
V
V
0
V
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
SN54ALS32
TYP‡
MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = –18 mA
IOH = – 0.4 mA
VOL
VCC = 4
4.5
5V
IOL = 4 mA
IOL = 8 mA
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IO§
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.4 V
VO = 2.25 V
ICCH
ICCL
VCC = 5.5 V,
VCC = 5.5 V,
VI = 4.5 V
VI = 0
MIN
SN74ALS32
TYP‡
MAX
MIN
–1.5
VCC – 2
–1.5
VCC – 2
0.25
V
V
0.4
0.25
0.4
0.35
0.5
V
0.1
0.1
mA
20
20
µA
– 0.1
– 20
UNIT
– 112
– 30
– 0.1
mA
– 112
mA
mA
1.9
4
1.9
4
2.6
4.9
2.6
4.9
mA
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX¶
SN54ALS32
tPLH
tPHL
A or B
Y
SN74ALS32
MIN
MAX
MIN
MAX
3
18
3
14
3
16
3
12
¶ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
ns
SN54ALS32, SN54AS32, SN74ALS32, SN74AS32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SDAS113B – APRIL 1982 – REVISED DECEMBER 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54AS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74AS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS32
SN74AS32
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
V
High-level output current
–2
–2
mA
IOL
TA
Low-level output current
20
20
mA
70
°C
High-level input voltage
2
Operating free-air temperature
2
– 55
125
V
V
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = –18 mA
IOH = – 2 mA
VOL
II
VCC = 4.5 V,
VCC = 5.5 V,
IOL = 20 mA
VI = 7 V
IIH
IIL
IO§
VCC = 5.5 V,
VCC = 5.5 V,
VI = 2.7 V
VI = 0.4 V
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.25 V
VI = 4.5 V
ICCH
ICCL
SN54AS32
TYP‡
MAX
TEST CONDITIONS
MIN
SN74AS32
TYP‡
MAX
MIN
–1.2
VCC – 2
–1.2
VCC – 2
0.35
– 30
0.5
V
V
0.5
V
0.1
0.1
mA
20
20
µA
– 0.5
– 0.5
mA
– 112
mA
12
mA
– 112
7.3
UNIT
0.35
– 30
12
7.3
VCC = 5.5 V,
VI = 0
16.5
26.6
16.5
26.6
mA
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
A or B
TO
(OUTPUT)
Y
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX¶
SN54AS32
SN74AS32
MIN
MAX
MIN
MAX
1
7.5
1
5.8
1
6.5
1
5.8
UNIT
ns
¶ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN54ALS32, SN54AS32, SN74ALS32, SN74AS32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SDAS113B – APRIL 1982 – REVISED DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V
RL = R1 = R2
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
tsu
Data
Input
tw
th
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
[3.5 V
1.3 V
tPHZ
tPZH
Waveform 2
S1 Open
(see Note B)
1.3 V
VOL
0.3 V
VOH
1.3 V
0.3 V
[0 V
3.5 V
1.3 V
Input
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
5962-86836012A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
596286836012A
SNJ54ALS
32FK
5962-8683601DA
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8683601DA
SNJ54ALS32W
5962-9756001Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629756001Q2A
SNJ54AS
32FK
5962-9756001QCA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9756001QC
A
SNJ54AS32J
JM38510/37501B2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
JM38510/
37501B2A
JM38510/37501BCA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510/
37501BCA
M38510/37501B2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
JM38510/
37501B2A
M38510/37501BCA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510/
37501BCA
SN54ALS32J
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
SN54ALS32J
SN54AS32J
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
SN54AS32J
SN74ALS32D
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
SN74ALS32DE4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
SN74ALS32DG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
SN74ALS32DR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
SN74ALS32DRE4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
SN74ALS32DRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
SN74ALS32N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS32N
SN74ALS32N3
OBSOLETE
PDIP
N
14
TBD
Call TI
Call TI
0 to 70
SN74ALS32NE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74ALS32N
SN74ALS32NSR
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
SN74ALS32NSRE4
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
SN74ALS32NSRG4
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
ALS32
SN74AS32D
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32DBR
ACTIVE
SSOP
DB
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32DBRE4
ACTIVE
SSOP
DB
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32DBRG4
ACTIVE
SSOP
DB
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32DE4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32DG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32DR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32DRE4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32DRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AS32
SN74AS32N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74AS32N
SN74AS32N3
OBSOLETE
PDIP
N
14
TBD
Call TI
Call TI
0 to 70
SN74AS32NE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
Addendum-Page 2
SN74AS32N
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
SN74AS32NSR
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
74AS32
SN74AS32NSRE4
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
74AS32
SN74AS32NSRG4
ACTIVE
SO
NS
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
74AS32
SNJ54ALS32FK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
596286836012A
SNJ54ALS
32FK
SNJ54ALS32J
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
SNJ54ALS32J
SNJ54ALS32W
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8683601DA
SNJ54ALS32W
SNJ54AS32FK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629756001Q2A
SNJ54AS
32FK
SNJ54AS32J
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9756001QC
A
SNJ54AS32J
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
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25-Sep-2013
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 :
• Catalog: SN74ALS32, SN74AS32
• Military: SN54ALS32, SN54AS32
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Military - QML certified for Military and Defense Applications
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
SN74ALS32DR
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
SN74ALS32NSR
SO
NS
14
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
SN74AS32DBR
SSOP
DB
14
2000
330.0
16.4
8.2
6.6
2.5
12.0
16.0
Q1
SN74AS32DR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
SN74AS32NSR
SO
NS
14
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74ALS32DR
SOIC
D
14
2500
367.0
367.0
38.0
SN74ALS32NSR
SO
NS
14
2000
367.0
367.0
38.0
SN74AS32DBR
SSOP
DB
14
2000
367.0
367.0
38.0
SN74AS32DR
SOIC
D
14
2500
367.0
367.0
38.0
SN74AS32NSR
SO
NS
14
2000
367.0
367.0
38.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
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