ANPEC APW7209CI-TRG

APW7209
1MHz, High-Efficiency, Step-Up Converter for 2 to 10 White LEDs
Features
General Description
•
•
•
•
•
0.3V Reference Voltage
The APW7209 is a current-mode and fixed frequency
boost converter with an integrated N-FET to drive up to 10
Fixed 1MHz Switching Frequency
white LEDs in series.
High Efficiency up to 88%
The series connection allows the LED current to be identical for uniform brightness. Its low on-resistance of N-
Wide Input Voltage from 2.5V to 6V
100Hz to 100kHz PWM Brightness Control Fre-
FET and low feedback voltage reduce power loss and
achieve high efficiency. Fast switching frequency(1MHz
quency
•
•
•
Open-LED Protection
•
<1µA Quiescent Current during Shutdown
•
•
SOT-23-6 Package
typical) allows using small-size inductor and both of input and output capacitors. An over voltage protection
Under-Voltage Lockout Protection
Over-Temperature Protection
function, which monitors the output voltage via OVP pin,
stops switching of the IC if the OVP voltage exceeds the
over voltage threshold. An internal soft-start circuit eliminates the inrush current during start-up.
Lead Free and Green Devices Available
The APW7209 also integrates under-voltage lockout, overtemperature protection, and current limit circuits to pro-
(RoHS Compliant)
tect the IC in abnormal conditions.The APW7209 is available in a SOT-23-6 package.
Applications
•
White LED Display Backlighting
•
Cell Phone and Smart Phone
•
PDA, PMP, MP3
•
Digital Camera
Simplified Application Circuit
VIN
VOUT
L1
22µH
Pin Configuration
C1
4.7µF
SOT-23-6 Top View
LX 1
GND 2
FB 3
6
2
6 VIN
5 OVP
OFF ON
4
VIN
GND
LX
OVP
APW7209
EN
FB
1
5
C2
1µF
Up to
10
WLEDs
3
R1
15Ω
4 EN
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
1
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APW7209
Ordering and Marking Information
Package Code
C : SOT-23-6
Operating Ambient Temperature Range
I : -40 to 85oC
Handling Code
TR : Tape & Reel
Assembly Material
L : Lead Free Device
G : Halogen and Lead Free Device
APW7209
Assembly Material
Handling Code
Temperature Range
Package Code
APW7209 CI:
X - Date Code
W09X
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
VIN
(Note 1)
Parameter
VIN Supply Voltage (VIN to GND)
Rating
Unit
-0.3 ~ 7
V
FB, EN to GND Voltage
-0.3 ~ VIN
V
VLX
LX to GND Voltage
-0.3 ~ 42
V
VOVP
OVP to GND Voltage
-0.3 ~ 42
V
150
°C
TJ
Maximum Junction Temperature
TSTG
Storage Temperature
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
-65 ~ 150
°C
260
°C
Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics (Note 2)
Parameter
Symbol
θJA
Typical Value
Junction to Ambient Thermal Resistance.
SOT-23-6
Unit
°C/W
250
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions (Note 3)
Symbol
Parameter
Range
Unit
VIN
VIN Input Voltage
2.5~ 6
V
CIN
Input Capacitor
4.7 or higher
µF
COUT
Output capacitor
0.68 or higher
µF
6.8 ~ 47
µH
L1
Inductor
TA
Ambient Temperature
-40 ~ 85
°C
TJ
Junction Temperature
-40 ~ 125
°C
Note 3: Refer to the application circuit for further information.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
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APW7209
Electrical Characteristics
(Refer to figure 1 in the “Typical Application Circuits”. These specifications apply over VIN = 3.6V, TA = -40°C to 85°C, unless otherwise
noted. Typical values are at TA = 25°C.)
Symbol
Parameter
Test Conditions
APW7209
Min.
Typ.
Max.
Unit
SUPPLY VOLTAGE AND CURRENT
VIN
Input Voltage Range
IDD1
IDD2
Input DC bias current
ISD
TA = -40 ~ 85°C, TJ = -40 ~ 125°C
2.5
-
6
V
VFB = 0.4V, no switching
70
100
130
µA
FB = GND, switching
-
1
2
mA
EN = GND
-
-
1
µA
VIN Rising
2.0
2.2
2.4
V
50
100
150
mV
TA = 25°C
0.285
0.3
0.315
TA = -40 ~ 85°C (TJ = -40 ~ 125°C)
0.276
-
0.324
-50
-
50
nA
0.8
1.0
1.2
MHz
Ω
UNDER VOLTAGE LOCKOUT
UVLO Threshold Voltage
UVLO Hysteresis Voltage
REFERENCE AND OUTPUT VOLTAGES
VREF
IFB
Regulated Feedback Voltage
FB Input Current
V
INTERNAL POWER SWITCH
FSW
Switching Frequency
RON
Power Switch On Resistance
ILIM
Power Switch Current Limit
LX Leakage Current
DMAX
FB=GND
VEN=0V, VLX=0V or 5V, VIN = 5V
LX Maximum Duty Cycle
-
0.6
-
0.7
0.9
1.2
A
-1
-
1
µA
92
95
98
%
OUTPUT OVER VOLTAGE PROTECTION
VOVP
Over Voltage Threshold
VOVP rising
-
40
-
V
-
3
-
V
VOVP =40V
-
50
-
µA
VEN Rising
0.4
0.7
1
V
-
0.1
-
V
VEN= 0~5V, VIN = 5V
-1
-
1
µA
TJ Rising
-
150
-
°C
-
40
-
°C
OVP Hysteresis
OVP Leakage Current
ENABLE AND SHUTDOWN
VTEN
EN Voltage Threshold
EN Voltage Hysteresis
ILEN
EN Leakage Current
OVER-TEMPERATURE PROTECTION
TOTP
Over-Temperature Protection (Note 4)
Over-Temperature Protection
Hysteresis (Note 4)
Note 4: Guaranteed by design, not production tested.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
3
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APW7209
Typical Operating Characteristics
(Refer to figure 1 in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 10WLEDs unless otherwise specified)
WLED Current vs. PWM Duty Cycle
20
90
18
85
16
WLED Current, ILED (mA)
Efficiency (η)
Efficiency vs. WLED Current
95
80
75
70
VIN=5V
65
VIN=4.2V
VIN=3.6V
60
VIN=3.3V
55
10 WLEDs
≅ [email protected]
η=POUT/PIN
14
12
10
8
100KHz
6
4
1KHz
2
100Hz
0
50
0
5
10
15
20
25
30
0
20
WLED Current, ILED (mA)
21.0
80
100
100
Maximum Duty Cycle, DMAX (%)
20.8
WLED Current, ILED (mA)
60
Maximum Duty Cycle vs. Supply
Voltage
WLED Current vs. Supply Voltage
20.6
20.4
20.2
20.0
19.8
19.6
19.4
19.2
19.0
90
80
70
60
50
40
2.5
3
3.5
4
4.5
5
5.5
6
2.5
3
Supply Voltage, VIN (V)
3.5
4
4.5
5
5.5
6
Supply Voltage, VIN (V)
Switching Frequency vs. Supply
Voltage
Switch ON Resistance vs. Supply
Voltage
0.8
Switch ON Resistance, RON (Ω)
1.2
Switching Frequency, FSW (MHz)
40
PWM Duty Cycle (%)
1.1
1
0.9
0.8
0.7
0.6
0.5
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.4
2.5
3
3.5
4
4.5
5
5.5
2.5
6
3.5
4
4.5
5
5.5
6
Supply Voltage, VIN (V)
Supply Voltage, VIN (V)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
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4
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APW7209
Operating Waveforms
(Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 10WLEDs unless otherwise
specified )
Start-up
1
Normal Operating Waveform
VEN
1
VOUT, 10V/Div
VLX, 20V/Div, DC
2
VOUT, 100mV/Div, AC
2
IIN, 0.2A/Div
3
IL, 0.2A/Div
3
10WLEDs, L=22µH, VIN=3.6V, ILED=20mA
10WLEDs, L=22µH, VIN=3.6V, ILED=20mA
CH1: VEN, 1V/Div, DC
CH2: VOUT, 10V/Div, DC
CH3: IIN, 0.2A/Div, DC
Time: 0.5ms/Div
CH1: VLX, 20V/Div, DC
CH2: VOUT, 100mV/Div, AC
CH3: IL, 0.2A/Div, DC
Time: 500ns/Div
Open-LED Protection
VOUT, 10V/Div
1
CH1: VOUT, 10V/Div, DC
Time: 20ms/Div
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
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APW7209
Pin Description
PIN NO.
NAME
1
LX
2
GND
3
FB
FUNCTION
Switch pin. Connect this pin to inductor/diode here.
Power and signal ground pin.
Feedback Pin. Reference voltage is 0.3V(typical). Connect this pin to cathode of the lowest LED
and current-sense resistor (R1). Calculate resistor value according to R1=0.3V/ILED.
Enable Control Input. Forcing this pin above 1.0V enables the device, or forcing this pin below 0.4V
4
to shut it down. In shutdown, all functions are disabled to decrease the supply current below 1µA.
EN
Do not leave this pin floating.
5
OVP
Over Voltage Protection Input Pin. OVP is connected to the output capacitor of the converter.
6
VIN
Main Supply Pin. Must be closely decoupled to GND with a 4.7µF or greater ceramic capacitor.
Block Diagram
VIN
EN
OVP
UVLO
LX
Gate Driver
Control Logic
OverTemperature
Protection
Slope
Compensation
Current
limit
Current Sense
Amplifier
ICMP
Error
Amplifier
Σ
Oscillator
FB
GND
COMP
EAMP
Softstart
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
6
VREF
0.3V
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APW7209
Typical Application Circuits
VOUT
L1
VIN
22µH
C1
4.7µF
6
2
4
OFF ON
1
LX
VIN
GND
C2
1µF
Up to 10
WLEDs
5
OVP
APW7209
3
FB
EN
R1
15Ω
Figure 1. Typical 10 WLEDs Application
L1
VIN
VOUT
22µH
C1
4.7µF
6
2
100Hz~100kHz
VIN
1
LX
GND
C2
1µF
Up to 10
WLEDs
5
OVP
APW7209
4
EN
3
FB
Duty=100%, ILED=20mA
R1
15Ω
Duty=0%, LED off
Figure 2. Brightness control by using a PWM signal applied to EN
VIN
VOUT
L1
22µH
C1
4.7µF
6
2
OFF ON
4
LX
VIN
GND
OVP
FB
5
Up to 10
WLEDs
3
R2
10K
R3
100K
PWM
0V
brightness
control Duty=100%, LED off
Duty=0%, ILED=22mA
R1 =
C2
1µF
APW7209
EN
3.3V
R2 = VREF ⋅
1
R1
15Ω
VADJ
R4
10K
C3
0.1µF
ILED,MAX ⋅ R3 + VADJ,MIN − ILED,MIN ⋅ R3 − VADJ,MAX
VADJ,MAX ⋅ ILED,MAX + VREF ⋅ ILED,MIN − VADJ,MIN ⋅ ILED,MIN − VREF ⋅ ILED,MAX
R2  R2

V REF ⋅  1 +
⋅ V ADJ
−
R3  R3

ILED ,MAX
,MIN
Figure 3. Brightness control using a filtered PWM signal
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
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APW7209
Function Description
Main Control Loop
Over-Temperature Protection (OTP)
The APW7209 is a constant frequency current-mode
The over-temperature circuit limits the junction temperature of the APW7209. When the junction temperature ex-
switching regulator. During normal operation, the internal N-channel power MOSFET is turned on each cycle
ceeds 150 oC, a thermal sensor turns off the power
MOSFET, allowing the device to cool. The thermal sen-
when the oscillator sets an internal RS latch and turned
off when an internal comparator (ICMP) resets the latch.
sor allows the converter to start a soft-start process and
regulate the LEDs current again after the junction tem-
The peak inductor current at which ICMP resets the RS
latch is controlled by the voltage on the COMP node, which
perature cools by 40oC. The OTP is designed with a 40oC
hysteresis to lower the average Junction Temperature
is the output of the error amplifier (EAMP). An external
current-sense resistor connected between cathode of the
(TJ) during continuous thermal overload conditions, increasing the lifetime of the device.
lowest LED and ground allows the EAMP to receive a
current feedback voltage VFB at FB pin. When the LEDs
Enable/Shutdown
voltage increases to cause the LEDs current to decrease,
it causes a slightly decrease in VFB relative to the 0.3V
Driving EN to ground places the APW7209 in shutdown
reference, which in turn causes the COMP voltage to increase until the LEDs current reaches the set point.
mode. When in shutdown, the internal power MOSFET
turns off, all internal circuitry shuts down and the quiescnet
supply current reduces to 1µA maximum.
VIN Under-Voltage Lockout (UVLO)
The Under-Voltage Lockout (UVLO) circuit compares the
This pin also could be used as a digital input allowing
brightness controlled by using a PWM signal with fre-
input voltage at VIN with the UVLO threshold (2.2V rising,
typical) to ensure the input voltage is high enough for
quency from 100Hz to 100kHz. The 0% duty cycle of PWM
signal corresponds to zero LEDs current and 100% cor-
reliable operation. The 100mV (typ) hysteresis prevents
supply transients from causing a restart. Once the input
responds to full one.
voltage exceeds the UVLO rising threshold, startup begins.
When the input voltage falls below the UVLO falling
Open-LED Protection
In driving LED applications, the feedback voltage on FB
pin falls down if one of the LEDs, in series, is failed.
threshold, the controller turns off the converter.
Soft-Start
Meanwhile, the converter unceasingly boosts the output
voltage like a open-loop operation. Therefore, an over-
The APW7209 has a built-in soft-start to control the Nchannel MOSFET current rise during start-up. During soft-
voltage protection (OVP), monitoring the output voltage
via OVP pin, is integrated into the chip to prevent the LX
start, an internal ramp voltage, connected to one of the
inverting inputs of the comoarator ICMP, raise up to re-
and the output voltages from exceeding their maximum
voltage ratings. When the voltage on the OVP pin rises
place the output voltage of error amplifier until the ramp
voltage reaches the VCOMP.
above the OVP threshold (40V, typical), the converter
stops switching and prevents the output voltage from
Current-Limit Protection
rising. The converter can work again when the falling OVP
voltage falls below the OVP voltage threshold.
The APW7209 monitors the inductor current, flowing
through the N-channel MOSFET, and limits the current
peak at current-limit level to prevent loads and the
APW7209 from damages in overload conditions.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
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APW7209
Application Information
The peak inductor current is calculated as the following
equation:
Input Capacitor Selection
The input capacitor (CIN) reduces the ripple of the input
current drawn from the input supply and reduces noise
injection into the IC. The reflected ripple voltage will be
smaller when an input capacitor with larger capacitance
is used. For reliable operation, it is recommended to
select the capacitor with maximum voltage rating at least
IPEAK = IIN(MAX ) +
VIN
1.2 times of the maximum input voltage. The capacitors
should be placed close to the VIN and GND.
1 VIN ⋅ (VOUT − VIN )
⋅
2 VOUT ⋅ L ⋅ FSW
IL
IIN
LX
N-FET
CIN
IOUT
D1
VOUT
ESR
ISW
COUT
Inductor Selection
Selecting an inductor with low dc resistance reduces con-
IL
duction losses and achieves high efficiency. The efficiency
is moderated whilst using small chip inductor which op-
ILIM
IPEAK
erates with higher inductor core losses. Therefore, it is
∆IL
necessary to take further consideration while choosing
an adequate inductor. Mainly, the inductor value deter-
IIN
mines the inductor ripple current: larger inductor value
results in smaller inductor ripple current and lower con-
ISW
duction losses of the converter. However, larger inductor
value generates slower load transient response. A reasonable design rule is to set the ripple current, ∆IL, to be
30% to 50% of the maximum average inductor current,
IL(AVG). The inductor value can be obtained as below,
 V
L ≥  IN
 VOUT
ID
2

VOUT − VIN
η
 ×
×
 F ×I
 ∆IL 
SW
OUT (MAX )



 IL (AVG ) 


IOUT
Output Capacitor Selection
where
The current-mode control scheme of the APW7209 al-
VIN = input voltage
lows the usage of tiny ceramic capacitors. The higher
capacitor value provides good load transient response.
VOUT = output voltage
Ceramic capacitors with low ESR values have the lowest
output voltage ripple and are recommended. If required,
FSW = switching frequency in MHz
IOUT = maximum output current in amp.
tantalum capacitors may be used as well. The output ripple
is the sum of the voltages across the ESR and the ideal
η = Efficiency
∆IL /IL(AVG) = inductor ripple current/average current
output capacitor.
(0.3 to 0.5 typical)
To avoid saturation of the inductor, the inductor should be
rated at least for the maximum input current of the con-
Δ VOUT = ΔVESR + ΔVCOUT
verter plus the inductor ripple current. The maximum input current is calculated as below:
∆VCOUT ≈
IIN(MAX ) =




∆VESR ≈ IPEAK × RESR
IOUT (MAX ) × VOUT
where IPEAK is the peak inductor current.
VIN × η
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
IOUT  VOUT − VIN
×
COUT  VOUT × FSW
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APW7209
Application Information (Cont.)
Output Capacitor Selection (Cont.)
Setting the LED Current
For ceramic capacitor application, the output voltage ripple
is dominated by the ∆VCOUT. When choosing the input and
In figure 1, the converter regulates the voltage on FB pin,
connected with the cathod of the lowest LED and the cur-
output ceramic capacitors, the X5R or X7R with their
good temperature and voltage characteristics are
rent-sense resistor R1, at 0.3V (typical). Therefore, the
current (ILED), flowing via the LEDs and the R1, is calcu-
recommended.
lated by the following equation:
Diode Selection
ILED =
To achieve high efficiency, a Schottky diode must be used.
The current rating of the diode must meet the peak cur-
0 .3 V
R1
rent rating of the converter.
Recommended Inductor Selection
Designator Manufacturer
L1
L1
GOTREND
GOTREND
0.35
0.59
Saturation
Current (A)
0.62
0.52
Dimensions
L x W x H (mm3)
5 x 5 x 2.8
3.85 x 3.85 x 1.8
TC Code
X5R
X7R
Rated Voltage (V)
6.3
50
Case size
0603
0805
Part Number
Inductance (µH)
Max DCR (ohm)
GTSD-53-470
GTSD-32-220
47
22
Recommended Capacitor Selection
Part Number
Designator Manufacturer
C1
Murata
GRM188R60J475KE19
C2
Murata
GRM21BR71H105KA12
Capacitance (µF)
4.7
1.0
Recommended Diode Selection
Designator Manufacturer
D1
Zowie
Part Number
MSCD106
Maximum average forward
rectified current (A)
1.0
Maximum repetitive peak
reverse voltage (V)
60
Case size
0805
Layout Consideration
For all switching power supplies, the layout is an important step in the design; especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
Via To OVP
L1
To Anode of
WLEDs
VOUT
D1
C1
LX
VIN
C2
1. The input capacitor should be placed close to the VIN
and GND. Connecting the capacitor with VIN and GND
pins by short and wide tracks without using any vias for
filtering and minimizing the input voltage ripple.
Via To VOUT
R1
VEN
From Cathod of
WLEDs
2. The inductor should be placed as close as possible to
the LX pin to minimize length of the copper tracks as
well as the noise coupling into other circuits.
Refer to Fig. 1
Optimized APW7209 Layout
3. Since the feedback pin and network is a high impedance circuit, the feedback network should be routed
away from the inductor. The feedback pin and feedback network should be shielded with a ground plane
or track to minimize noise coupling into this circuit.
4. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
10
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APW7209
Package Information
SOT-23-6
D
e
E
E1
SEE
VIEW A
b
c
0.25
A
L
0
GAUGE PLANE
SEATING PLANE
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-6
MILLIMETERS
MIN.
INCHES
MAX.
A
MIN.
MAX.
1.45
0.057
A1
0.00
0.15
0.000
0.006
A2
0.90
1.30
0.035
0.051
b
0.30
0.50
0.012
0.020
c
0.08
0.22
0.003
0.009
D
2.70
3.10
0.106
0.122
E
2.60
3.00
0.102
0.118
E1
1.40
1.80
0.055
e
e1
L
0
0.071
0.037 BSC
0.95 BSC
0.075 BSC
1.90 BSC
0.30
0.60
0°
8°
0.012
0°
0.024
8°
Note : 1. Follow JEDEC TO-178 AB.
2. Dimension D and E1 do not include mold flash, protrusions or
gate burrs. Mold flash, protrusion or gate burrs shall not exceed
10 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
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APW7209
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOT-23-6
A
H
T1
C
d
178.0±
2.00
50 MIN.
P0
P1
P2
D0
D1
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
D
W
E1
F
8.0±0.30
1.75±0.10
3.5±0.05
T
A0
B0
K0
0.6+0.00
-0.40
3.20±0.20
8.4+2.00 13.0+0.50 1.5 MIN. 20.2 MIN.
-0.00
-0.20
3.10±0.20 1.50±0.20
(mm)
Devices Per Unit
Package Type
Unit
Quantity
SOT-23-6
Tape & Reel
3000
Copyright  ANPEC Electronics Corp.
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APW7209
Reflow Condition
(IR/Convection or VPR Reflow)
tp
TP
Critical Zone
TL to TP
Ramp-up
Temperature
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
t 25°C to Peak
Time
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C, 5 sec
1000 Hrs Bias @125°C
168 Hrs, 100%RH, 121°C
-65°C~150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms, 1tr > 100mA
Classification Reflow Profiles
Profile Feature
Average ramp-up rate
(TL to TP)
Preheat
- Temperature Min (Tsmin)
- Temperature Max (Tsmax)
- Time (min to max) (ts)
Time maintained above:
- Temperature (TL)
- Time (tL)
Peak/Classification Temperature (Tp)
Time within 5°C of actual
Peak Temperature (tp)
Ramp-down Rate
Time 25°C to Peak Temperature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
217°C
60-150 seconds
See table 1
See table 2
10-30 seconds
20-40 seconds
6°C/second max.
6°C/second max.
6 minutes max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright  ANPEC Electronics Corp.
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APW7209
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures
3
3
Package Thickness
Volume mm
<350
Volume mm
≥350
<2.5 mm
≥2.5 mm
240 +0/-5°C
225 +0/-5°C
225 +0/-5°C
225 +0/-5°C
Table 2. Pb-free Process – Package Classification Reflow Temperatures
3
Package Thickness
3
Volume mm
<350
Volume mm
350-2000
3
Volume mm
>2000
<1.6 mm
260 +0°C*
260 +0°C*
260 +0°C*
1.6 mm – 2.5 mm
260 +0°C*
250 +0°C*
245 +0°C*
≥2.5 mm
250 +0°C*
245 +0°C*
245 +0°C*
* Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated
classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL
level.
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
14
www.anpec.com.tw