AO4478L N-Channel Enhancement Mode Field Effect Transistor General Description Features The AO4478L uses advanced trench technology to provide excellent RDS(ON), low gate charge. This device is suitable for use as general puspose, PWM and a load switch applications. -RoHS Compliant -Halogen Free VDS (V) = 30V ID = 9A (VGS = 10V) RDS(ON) <19mΩ (VGS = 10V) RDS(ON) <26mΩ (VGS = 4.5V) 100% UIS Tested! 100% Rg Tested! SOIC-8 D D G G S S Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol VDS Drain-Source Voltage VGS Gate-Source Voltage TA=25°C Continuous Drain Current Maximum 30 Units V ±25 V 9.0 ID IDM 7.0 Avalanche Current C Repetitive avalanche energy L=0.1mHC TA=25°C B Power Dissipation TA=70°C Iar Ear 17 14 3.1 Junction and Storage Temperature Range TJ, TSTG Pulsed Drain Current TA=70°C C Thermal Characteristics Parameter Maximum Junction-to-Ambient A AD Maximum Junction-to-Ambient C Maximum Junction-to-Lead Alpha & Omega Semiconductor, Ltd. PD mJ W 2.0 -55 to 150 Symbol t ≤ 10s Steady-State Steady-State A 60 RθJA RθJL Typ 31 59 16 °C Max 40 75 24 Units °C/W °C/W °C/W www.aosmd.com AO4478L Electrical Characteristics (T J=25°C unless otherwise noted) Parameter Symbol STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V IGSS Gate-Body leakage current VDS=0V, VGS= ±25V VGS(th) Gate Threshold Voltage VDS=VGS ID=250µA 1 ID(ON) On state drain current VGS=10V, VDS=5V 60 RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=9A Gate resistance SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qg(4.5V) Total Gate Charge Qgs Gate Source Charge Qgd tD(on) tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time 2 V A 19 VGS=4.5V, ID=8A 21 26 VDS=5V, ID=10A 24 DYNAMIC PARAMETERS Ciss Input Capacitance Rg nA 30 Diode Forward Voltage IS=1A,VGS=0V Maximum Body-Diode Continuous Current Reverse Transfer Capacitance 1.6 0.70 466 VGS=0V, VDS=15V, f=1MHz VGS=0V, VDS=0V, f=1MHz VGS=10V, VDS=15V, ID=9A uA 100 16 Forward Transconductance Output Capacitance 5 25 TJ=125°C VSD Crss V TJ=55°C gFS Units 1 Zero Gate Voltage Drain Current Coss Max 30 VDS=30V, VGS=0V IDSS IS Typ mΩ mΩ S 1 V 4 A 560 pF 90 pF 61 pF 3.7 5.6 Ω 9.3 11 nC 4.3 5.2 nC 1 nC Gate Drain Charge 2.3 nC Turn-On DelayTime 5 ns VGS=10V, VDS=15V, RL=1.65Ω, RGEN=3Ω 8 ns 20 ns 5 ns trr Body Diode Reverse Recovery Time IF=9A, dI/dt=500A/µs 7.5 Qrr Body Diode Reverse Recovery Charge IF=9A, dI/dt=500A/µs 9.8 9 ns nC A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Ratings are based on low frequency and duty cycles to keep initialT J=25°C. D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. 2 F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in FR-4 board with 2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating. Rev0: Sep 2008 THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Alpha & Omega Semiconductor, Ltd. www.aosmd.com AO4478L TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 30 70 7V 60 25 10V 50 4.5V 20 40 ID(A) ID (A) VDS= 5V 4V 30 15 125°C 10 20 VGS= 3V 10 25°C 5 2.5V 0 0 0 1 2 3 4 5 0 1 2.0 35 1.8 RDS(ON) (mΩ) Normalized On-Resistance 40 VGS=4.5V 25 20 15 VGS=10V 10 5 0 5 10 15 20 1.6 5 1.2 VGS=10V ID=9A 1.0 0.8 0.6 25 0 25 50 75 100 125 150 175 Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature(Note E) 1E+01 ID=9A 60 1E+00 50 1E-01 IS (A) RDS(ON) (mΩ) 4 VGS=4.5V ID=8A 1.4 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage(Note E) 70 3 VGS(Volts) Figure 2: Transfer Characteristics(Note E) VDS (Volts) Figure 1: On-Region Characteristics(Note E) 30 2 40 125°C 1E-02 25°C 125°C 30 1E-03 25°C 20 1E-04 10 2 3 4 5 6 7 8 9 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage(Note E) Alpha & Omega Semiconductor, Ltd. 10 1E-05 0.0 0.2 0.4 0.6 0.8 1.0 VSD (Volts) Figure 6: Body-Diode Characteristics(Note E) www.aosmd.com AO4478L TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 800 10 VGS (Volts) 600 Capacitance (pF) VDS=15V ID=9A 8 6 4 400 0 2 4 6 8 Coss 200 2 0 Ciss Crss 0 10 0 Qg (nC) Figure 7: Gate-Charge Characteristics TA=25°C 20 25 30 TA=25°C TA=150°C TA=150°C RDS(ON) limited 100 ID (Amps) ID(A), Peak Avalanche Current 30 15 1000 50 40 10 VDS (Volts) Figure 8: Capacitance Characteristics 70 60 5 TA=100°C 20 TA=125°C 10µs 10 100µs 1 1ms 10ms 100ms TJ(Max)=150°C TA=25°C 0.1 10 10s DC 0.01 0 0.000001 0.1 0.00001 0.0001 0.001 Time in avalanche, tA (s) Figure 9: Single Pulse Avalanche capability (Note C) 1 10 100 VDS (Volts) Figure 10: Maximum Forward Biased Safe Operating Area (Note F) 1000 Power (W) TJ(Max)=150°C TA=25°C 100 10 1 0.00001 0.001 0.1 10 1000 Pulse Width (s) Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F) Alpha & Omega Semiconductor, Ltd. www.aosmd.com AO4478L TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS ZθJA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA RθJA=75°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 1 0.1 PD 0.01 Ton Single Pulse 0.001 0.00001 0.0001 0.001 0.01 0.1 1 T 10 100 1000 Pulse Width (s) Figure 12: Normalized Maximum Transient Thermal Impedance (Note F) Alpha & Omega Semiconductor, Ltd. www.aosmd.com AOD4478L Gate Charge Test Circuit & W aveform Vgs Qg 10V + VDC + Vds - VDC DUT Qgs Qgd - Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds Vds Vgs Rg 90% + Vdd DUT VDC - 10% Vgs Vgs t d(on) tr t d(off) t on tf t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 E AR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs VDC Rg - I AR Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Isd L Vgs Ig Alpha & Omega Semiconductor, Ltd. + Vdd VDC - IF t rr dI/dt I RM Vds Vdd www.aosmd.com