PO100HSTL11A 1 to 2 Differential Clock/Data Fanout Buffer 2.4V -3.6V Differential inputs to HSTL outputs Clock Buffer 02/11/07 DESCRIPTION: FEATURES: • Patented Technology • Two HSTL differential outputs • One pair of LVDS/LVPECL/HSTL/ differential or single-ended inputs • Operating frequency up to 1.24GHz with 2pf load • Operating frequency up to 900MHz with 5pf load • Operating frequency up to 400MHz with 15pf load • Very low output pin to pin skew < 40ps • Propagation delay < 2.0ns max with 15pf load • 2.4V to 3.6V power supply • Industrial temperature range: –40°C to 85°C • Available in 8-pin SOIC package • Available in 8-pin TSSOP package Pin Configuration Potato Semiconductor’s PO100HSTL11A is designed for world top performance using submicron CMOS technology to achieve 1.24GHz HSTL output frequency with less than 2.0ns propagation delay. The PO100HSTL11A is a low-skew, 1-to-2 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The device has a fully differential internal architecture that is optimized to achieve low signal skews at operating frequencies of up to 1.24GHz . Logic Block Diagram Q0 Q0 8 1 Vcc Q0 D Q0 2 7 D Q1 3 6 D Q1 4 5 GND D Q1 Q1 Pin Description PIN FUNCTION D, D LVDS LVPECL HSTL Inputs Q0, Q0, Q1, Q1 HSTL Outputs VCC Positive Supply GND Ground Supply 1 Copyright © Potato Semiconductor Corporation PO100HSTL11A 1 to 2 Differential Clock/Data Fanout Buffer 02/11/07 2.4V -3.6V Differential inputs to HSTL outputs Clock Buffer Maximum Ratings Description Max Unit Storage Temperature -65 to 150 °C Operation Temperature -40 to 85 °C Operation Voltage -0.5 to +4.6 V Input Voltage -0.5 to Vcc V Output Voltage -0.5 to Vcc+0.5 V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. Pin Characteristics Symbol Parameter CIN Input Capacitance RPULLUP RPULLDOWN Test Conditions Minimum Typical Maximum Units 4 pF Input Pullup Resistor 88 KΩ Input Pulldown Resistor 88 KΩ DC Electrical Characteristics Symbol Description VOH Output High voltage VOL Test Conditions Min Typ Max Unit Vcc=3V Vin=VIH or VIL, IOH= -12mA 2.4 3 - V Output Low voltage Vcc=3V Vin=VIH or VIL, IOH=12mA - 0.3 0.5 V VIH Input High voltage Guaranteed Logic HIGH Level (Input Pin) 2 - Vcc V VIL Input Low voltage Guaranteed Logic LOW Level (Input Pin) -0.5 - 0.8 V IIH Input High current Vcc = 3.6V and Vin = Vcc - - 1 uA IIL Input Low current Vcc = 3.6V and Vin = 0V - - -1 uA VIK Clamp diode voltage Vcc = Min. And IIN = -18mA -0.7 -1.2 - V Notes: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 °C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © Potato Semiconductor Corporation PO100HSTL11A 1 to 2 Differential Clock/Data Fanout Buffer 02/08/07 2.4V -3.6V Differential inputs to HSTL outputs Clock Buffer Power Supply Characteristics Symbol IccQ Description Quiescent Power Supply Current Test Conditions (1) Min Typ Max Unit Vcc=Max, Vin=Vcc or GND - 0.1 30 uA Notes: 1. 2. 3. 4. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25°C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Switching Characteristics Symbol tPD tr/tf tsk(o) tsk(pp) Description Propagation Delay D to Output pair Rise/Fall Time Test Conditions (1) M ax Unit CL = 15pF 2.0 ns 0.8V – 2.0V ns ps Output Pin to Pin Skew (Same Package) CL = 15pF, 125MHz 0.8 40 Output Skew (Different Package) CL = 15pF, 125MHz 250 ps MHz MHz fmax fmax Input Frequency CL =15pF Input Frequency CL = 5pF 400 250 900 300 fmax Input Frequency CL = 2pF 1240 400 MHz Notes: 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz Test Circuit 50Ω 50Ω 15pF to 2pF 15pF to 2pF 3 Copyright © Potato Semiconductor Corporation PO100HSTL11A 1 to 2 Differential Clock/Data Fanout Buffer 2.4V -3.6V Differential inputs to HSTL outputs Clock Buffer 02/08/07 Test Waveforms FIGURE 1. LVDS/ PECL/ ECL/ HSTL /DIFFERENTIAL INPUT WAVEFORM DEFINITIONS VCC VCC= 3.3V VIH VPP VPP RANGE 0V-VCC VIL VEE=0.0V VEE FIGURE 2. HSTL/HSTL OUTPUT tr,tf, 20-80% VO FIGURE 3. Propogation Delay, Output pulse skew, and output-to-output skew for D to output pair INPUT CLOCK VPP TPLH TPD TPHL OUTPUT CLOCK VO tSK(O) ANOTHER OUTPUT CLOCK 4 Copyright © Potato Semiconductor Corporation PO100HSTL11A 1 to 2 Differential Clock/Data Fanout Buffer 2.4V -3.6V Differential inputs to HSTL outputs Clock Buffer 02/11/07 Packaging Mechanical Drawing: 8 pin SOIC 8 0-8˚ .149 .157 3.78 3.99 .0099 .0196 0.25 x 45˚ 0.50 .016 .050 0.40 1.27 .2284 .2440 5.80 6.20 1 .189 .196 4.80 5.00 .053 .068 .016 .026 0.406 0.660 .0075 .0098 1.35 1.75 0.19 0.25 SEATING PLANE REF .050 BSC 1.27 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Packaging Mechanical Drawing: 8 pin TSSOP 8 SEATING PLANE X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 5 Copyright © 2006, Potato Semiconductor Corporation PO100HSTL11A 1 to 2 Differential Clock/Data Fanout Buffer 02/08/07 2.4V -3.6V Differential inputs to HSTL outputs Clock Buffer Ordering Information Ordering Code Package Top-Marking TA PO100HSTL11ASU 8pin SOIC Tube Pb-free & Green PO100HSTL11AS -40°C to 85°C PO100HSTL11ASR 8pin SOIC Tape and reel Pb-free & Green PO100HSTL11AS -40°C to 85°C PO100HSTL11ATU 8pin TSSOP Tube Pb-free & Green PO100HSTL11AT -40°C to 85°C PO100HSTL11ATR 8pin TSSOP Tape and reel Pb-free & Green PO100HSTL11AT -40°C to 85°C 6 Copyright © Potato Semiconductor Corporation