ASDL-4860 High Power Infrared Emitter (850nm) in Surface Mount Package Data Sheet Description Features ASDL-4860 Infrared emitter is encapsulated in a compact SMT package that is specially catered for High Power application. This device represents best performance for light output, fast switching and low thermal resistance for heat dissipation. It utilizes AlGaAs LED technology and is optimized with high efficiency at emissive wavelength of 850nm. • Top Emitting Surface Mount Infrared LED • Ultra-Low Height Profile: H = 1.5mm, W=6.0mm, L=6.0mm • High Power • High Speed • Low Thermal Resistance • 850nm Wavelength • Design for High Power Application Applications • High Speed Machine Automated System • Non-Contact Position Sensing • Design to Drive High Current • Wide Viewing Angle • Lead-Free and RoHS Compliant • Optical Sensing • Tape & Reel for automation placement • Infrared Data Transmission • Security Applications Ordering Information Part Number Packaging Shipping Option ASDL-4860-C22 Tape & Reel 2000pcs Package Outline Tape and Reel Dimensions All Dimensions are in Millimeters Absolute Maximum Ratings at 25°C Parameter Symbol Peak Forward Current Min. Max Unit Reference IFPK 1 A Tp<10us Duty Cycle=10% Continuous Forward Current IFDC 500 mA Power Dissipation PDISS 1.2 W Reverse Voltage Vr 5 V Operating Temperature TO -40 100 °C Storage Temperature TS -40 100 °C LED Junction Temperature TJ 125 °C 260 for 5 sec °C Lead Soldering Temperature Electrical Characteristics at 25°C Parameter Symbol Forward Voltage VF Reverse Voltage Vr Diode Capacitance CO Rqjs Thermal Resistance, Junction/Base Min. Typ. Max. Unit Condition 1.4 2.2 V IF =500mA V IR=100uA 350 pF Vr=0V, f=1MHz 20 °C/W 5 Optical Characteristics at 25°C Parameter Symbol Min. Typ. Average On-Axis Intensity (1) IE 40 Viewing Angle Unit Condition 45 mW/Sr IF =500mA 2θ1/2 120 deg Peak wavelength λPK 850 nm IF = 500mA Spectral Width Δλ 40 nm IF = 20mA Optical Rise Time tr 15 ns IF = 20mA Optical Fall Time tf 10 ns IF = 20mA Note (1): IE is measured with accuracy of + 11% Max. Typical Electrical / Optical Characteristics Curve (TA = 25°C Unless Otherwise Stated) 80 1.2E-06 70 60 8.0E-07 50 IE (mW/Sr) Relative Radiant Power 1.0E-06 6.0E-07 4.0E-07 30 20 2.0E-07 0.0E+00 40 10 200 0 400 600 800 1000 0 1200 0 200 400 Peak Wavelength (nm) 2.5 1000 0.8 Ie - Relative Radiant Intensity 2 VF (v) 800 1 3 1.5 1 0.5 0 0 200 400 IF (mA) 600 800 1000 Figure 3. Forward Current Vs Forward Voltage 500 400 300 200 100 0 0 10 20 40 30 60 70 50 Solder Point Temperature (Ts) 0.6 0.4 0.2 -0.8 -0.6 -0.4 -0.2 0 0.0 0.2 0.4 Figure 4. Angular Displacement Vs Relative Radiant Intensity 600 Max IF (mA) 600 Figure 2. Forward Current Vs Radiant Intensity Figure 1. Peak Wavelength Vs Relative Radiant Power 80 Figure 5. Maximum Forward Current Vs Solder Point Temperature IF (mA) 90 100 0.6 0.8 Recommended Reflow Profile MAX 260C T - TEMPERATURE (°C) 255 R3 230 217 200 180 R2 R4 60 sec to 90 sec Above 217 C 150 R5 R1 120 80 25 0 P1 HEAT UP 50 100 P2 SOLDER PASTE DRY 150 200 P3 SOLDER REFLOW 250 300 t-TIME (SECONDS) P4 COOL DOWN Symbol DT Maximum DT/Dtime or Duration Heat Up P1, R1 25°C to 150°C 3°C/s Solder Paste Dry P2, R2 150°C to 200°C 100s to 180s Solder Reflow P3, R3 P3, R4 200°C to 260°C 260°C to 200°C 3°C/s -6°C/s Cool Down P4, R5 200°C to 25°C -6°C/s > 217°C 60s to 90s Process Zone Time maintained above liquidus point , 217°C Peak Temperature 260°C - - 20s to 40s 25°C to 260°C 8mins Time within 5°C of actual Peak Temperature Time 25°C to Peak Temperature The reflow profile is a straight-line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different DT/Dtime temperature change rates or duration. The DT/Dtime rates or duration are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and component pins are heated to a temperature of 150°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 3°C per second to allow for even heating of both the PC board and component pins. Process zone P2 should be of sufficient time duration (100 to 180 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder. Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 260°C (500°F) for optimum results. The dwell time above the liquidus point of solder should be between 60 and 90 seconds. This is to assure proper coalescing of the solder paste into liquid solder and the formation of good solder connections. Beyond the recommended dwell time the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 6°C per second maximum. This limitation is necessary to allow the PC board and component pins to change dimensions evenly, putting minimal stresses on the component. It is recommended to perform reflow soldering no more than twice. Recommended Land Pattern Note: The additional solder resist is to improve heat dissipation. The bigger the surface area, the better is the thermal dissipation. The surface area depends on the substrate and total power used. If MC (Metal Core) PCB is used, the additional area will not be needed as the whole MC PCB conducts heat. For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. AV02-0273EN - April 27, 2007