KERSEMI FQD2N60C

N-Channel QFET® MOSFET
600 V, 1.9 A, 4.7 Ω
Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Corise Semiconductorÿs proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
• 1.9 A, 600 V, RDS(on) = 4.7 Ω (Max.) @ VGS = 10 V,
ID = 0.95 A
• Low Gate Charge (Typ. 8.5 nC)
• Low Crss (Typ. 4.3 pF)
• 100% Avalanche Tested
• RoHS Compliant
suited for high efficiency switch mode power supply.
D
D
!
G
G
S
D
●
◀
S
G!
I-PAK
D-PAK
▲
●
●
!
S
Absolute Maximum Ratings
Symbol
Parameter
VDSS
Drain-Source Voltage
ID
Drain Current
IDM
Drain Current
FQD2N60C / FQU2N60C
Unit
600
V
- Continuous (TC = 25°C)
1.9
A
- Continuous (TC = 100°C)
1.14
A
- Pulsed
(Note 1)
7.6
A
± 30
V
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note 2)
120
mJ
IAR
Avalanche Current
(Note 1)
1.9
A
EAR
Repetitive Avalanche Energy
(Note 1)
4.4
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
4.5
V/ns
PD
Power Dissipation (TA = 25°C)*
2.5
W
Power Dissipation (TC = 25°C)
- Derate above 25°C
TJ, TSTG
Operating and Storage Temperature Range
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
44
W
0.35
W/°C
-55 to +150
°C
300
°C
Thermal Characteristics
Symbol
FQD2N60C / FQU2N60C
Parameter
RθJC
Thermal Resistance, Junction-to-Case, Max.
RθJA
RθJA
Unit
2.87
°C/W
Thermal Resistance, Junction-to-Ambient*
50
°C/W
Thermal Resistance, Junction-to-Ambient, Max.
110
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
1
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FQD2N60C / FQU2N60C N-Channel QFET® MOSFET
FQD2N60C / FQU2N60C
Device
Package
Reel Size
Tape Width
FQD2N60C
FQD2N60C
D-PAK
-
-
FDU2N60C
FDU2N60C
I-PAK
-
-
Electrical Characteristics
Symbol
Quantity
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Unit
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
600
--
--
V
∆BVDSS/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
--
0.6
--
V/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 600 V, VGS = 0 V
--
--
1
µA
VDS = 480 V, TC = 125°C
--
--
10
µA
IGSSF
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
IGSSR
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
2.0
--
4.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 0.95 A
--
3.6
4.7
Ω
gFS
Forward Transconductance
VDS = 40 V, ID = 0.95 A
--
5.0
--
S
--
180
235
pF
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
--
20
25
pF
--
4.3
5.6
pF
--
9
28
ns
--
25
60
ns
--
24
58
ns
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 300 V, ID = 2 A,
RG = 25 Ω
(Note 4, 5)
VDS = 480 V, ID = 2 A,
VGS = 10 V
(Note 4, 5)
--
28
66
ns
--
8.5
12
nC
--
1.3
--
nC
--
4.1
--
nC
--
--
1.9
A
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
ISM
Maximum Pulsed Drain-Source Diode Forward Current
--
--
7.6
A
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 1.9 A
--
--
1.4
V
trr
Reverse Recovery Time
230
--
ns
Reverse Recovery Charge
VGS = 0 V, IS = 2 A,
dIF / dt = 100 A/µs
--
Qrr
--
1.0
--
µC
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 56mH, IAS = 2A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 2A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
2
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FQD2N60C / FQU2N60C N-Channel QFET® MOSFET
Device Marking
Figure 2. Transfer Characteristics
1
10
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
0
10
ID, Drain Current [A]
ID, Drain Current [A]
Top :
-1
10
o
150 C
o
-55 C
0
10
o
25 C
※ Notes :
1. 250µ s Pulse Test
2. TC = 25℃
※ Notes :
1. VDS = 40V
2. 250µ s Pulse Test
-1
-2
10
-1
0
10
10
1
10
2
10
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperatue
10
IDR, Reverse Drain Current [A]
RDS(ON) [Ω ],
Drain-Source On-Resistance
12
VGS = 10V
8
6
4
VGS = 20V
2
0
10
150℃
※ Notes :
1. VGS = 0V
2. 250µ s Pulse Test
25℃
※ Note : TJ = 25℃
0
-1
10
0
1
2
3
4
5
0.2
0.4
Figure 5. Capacitance Characteristics
500
VGS, Gate-Source Voltage [V]
Capacitance [pF]
Ciss
300
Coss
200
※ Notes ;
1. VGS = 0 V
2. f = 1 MHz
150
Crss
100
1.4
VDS = 300V
8
VDS = 480V
6
4
2
50
0
-1
10
1.2
VDS = 120V
10
250
1.0
12
400
350
0.8
Figure 6. Gate Charge Characteristics
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
450
0.6
VSD, Source-Drain voltage [V]
ID, Drain Current [A]
※ Note : ID = 2A
0
10
0
1
10
0
2
4
6
8
10
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
3
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FQD2N60C / FQU2N60C N-Channel QFET® MOSFET
Figure 1. On-Region Characteristics
Figure 8. On-Resistance Variation
vs. Temperature
3.0
RDS(ON), (Normalized)
Drain-Source On-Resistance
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 µA
0.9
0.8
-100
-50
0
50
100
150
2.5
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 0.95 A
0.5
0.0
-100
200
-50
0
o
TJ, Junction Temperature [ C]
50
100
150
200
o
TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
2.0
Operation in This Area
is Limited by R DS(on)
1
10
1.6
ID, Drain Current [A]
ID, Drain Current [A]
100 µs
1 ms
0
10
10 ms
100 ms
DC
-1
10
※ Notes :
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
0
10
1
2
10
0.8
0.4
-2
10
1.2
0.0
25
3
10
10
50
75
VDS, Drain-Source Voltage [V]
Zθ JC(t), Thermal Response
Figure 11. Typical Drain Current Slope
vs. Gate Resistance
125
150
Figure 12. Typical Drain-Source Voltage
Slope vs. Gate Resistance
D = 0 .5
10
100
TC, Case Temperature [℃]
※ N o te s :
1 . Z θ J C ( t) = 2 .8 7 ℃ /W M a x .
2 . D u ty F a c to r, D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C (t)
0
0 .2
0 .1
0 .0 5
10
PDM
0 .0 2
0 .0 1
-1
t1
s in g le p u ls e
10
-5
10
-4
10
-3
10
-2
10
-1
t2
10
0
10
1
t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
4
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FQD2N60C / FQU2N60C N-Channel QFET® MOSFET
Figure 7. Breakdown Voltage Variation
vs. Temperature
FQD2N60C / FQU2N60C N-Channel QFET® MOSFET
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
200nF
12V
Qg
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
VDS
90%
VDD
VGS
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
VDS (t)
VDD
DUT
10V
ID (t)
tp
tp
5
Time
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FQD2N60C / FQU2N60C N-Channel QFET® MOSFET
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
6
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7
FQD2N60C / FQU2N60C N-Channel QFET® MOSFET
D-PAK
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8
FQD2N60C / FQU2N60C N-Channel QFET® MOSFET
I-PAK