SHENZHENFREESCALE IRL3803

IRL3803
HEXFET® Power MOSFET
Logic-Level Gate Drive
Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
Description
l
D
l
VDSS = 30V
RDS(on) = 0.006Ω
G
ID = 140A…
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ‚
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
Units
140…
98…
470
200
1.3
±16
610
71
20
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
1/8
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Min.
Typ.
Max.
Units
––––
––––
––––
––––
0.50
––––
0.75
––––
62
°C/W
www.freescale.net.cn
IRL3803
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min.
30
–––
–––
–––
1.0
55
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.052
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
230
29
35
Max. Units
Conditions
–––
V
V GS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.006
VGS = 10V, ID = 71A „
Ω
0.009
VGS = 4.5V, ID = 59A „
–––
V
VDS = V GS, ID = 250µA
–––
S
V DS = 25V, ID = 71A
25
VDS = 30V, VGS = 0V
µA
250
VDS = 24V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
140
ID = 71A
41
nC
VDS = 24V
78
VGS = 4.5V, See Fig. 6 and 13 „
–––
VDD = 15V
–––
ID = 71A
ns
–––
RG = 1.3Ω, VGS = 4.5V
–––
RD = 0.20Ω, See Fig. 10 „
Between lead,
––– 4.5 –––
6mm (0.25in.)
nH
from package
––– 7.5 –––
and center of die contact
––– 5000 –––
VGS = 0V
––– 1800 –––
pF
VDS = 25V
––– 880 –––
ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ VDD = 15V, starting TJ = 25°C, L = 180µH
RG = 25Ω, IAS = 71A. (See Figure 12)
ƒ ISD ≤ 71A, di/dt ≤ 130A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
2/8
Min. Typ. Max. Units
Conditions
MOSFET symbol
––– ––– 140…
showing the
A
G
integral reverse
––– ––– 470
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 71A, VGS = 0V „
––– 120 180
ns
TJ = 25°C, IF = 71A
––– 450 680
nC
di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
D
S
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… Caculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
www.freescale.net.cn
IRL3803
10000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.0V
10000
TOP
1000
ID , Drain-to-Source Current (A )
ID , D rain-to-S ource C urrent (A )
1000
100
10
1
0.1
2 .0 V
2 0µ s P U LS E W ID T H
T J = 2 5°C
0.01
0.1
1
10
A
100
10
0.1
100
0.1
TJ = 1 75 °C
10
1
0.1
V DS = 2 5V
2 0µ s P U L S E W ID TH
5.0
6.0
7.0
8.0
9.0
V G S , G ate-to -So urce Voltag e (V)
Fig 3. Typical Transfer Characteristics
3/8
R D S (on ) , D rain-to-S ource O n R esistance
(N orm alized)
I D , D rain-to-So urce C urren t (A )
T J = 2 5°C
4.0
10
A
100
Fig 2. Typical Output Characteristics,
TJ = 175oC
2.0
3.0
1
V D S , D rain-to-S ource V oltage (V )
1000
0.01
2 0µ s P U LS E W ID TH
T J = 1 75 °C
0.01
Fig 1. Typical Output Characteristics,
TJ = 25oC
100
2.0V
1
V D S , D rain-to-S ource V oltage (V )
2.0
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.0V
TOP
A
I D = 1 20 A
1.5
1.0
0.5
V G S = 10 V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
www.freescale.net.cn
IRL3803
8000
V GS
C iss
C
C iss C rs s
o ss
6000
C oss
=
=
=
=
15
0V ,
f = 1MHz
C g s + C g d , C d s S H O R TE D
C gd
C ds + C g d
V G S , G a te-to-S ou rc e V o ltag e (V )
C , Capacitance (pF)
10000
C rss
2000
0
9
6
3
FO R TE S T CIR C U IT
S E E FIG U R E 1 3
0
A
10
V D S = 2 4V
V D S = 1 5V
12
4000
1
I D = 7 1A
100
0
V D S , D rain-to-S ourc e V oltage (V )
120
160
A
200
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
O P E R A T IO N IN T H IS A R E A L IM ITE D
B Y R D S (o n)
10µ s
I D , D rain Current (A )
I S D , R everse Drain C urrent (A )
80
Q G , T otal G ate C harge (nC )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
TJ = 17 5°C
100
T J = 25 °C
100µ s
100
1m s
V G S = 0V
10
0.4
0.8
1.2
1.6
2.0
2.4
2.8
V S D , S ourc e-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
4/8
40
A
3.2
T C = 25 °C
T J = 17 5°C
S ing le P u lse
10
1
10m s
10
A
100
V D S , D rain-to-S ource V oltage (V )
Fig 8. Maximum Safe Operating Area
www.freescale.net.cn
IRL3803
140
120
I D , Drain Current (A)
RD
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
100
+
-VDD
80
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
60
Fig 10a. Switching Time Test Circuit
40
VDS
20
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.01
0.00001
0.10
P DM
0.05
t1
0.02
0.01
t2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5/8
www.freescale.net.cn
IRL3803
D.U.T.
RG
+
V
- DD
IAS
4.5 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
E A S , S ingle Pulse Avalanc he E nergy (m J)
1500
L
VDS
TOP
B O TT O M
1200
ID
29 A
5 0A
71 A
900
600
300
0
V D D = 15 V
25
tp
A
50
75
100
125
150
175
S tarting T J , J unc tion T em perature (°C )
VDD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
4.5 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6/8
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
www.freescale.net.cn
IRL3803
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
D=
Period
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
7/8
www.freescale.net.cn