TYSEMI PMV117EN

Product specification
PMV117EN
µTrenchMOS™ enhanced logic level FET
Rev. 02 — 7 April 2005
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS™ technology.
1.2 Features
■ Logic level threshold
■ Subminiature surface-mounted
package
■ Very fast switching
1.3 Applications
■ Battery management
■ High-speed switch
■ Low power DC-to-DC converter
1.4 Quick reference data
■ VDS ≤ 30 V
■ RDSon ≤ 117 mΩ (VGS = 10 V)
■ ID ≤ 2.5 A
■ Ptot ≤ 0.83 W
2. Pinning information
Table 1:
Pinning
Pin
Description
1
gate (G)
2
source (S)
3
drain (D)
Simplified outline
Symbol
G
1
2
SOT23
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D
3
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S
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Product specification
PMV117EN
µTrenchMOS™ enhanced logic level FET
3. Ordering information
Table 2:
Ordering information
Type number
PMV117EN
Package
Name
Description
Version
TO-236AB
plastic surface mounted package; 3 leads
SOT23
4. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage (DC)
25 °C ≤ Tj ≤ 150 °C
-
30
V
VDGR
drain-gate voltage (DC)
25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ
-
30
V
VGS
gate-source voltage (DC)
-
±20
V
ID
drain current (DC)
Tsp = 25 °C; VGS = 10 V; Figure 2 and 3
-
2.5
A
Tsp = 100 °C; VGS = 10 V; Figure 2
-
1.6
A
IDM
peak drain current
Tsp = 25 °C; pulsed; tp ≤ 10 µs; Figure 3
-
10
A
Ptot
total power dissipation
Tsp = 25 °C; Figure 1
-
0.83
W
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
−65
+150
°C
Source-drain diode
IS
source (diode forward) current (DC) Tsp = 25 °C
-
0.8
A
ISM
peak source (diode forward) current Tsp = 25 °C; pulsed; tp ≤ 10 µs
-
3.3
A
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Product specification
PMV117EN
µTrenchMOS™ enhanced logic level FET
5. Characteristics
Table 4:
Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS drain-source breakdown voltage
VGS(th)
gate-source threshold voltage
ID = 10 µA; VGS = 0 V
Tj = 25 °C
30
37
-
V
Tj = −55 °C
27
-
-
V
1.5
2
-
V
ID = 1 mA; VDS = VGS; Figure 9 and 10
Tj = 25 °C
IDSS
drain-source leakage current
Tj = 150 °C
1.1
-
-
V
Tj = −55 °C
-
-
2.7
V
-
0.01
0.5
µA
VDS = 24 V; VGS = 0 V
Tj = 25 °C
Tj = 150 °C
IGSS
gate-source leakage current
VGS = ±20 V; VDS = 0 V
RDSon
drain-source on-state resistance
VGS = 10 V; ID = 500 mA; Figure 6 and 8
Tj = 25 °C
VGS = 4.5 V; ID = 500 mA; Figure 6 and 8
Tj = 25 °C
-
-
10
µA
-
10
100
nA
-
74
117
mΩ
117
190
mΩ
188
300
mΩ
-
4.6
-
nC
-
0.6
-
nC
-
1.35
-
nC
-
147
-
pF
-
65
-
pF
-
41
-
pF
-
4
-
ns
-
Tj = 150 °C
Dynamic characteristics
Qg(tot)
total gate charge
Qgs
gate-source charge
ID = 0.5 A; VDD = 15 V; VGS = 10 V;
Figure 11
Qgd
gate-drain (Miller) charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer capacitance
td(on)
turn-on delay time
tr
rise time
-
7.5
-
ns
td(off)
turn-off delay time
-
18
-
ns
tf
fall time
-
13
-
ns
VGS = 0 V; VDS = 10 V; f = 1 MHz;
Figure 13
VDD = 15 V; RL = 15 Ω; VGS = 10 V
Source-drain diode
VSD
source-drain (diode forward) voltage
IS = 0.83 A; VGS = 0 V; Figure 12
-
0.7
1.2
V
trr
reverse recovery time
IS = 1 A; dIS/dt = −100 A/µs; VGS = 0 V;
VDS = 25 V
-
69
-
ns
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